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1/*
2 * Copyright 2008 Islam Ahmed Zaid. All rights reserved. <azismed@gmail.com>
3 * AsereBLN: 2009: cleanup and bugfix
4 */
5
6#ifndef __LIBSAIO_CPU_H
7#define __LIBSAIO_CPU_H
8
9#include "libsaio.h"
10
11extern void scan_cpu(void);
12
13#defineMSR_IA32_PERF_STATUS0x198
14#define MSR_IA32_PERF_CONTROL0x199
15#define MSR_IA32_EXT_CONFIG0x00EE
16#define MSR_FLEX_RATIO0x194
17#defineMSR_PLATFORM_INFO0xCE
18#define MSR_TURBO_RATIO_LIMIT0x1AD
19#define MSR_IA32_BIOS_SIGN_ID 0x08B
20#define MSR_CORE_THREAD_COUNT 0x035
21#define K8_FIDVID_STATUS0xC0010042
22#define K10_COFVID_STATUS0xC0010071
23#define MSR_IA32_MISC_ENABLE 0x000001A0
24
25#define DEFAULT_FSB100000 /* for now, hardcoding 100MHz for old CPUs */
26
27// DFE: This constant comes from older xnu:
28#define CLKNUM1193182/* formerly 1193167 */
29
30// DFE: These two constants come from Linux except CLOCK_TICK_RATE replaced with CLKNUM
31#define CALIBRATE_TIME_MSEC30/* 30 msecs */
32#define CALIBRATE_LATCH((CLKNUM * CALIBRATE_TIME_MSEC + 1000/2)/1000)
33
34static inline uint64_t rdtsc64(void)
35{
36uint64_t ret;
37__asm__ volatile("rdtsc" : "=A" (ret));
38return ret;
39}
40
41static inline uint64_t rdmsr64(uint32_t msr)
42{
43 uint64_t ret;
44 __asm__ volatile("rdmsr" : "=A" (ret) : "c" (msr));
45 return ret;
46}
47
48static inline void wrmsr64(uint32_t msr, uint64_t val)
49{
50__asm__ volatile("wrmsr" : : "c" (msr), "A" (val));
51}
52
53static inline void intel_waitforsts(void) {
54uint32_t inline_timeout = 100000;
55while (rdmsr64(MSR_IA32_PERF_STATUS) & (1 << 21)) { if (!inline_timeout--) break; }
56}
57
58static inline void do_cpuid2(uint32_t selector, uint32_t selector2, uint32_t *data)
59{
60asm volatile ("cpuid"
61 : "=a" (data[0]),
62 "=b" (data[1]),
63 "=c" (data[2]),
64 "=d" (data[3])
65 : "a" (selector), "c" (selector2),
66 "b" (0),
67 "d" (0));
68}
69
70#endif /* !__LIBSAIO_CPU_H */
71

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