Root/
Source at commit HEAD created 5 years 6 days ago. By ifabio, Few update to kernelPatcher (Credits to CrazyBirdy) | |
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1 | /*␊ |
2 | * Copyright 2013 Intel Corporation␊ |
3 | * All Rights Reserved.␊ |
4 | *␊ |
5 | * Permission is hereby granted, free of charge, to any person obtaining a␊ |
6 | * copy of this software and associated documentation files (the␊ |
7 | * "Software"), to deal in the Software without restriction, including␊ |
8 | * without limitation the rights to use, copy, modify, merge, publish,␊ |
9 | * distribute, sub license, and/or sell copies of the Software, and to␊ |
10 | * permit persons to whom the Software is furnished to do so, subject to␊ |
11 | * the following conditions:␊ |
12 | *␊ |
13 | * The above copyright notice and this permission notice (including the␊ |
14 | * next paragraph) shall be included in all copies or substantial portions␊ |
15 | * of the Software.␊ |
16 | *␊ |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR␊ |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,␊ |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL␊ |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER␊ |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING␊ |
22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER␊ |
23 | * DEALINGS IN THE SOFTWARE.␊ |
24 | */␊ |
25 | ␊ |
26 | /*␊ |
27 | ␉Original patch by Nawcom␊ |
28 | ␉http://forum.voodooprojects.org/index.php/topic,1029.0.html␊ |
29 | ␊ |
30 | ␉Original Intel HDx000 code from valv␊ |
31 | ␉Intel Ivy Bridge, Haswell and Broadwell code from ErmaC:␊ |
32 | ␉- http://www.insanelymac.com/forum/topic/288241-intel-hd4000-inject-aaplig-platform-id/␊ |
33 | */␊ |
34 | ␊ |
35 | #ifndef __LIBSAIO_GMA_H␊ |
36 | #define __LIBSAIO_GMA_H␊ |
37 | ␊ |
38 | bool setup_gma_devprop(pci_dt_t *gma_dev);␊ |
39 | ␊ |
40 | struct intel_gfx_info_t;␊ |
41 | typedef struct{␊ |
42 | uint32_t␉model;␊ |
43 | ␉char␉␉*label_info;␊ |
44 | }intel_gfx_info_t;␊ |
45 | ␊ |
46 | #define REG8(reg)␉((volatile uint8_t *)regs)[(reg)]␊ |
47 | #define REG16(reg)␉((volatile uint16_t *)regs)[(reg) >> 1]␊ |
48 | #define REG32(reg)␉((volatile uint32_t *)regs)[(reg) >> 2]␊ |
49 | ␊ |
50 | /****************************************************************************␊ |
51 | * Miscellanious defines␊ |
52 | ****************************************************************************/␊ |
53 | ␊ |
54 | /* Intel gfx Controller models */␊ |
55 | #define GFX_MODEL_CONSTRUCT(vendor, model) (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))␊ |
56 | ␊ |
57 | /* Intel */␊ |
58 | #define INTEL_NAME "Intel"␊ |
59 | #define HD_GRAPHICS "HD Graphics"␊ |
60 | #define HD_GRAPHICS_2000 "HD Graphics 2000"␊ |
61 | #define HD_GRAPHICS_2500 "HD Graphics 2500"␊ |
62 | #define HD_GRAPHICS_3000 "HD Graphics 3000"␊ |
63 | #define HD_GRAPHICS_4000 "HD Graphics 4000"␊ |
64 | #define HD_GRAPHICS_4200 "HD Graphics 4200"␊ |
65 | #define HD_GRAPHICS_4400 "HD Graphics 4400"␊ |
66 | #define HD_GRAPHICS_4600 "HD Graphics 4600"␊ |
67 | #define HD_GRAPHICS_5000 "HD Graphics 5000"␊ |
68 | #define IRIS_5100 "Iris(TM) Graphics 5100"␊ |
69 | #define IRIS_5200 "Iris(TM) Pro Graphics 5200"␊ |
70 | #define HD_GRAPHICS_5300 "HD Graphics 5300"␊ |
71 | #define HD_GRAPHICS_5500 "HD Graphics 5500"␊ |
72 | #define HD_GRAPHICS_5600 "HD Graphics 5600"␊ |
73 | #define HD_GRAPHICS_6000 "HD Graphics 6000"␊ |
74 | #define IRIS_6100 "Iris Graphics 6100"␊ |
75 | #define IRIS_6200 "Iris Pro Graphics 6200"␊ |
76 | #define IRIS_6300 "Iris Pro Graphics P6300"␊ |
77 | #define HD_GRAPHICS_510 "HD Graphics 510"␊ |
78 | #define HD_GRAPHICS_515 "HD Graphics 515"␊ |
79 | #define HD_GRAPHICS_520 "HD Graphics 520"␊ |
80 | #define HD_GRAPHICS_P530 "HD Graphics P530"␊ |
81 | #define HD_GRAPHICS_530 "HD Graphics 530"␊ |
82 | #define HD_GRAPHICS_535 "HD Graphics 535"␊ |
83 | #define HD_GRAPHICS_550 "HD Graphics 550"␊ |
84 | #define IRIS_540 "Iris(TM) Graphics 540"␊ |
85 | #define IRIS_570_580 "Iris(TM) Pro Graphics 570/580"␊ |
86 | #define IRIS_580 "Iris(TM) Pro Graphics 580"␊ |
87 | #define IRIS "Iris(TM) Graphics"␊ |
88 | #define IRIS_P580 "Iris(TM) Pro Graphics P580"␊ |
89 | #define INTEL_VENDORID PCI_VENDOR_ID_INTEL␊ |
90 | ␊ |
91 | /* http://cgit.freedesktop.org/xorg/driver/xf86-video-intel/tree/src/intel_driver.h */␊ |
92 | /* http://people.redhat.com/agk/patches/linux/patches-3.6/git-update1.patch */␊ |
93 | ␊ |
94 | #define GMA_I810 GFX_MODEL_CONSTRUCT(INTEL, 0x7121)␊ |
95 | #define GMA_I810_DC100 GFX_MODEL_CONSTRUCT(INTEL, 0x7123)␊ |
96 | #define GMA_I810_E GFX_MODEL_CONSTRUCT(INTEL, 0x7125)␊ |
97 | #define GMA_I815 GFX_MODEL_CONSTRUCT(INTEL, 0x1132)␊ |
98 | /* ==================================== */␊ |
99 | // Cherryview (Braswell, Cherry Trail)␊ |
100 | // #define GMA_ GFX_MODEL_CONSTRUCT(INTEL, 0x22B0) // Intel(R) HD Graphics␊ |
101 | // #define GMA_ GFX_MODEL_CONSTRUCT(INTEL, 0x22B1) // Intel(R) HD Graphics␊ |
102 | // #define GMA_ GFX_MODEL_CONSTRUCT(INTEL, 0x22B2) // Intel(R) HD Graphics␊ |
103 | // #define GMA_ GFX_MODEL_CONSTRUCT(INTEL, 0x22B3) // Intel(R) HD Graphics␊ |
104 | ␊ |
105 | /* ==================================== */␊ |
106 | ␊ |
107 | #define GMA_I830_M GFX_MODEL_CONSTRUCT(INTEL, 0x3577)␊ |
108 | #define GMA_845_G GFX_MODEL_CONSTRUCT(INTEL, 0x2562)␊ |
109 | #define GMA_I854 GFX_MODEL_CONSTRUCT(INTEL, 0x358E)␊ |
110 | #define GMA_I855_GM GFX_MODEL_CONSTRUCT(INTEL, 0x3582)␊ |
111 | #define GMA_I865_G GFX_MODEL_CONSTRUCT(INTEL, 0x2572)␊ |
112 | /* ==================================== */␊ |
113 | ␊ |
114 | #define GMA_I915_G GFX_MODEL_CONSTRUCT(INTEL, 0x2582) // GMA 915␊ |
115 | #define GMA_I915_GM GFX_MODEL_CONSTRUCT(INTEL, 0x2592) // GMA 915␊ |
116 | #define GMA_E7221_G GFX_MODEL_CONSTRUCT(INTEL, 0x258A)␊ |
117 | #define GMA_I945_G GFX_MODEL_CONSTRUCT(INTEL, 0x2772) // Desktop GMA950␊ |
118 | //#define GMA_82945G GFX_MODEL_CONSTRUCT(INTEL, 0x2776) // Desktop GMA950␊ |
119 | //#define GMA_82915G GFX_MODEL_CONSTRUCT(INTEL, 0x2782) // GMA 915␊ |
120 | //#define GMA_038000 GFX_MODEL_CONSTRUCT(INTEL, 0x2792) // Mobile GMA915␊ |
121 | #define GMA_I945_GM GFX_MODEL_CONSTRUCT(INTEL, 0x27A2) // Mobile GMA950␊ |
122 | #define GMA_I945_GME GFX_MODEL_CONSTRUCT(INTEL, 0x27AE) // Mobile GMA950␊ |
123 | //#define GMA_945GM GFX_MODEL_CONSTRUCT(INTEL, 0x27A6) // Mobile GMA950␊ |
124 | //#define GMA_PINEVIEW_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0xA010)␊ |
125 | #define GMA_PINEVIEW_M GFX_MODEL_CONSTRUCT(INTEL, 0xA011) // Mobile GMA3150␊ |
126 | #define GMA_GMA3150_M GFX_MODEL_CONSTRUCT(INTEL, 0xA012) // Mobile GMA3150␊ |
127 | //#define GMA_PINEVIEW_HB GFX_MODEL_CONSTRUCT(INTEL, 0xA000)␊ |
128 | #define GMA_PINEVIEW_G GFX_MODEL_CONSTRUCT(INTEL, 0xA001) // Mobile GMA3150␊ |
129 | #define GMA_GMA3150_D GFX_MODEL_CONSTRUCT(INTEL, 0xA002) // Desktop GMA3150␊ |
130 | #define GMA_Q35_G GFX_MODEL_CONSTRUCT(INTEL, 0x29B2)␊ |
131 | #define GMA_G33_G GFX_MODEL_CONSTRUCT(INTEL, 0x29C2) // Desktop GMA3100␊ |
132 | // 29C3 // Desktop GMA3100␊ |
133 | #define GMA_Q33_G GFX_MODEL_CONSTRUCT(INTEL, 0x29D2)␊ |
134 | /* ==================================== */␊ |
135 | ␊ |
136 | #define GMA_G35_G GFX_MODEL_CONSTRUCT(INTEL, 0x2982)␊ |
137 | #define GMA_I965_Q GFX_MODEL_CONSTRUCT(INTEL, 0x2992)␊ |
138 | #define GMA_I965_G GFX_MODEL_CONSTRUCT(INTEL, 0x29A2)␊ |
139 | #define GMA_I946_GZ GFX_MODEL_CONSTRUCT(INTEL, 0x2972)␊ |
140 | #define GMA_I965_GM GFX_MODEL_CONSTRUCT(INTEL, 0x2A02) // GMAX3100␊ |
141 | #define GMA_I965_GME GFX_MODEL_CONSTRUCT(INTEL, 0x2A12) // GMAX3100␊ |
142 | #define GMA_GM45_GM GFX_MODEL_CONSTRUCT(INTEL, 0x2A42) // GMAX3100␊ |
143 | //#define GMA_GM45_GM2 GFX_MODEL_CONSTRUCT(INTEL, 0x2A43) // GMAX3100␊ |
144 | #define GMA_G45_E_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E02)␊ |
145 | #define GMA_G45_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E22)␊ |
146 | #define GMA_Q45_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E12)␊ |
147 | #define GMA_G41_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E32)␊ |
148 | #define GMA_B43_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E42)␊ |
149 | #define GMA_B43_G1 GFX_MODEL_CONSTRUCT(INTEL, 0x2E92)␊ |
150 | ␊ |
151 | #define GMA_IRONLAKE_D_G GFX_MODEL_CONSTRUCT(INTEL, 0x0042) // HD2000␊ |
152 | #define GMA_IRONLAKE_M_G GFX_MODEL_CONSTRUCT(INTEL, 0x0046) // HD2000␊ |
153 | /*␊ |
154 | #define GMA_IRONLAKE_D_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0040)␊ |
155 | #define GMA_IRONLAKE_D2_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0069)␊ |
156 | #define GMA_IRONLAKE_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0044)␊ |
157 | #define GMA_IRONLAKE_MA_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0062)␊ |
158 | #define GMA_IRONLAKE_MC2_HB GFX_MODEL_CONSTRUCT(INTEL, 0x006a)␊ |
159 | */␊ |
160 | // 004A // HD2000␊ |
161 | /* ==================================== */␊ |
162 | ␊ |
163 | /* ========== Sandy Bridge ============ */␊ |
164 | //#define GMA_SANDYBRIDGE_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0100) /* Desktop */␊ |
165 | #define GMA_SANDYBRIDGE_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0102) // HD Graphics 2000␊ |
166 | //#define GMA_SANDYBRIDGE_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0104) /* Mobile */␊ |
167 | #define GMA_SANDYBRIDGE_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0112) // HD Graphics 3000␊ |
168 | #define GMA_SANDYBRIDGE_GT2_PLUS␉GFX_MODEL_CONSTRUCT(INTEL, 0x0122) // HD Graphics 3000␊ |
169 | #define GMA_SANDYBRIDGE_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0106) // HD Graphics 2000 Mobile␊ |
170 | #define GMA_SANDYBRIDGE_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0116) // HD Graphics 3000 Mobile␊ |
171 | #define GMA_SANDYBRIDGE_M_GT2_PLUS␉GFX_MODEL_CONSTRUCT(INTEL, 0x0126) // HD Graphics 3000 Mobile␊ |
172 | //#define GMA_SANDYBRIDGE_S_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0108) /* Server */␊ |
173 | #define GMA_SANDYBRIDGE_S_GT GFX_MODEL_CONSTRUCT(INTEL, 0x010A) // HD Graphics␊ |
174 | // 010B // ??␊ |
175 | // 010E // ??␊ |
176 | /* ==================================== */␊ |
177 | ␊ |
178 | /* ========== Ivy Bridge ============== */␊ |
179 | //#define GMA_IVYBRIDGE_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0150) /* Desktop */␊ |
180 | //#define GMA_IVYBRIDGE_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0154) /* Mobile */␊ |
181 | #define GMA_IVYBRIDGE_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0156) // HD Graphics 2500 Mobile␊ |
182 | #define GMA_IVYBRIDGE_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0166) // HD Graphics 4000 Mobile␊ |
183 | #define GMA_IVYBRIDGE_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0152) // HD Graphics 2500␊ |
184 | #define GMA_IVYBRIDGE_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0162) // HD Graphics 4000␊ |
185 | //#define GMA_IVYBRIDGE_S_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0158) /* Server */␊ |
186 | #define GMA_IVYBRIDGE_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x015A) // HD Graphics 4000␊ |
187 | #define GMA_IVYBRIDGE_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x016A) // HD Graphics P4000␊ |
188 | #define GMA_IVYBRIDGE_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x015E) // Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller␊ |
189 | #define GMA_IVYBRIDGE_S_GT4 GFX_MODEL_CONSTRUCT(INTEL, 0x0172) // HD Graphics 2500 Mobile // Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller␊ |
190 | #define GMA_IVYBRIDGE_S_GT5 GFX_MODEL_CONSTRUCT(INTEL, 0x0176) // HD Graphics 2500 Mobile // 3rd Gen Core processor Graphics Controller␊ |
191 | /* ==================================== */␊ |
192 | ␊ |
193 | /* ====== Valleyview (Bay Trail) ======= */␊ |
194 | ␊ |
195 | //#define GMA_VALLEYVIEW_0F00 GFX_MODEL_CONSTRUCT(INTEL, 0x0F00) /* VLV1 */␊ |
196 | //#define GMA_VALLEYVIEW_0F30 GFX_MODEL_CONSTRUCT(INTEL, 0x0F30) /* "HD Graphics" */␊ |
197 | //#define GMA_VALLEYVIEW_0F31 GFX_MODEL_CONSTRUCT(INTEL, 0x0F31) /* "HD Graphics" */␊ |
198 | //#define GMA_VALLEYVIEW_0F32 GFX_MODEL_CONSTRUCT(INTEL, 0x0F32) /* "HD Graphics" */␊ |
199 | //#define GMA_VALLEYVIEW_0F33 GFX_MODEL_CONSTRUCT(INTEL, 0x0F33) /* "HD Graphics" */␊ |
200 | //#define GMA_VALLEYVIEW_0155 GFX_MODEL_CONSTRUCT(INTEL, 0x0155) /* "HD Graphics" */␊ |
201 | //#define GMA_VALLEYVIEW_0157 GFX_MODEL_CONSTRUCT(INTEL, 0x0157) /* "HD Graphics" */␊ |
202 | /* ==================================== */␊ |
203 | ␊ |
204 | /* ============ Haswell =============== */␊ |
205 | // 0090 // AppleIntelHD5000Graphics.kext␊ |
206 | // 0091 // AppleIntelHD5000Graphics.kext␊ |
207 | // 0092 // AppleIntelHD5000Graphics.kext␊ |
208 | //#define GMA_HASWELL_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0400) /* Desktop */␊ |
209 | #define GMA_HASWELL_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0402) // GT1 Desktop␊ |
210 | #define GMA_HASWELL_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0412) // Haswell GT2 Desktop␊ |
211 | #define GMA_HASWELL_D_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0422) // GT3 Desktop␊ |
212 | //#define GMA_HASWELL_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0404) /* Mobile */␊ |
213 | #define GMA_HASWELL_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0406) // Haswell Mobile GT1␊ |
214 | #define GMA_HASWELL_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0416) // Haswell Mobile GT2␊ |
215 | #define GMA_HASWELL_M_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0426) // Haswell Mobile GT3␊ |
216 | #define GMA_HASWELL_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x040A) // Intel(R) HD Graphics␊ |
217 | //#define GMA_HASWELL_S_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0408) /* Server */␊ |
218 | #define GMA_HASWELL_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x041A) // Intel(R) HD Graphics P4600/P4700␊ |
219 | #define GMA_HASWELL_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x042A) // GT3 Server␊ |
220 | #define GMA_HASWELL_B_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x040B)␊ |
221 | #define GMA_HASWELL_B_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x041B)␊ |
222 | #define GMA_HASWELL_B_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x042B)␊ |
223 | #define GMA_HASWELL_E_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x040E)␊ |
224 | #define GMA_HASWELL_E_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x041E)␊ |
225 | #define GMA_HASWELL_E_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x042E)␊ |
226 | ␊ |
227 | #define GMA_HASWELL_ULT_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A02)␊ |
228 | #define GMA_HASWELL_ULT_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A12)␊ |
229 | #define GMA_HASWELL_ULT_D_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A22) //␊ |
230 | #define GMA_HASWELL_ULT_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A06) // GT1 ULT␊ |
231 | #define GMA_HASWELL_ULT_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A16) // Haswell ULT Mobile GT2␊ |
232 | #define GMA_HASWELL_ULT_M_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A26) // Haswell ULT Mobile GT3 - Intel(R) HD Graphics 5000␊ |
233 | #define GMA_HASWELL_ULT_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A0A)␊ |
234 | #define GMA_HASWELL_ULT_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A1A)␊ |
235 | #define GMA_HASWELL_ULT_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A2A)␊ |
236 | #define GMA_HASWELL_ULT_B_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A0B)␊ |
237 | #define GMA_HASWELL_ULT_B_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A1B)␊ |
238 | #define GMA_HASWELL_ULT_B_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A2B)␊ |
239 | ␊ |
240 | #define GMA_HASWELL_ULT_E_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A0E) // Intel(R) HD Graphics␊ |
241 | #define GMA_HASWELL_ULT_E_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A1E) // Intel(R) HD Graphics 4400␊ |
242 | #define GMA_HASWELL_ULT_E_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A2E) // Haswell ULT E GT3␊ |
243 | ␊ |
244 | #define GMA_HASWELL_SDV_D_GT1_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C02)␊ |
245 | //#define GMA_HASWELL_E_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0C04) // DRAM Controller␊ |
246 | #define GMA_HASWELL_SDV_M_GT1_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C06) // Haswell SDV Mobile GT1␊ |
247 | #define GMA_HASWELL_SDV_D_GT2_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C12)␊ |
248 | #define GMA_HASWELL_SDV_M_GT2_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C16) // Haswell SDV Mobile GT2␊ |
249 | #define GMA_HASWELL_SDV_D_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C22) // Haswell HD Graphics - GTH␊ |
250 | #define GMA_HASWELL_SDV_M_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C26) // Haswell SDV Mobile GT3␊ |
251 | //#define GMA_HASWELL_SDV_S_GT1_IG␉GFX_MODEL_CONSTRUCT(INTEL, 0x0C0A)␊ |
252 | //#define GMA_HASWELL_SDV_S_GT2_IG␉GFX_MODEL_CONSTRUCT(INTEL, 0x0C1A)␊ |
253 | //#define GMA_HASWELL_SDV_S_GT2_PLUS_IG␉GFX_MODEL_CONSTRUCT(INTEL, 0x0C2A)␊ |
254 | ␊ |
255 | #define GMA_HASWELL_CRW_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D02)␊ |
256 | #define GMA_HASWELL_CRW_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D12) // Intel(R) HD Graphics 5200 Drivers␊ |
257 | #define GMA_HASWELL_CRW_D_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D22) // Haswell CRW GT3 - Intel(R) Iris(TM) Pro Graphics 5200␊ |
258 | //#define GMA_HASWELL_CRW_D_GT2_PLUS_IG␉GFX_MODEL_CONSTRUCT(INTEL, 0x0D32)␊ |
259 | #define GMA_HASWELL_CRW_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D06) // Intel(R) HD Graphics 5200␊ |
260 | #define GMA_HASWELL_CRW_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D16) // Intel(R) HD Graphics 5200␊ |
261 | #define GMA_HASWELL_CRW_M_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D26) // Haswell CRW Mobile GT3 - Intel(R) Iris(TM) Pro Graphics 5200 Drivers␊ |
262 | #define GMA_HASWELL_CRW_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D0A)␊ |
263 | #define GMA_HASWELL_CRW_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D1A)␊ |
264 | #define GMA_HASWELL_CRW_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D2A)␊ |
265 | #define GMA_HASWELL_CRW_B_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D0B)␊ |
266 | #define GMA_HASWELL_CRW_B_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D1B)␊ |
267 | #define GMA_HASWELL_CRW_B_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D2B)␊ |
268 | #define GMA_HASWELL_CRW_E_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D0E)␊ |
269 | #define GMA_HASWELL_CRW_E_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D1E)␊ |
270 | #define GMA_HASWELL_CRW_E_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D2E)␊ |
271 | #define GMA_HASWELL_CRW_M_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0D36) // Crystal Well Integrated Graphics Controller␊ |
272 | #define GMA_HASWELL_CRW_S_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0D3A)␊ |
273 | ␊ |
274 | /* Broadwell */␊ |
275 | #define GMA_BROADWELL_BDW_0bd0 GFX_MODEL_CONSTRUCT(INTEL, 0x0bd0) // Intel Broadwell HD Graphics HAS GT0 Drivers // AppleIntelBDWGraphics.kext␊ |
276 | #define GMA_BROADWELL_BDW_0bd1 GFX_MODEL_CONSTRUCT(INTEL, 0x0bd1) // Intel Broadwell HD Graphics HAS GT1 Drivers // AppleIntelBDWGraphics.kext␊ |
277 | #define GMA_BROADWELL_BDW_0bd2 GFX_MODEL_CONSTRUCT(INTEL, 0x0bd2) // Intel Broadwell HD Graphics HAS GT2 Drivers // AppleIntelBDWGraphics.kext␊ |
278 | #define GMA_BROADWELL_BDW_0bd3 GFX_MODEL_CONSTRUCT(INTEL, 0x0bd3) // Intel Broadwell HD Graphics HAS GT3 Drivers␊ |
279 | #define GMA_BROADWELL_BDW_0bd4 GFX_MODEL_CONSTRUCT(INTEL, 0x0bd4) // Intel Broadwell HD Graphics HAS GT4 Drivers␊ |
280 | #define GMA_BROADWELL_BDW_1602 GFX_MODEL_CONSTRUCT(INTEL, 0x1602) // Intel(R) HD Graphics Drivers // Halo // AppleIntelBDWGraphics.kext␊ |
281 | #define GMA_BROADWELL_BDW_U_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x1606) // BDW U GT1 // ULT // AppleIntelBDWGraphics.kext␊ |
282 | #define GMA_BROADWELL_BDW_160A GFX_MODEL_CONSTRUCT(INTEL, 0x160A) // Broadwell-U Integrated Graphics // Server // AppleIntelBDWGraphics.kext␊ |
283 | #define GMA_BROADWELL_BDW_160B GFX_MODEL_CONSTRUCT(INTEL, 0x160B) // Broadwell-U Integrated Graphics // ULT // AppleIntelBDWGraphics.kext␊ |
284 | #define GMA_BROADWELL_BDW_160D GFX_MODEL_CONSTRUCT(INTEL, 0x160D) // Broadwell-U Integrated Graphics // Workstation // AppleIntelBDWGraphics.kext␊ |
285 | #define GMA_BROADWELL_BDW_160E GFX_MODEL_CONSTRUCT(INTEL, 0x160E) // Intel(R) HD Graphics Drivers // ULX // AppleIntelBDWGraphics.kext␊ |
286 | #define GMA_BROADWELL_BDW_1612 GFX_MODEL_CONSTRUCT(INTEL, 0x1612) // Intel(R) HD Graphics 5600 Drivers // AppleIntelBDWGraphics.kext␊ |
287 | #define GMA_BROADWELL_BDW_U_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x1616) // BDW U GT2 Intel(R) HD Graphics 5500 Drivers // AppleIntelBDWGraphics.kext␊ |
288 | #define GMA_BROADWELL_BDW_161B GFX_MODEL_CONSTRUCT(INTEL, 0x161B) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
289 | #define GMA_BROADWELL_BDW_161A GFX_MODEL_CONSTRUCT(INTEL, 0x161A) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
290 | #define GMA_BROADWELL_BDW_161D GFX_MODEL_CONSTRUCT(INTEL, 0x161D) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
291 | #define GMA_BROADWELL_BDW_Y_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x161E) // BDW Y GT2 Intel(R) HD Graphics 5300 Drivers // AppleIntelBDWGraphics.kext␊ |
292 | #define GMA_BROADWELL_BDW_1622 GFX_MODEL_CONSTRUCT(INTEL, 0x1622) // Intel(R) Iris(TM) Pro Graphics 6200 Drivers // AppleIntelBDWGraphics.kext␊ |
293 | #define GMA_BROADWELL_BDW_162A GFX_MODEL_CONSTRUCT(INTEL, 0x162A) // Intel(R) Iris(TM) Pro Graphics 6300P Drivers // AppleIntelBDWGraphics.kext␊ |
294 | #define GMA_BROADWELL_BDW_U_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x1626) // BDW U GT3 15W Intel(R) HD Graphics 6000 Drivers // AppleIntelBDWGraphics.kext␊ |
295 | #define GMA_BROADWELL_BDW_U_GT3_2 GFX_MODEL_CONSTRUCT(INTEL, 0x162B) // BDW U GT3 28W Intel(R) Iris(TM) Pro Graphics 6100 Drivers // AppleIntelBDWGraphics.kext␊ |
296 | #define GMA_BROADWELL_BDW_162D GFX_MODEL_CONSTRUCT(INTEL, 0x162D) // Intel(R) Iris(TM) Pro Graphics 6300P Drivers // AppleIntelBDWGraphics.kext␊ |
297 | #define GMA_BROADWELL_BDW_162E GFX_MODEL_CONSTRUCT(INTEL, 0x162E) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
298 | #define GMA_BROADWELL_BDW_1632 GFX_MODEL_CONSTRUCT(INTEL, 0x1632) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
299 | #define GMA_BROADWELL_BDW_1636 GFX_MODEL_CONSTRUCT(INTEL, 0x1636) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
300 | #define GMA_BROADWELL_BDW_163A GFX_MODEL_CONSTRUCT(INTEL, 0x163A) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
301 | #define GMA_BROADWELL_BDW_163B GFX_MODEL_CONSTRUCT(INTEL, 0x163B) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
302 | #define GMA_BROADWELL_BDW_163D GFX_MODEL_CONSTRUCT(INTEL, 0x163D) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
303 | #define GMA_BROADWELL_BDW_163E GFX_MODEL_CONSTRUCT(INTEL, 0x163E) // Broadwell-U Integrated Graphics // AppleIntelBDWGraphics.kext␊ |
304 | ␊ |
305 | /* Skylake */␊ |
306 | #define GMA_SKYLAKE_ULT_GT1␉GFX_MODEL_CONSTRUCT(INTEL, 0x1906) // Intel(R) HD Graphics 510␊ |
307 | #define GMA_SKYLAKE_ULT_GT15␉GFX_MODEL_CONSTRUCT(INTEL, 0x1913) // Intel(R) HD Graphics 510␊ |
308 | #define GMA_SKYLAKE_ULT_GT2␉GFX_MODEL_CONSTRUCT(INTEL, 0x1916) // Intel(R) HD Graphics 520␊ |
309 | #define GMA_SKYLAKE_ULX_GT1␉GFX_MODEL_CONSTRUCT(INTEL, 0x190E) // Intel(R) HD Graphics␊ |
310 | #define GMA_SKYLAKE_ULX_GT2␉GFX_MODEL_CONSTRUCT(INTEL, 0x191E) // Intel(R) HD Graphics 515␊ |
311 | #define GMA_SKYLAKE_DT_GT2␉GFX_MODEL_CONSTRUCT(INTEL, 0x1912) // Intel(R) HD Graphics 530␊ |
312 | #define GMA_SKYLAKE_1921␉GFX_MODEL_CONSTRUCT(INTEL, 0x1921) // Intel(R) HD Graphics 520␊ |
313 | #define GMA_SKYLAKE_ULT_GT3_E␉GFX_MODEL_CONSTRUCT(INTEL, 0x1926) // Intel(R) Iris(TM) Graphics 540␊ |
314 | #define GMA_SKYLAKE_ULT_GT3␉GFX_MODEL_CONSTRUCT(INTEL, 0x1923) // Intel(R) HD Graphics 535␊ |
315 | #define GMA_SKYLAKE_ULT_GT3_28W␉GFX_MODEL_CONSTRUCT(INTEL, 0x1927) // Intel(R) Iris(TM) Graphics 550␊ |
316 | #define GMA_SKYLAKE_DT_GT15␉GFX_MODEL_CONSTRUCT(INTEL, 0x1917) // Intel(R) HD Graphics 530␊ |
317 | #define GMA_SKYLAKE_DT_GT1␉GFX_MODEL_CONSTRUCT(INTEL, 0x1902) // Intel(R) HD Graphics 510␊ |
318 | #define GMA_SKYLAKE_DT_GT4␉GFX_MODEL_CONSTRUCT(INTEL, 0x1932) // Intel(R) Iris(TM) Pro Graphics 570/580␊ |
319 | #define GMA_SKYLAKE_GT4␉␉GFX_MODEL_CONSTRUCT(INTEL, 0x193B) // Intel(R) Iris(TM) Pro Graphics 580␊ |
320 | #define GMA_SKYLAKE_GT3_FE␉GFX_MODEL_CONSTRUCT(INTEL, 0x192B) // Intel(R) Iris(TM) Graphics␊ |
321 | #define GMA_SKYLAKE_GT2␉␉GFX_MODEL_CONSTRUCT(INTEL, 0x191B) // Intel(R) HD Graphics 530␊ |
322 | #define GMA_SKYLAKE_192A␉GFX_MODEL_CONSTRUCT(INTEL, 0x192A) // Intel(R) Iris(TM) Pro Graphics P580␊ |
323 | #define GMA_SKYLAKE_SRW_GT4␉GFX_MODEL_CONSTRUCT(INTEL, 0x193A) // Intel(R) Iris(TM) Pro Graphics P580␊ |
324 | #define GMA_SKYLAKE_WS_GT2␉GFX_MODEL_CONSTRUCT(INTEL, 0x191D) // Intel(R) HD Graphics P530␊ |
325 | #define GMA_SKYLAKE_WS_GT4␉GFX_MODEL_CONSTRUCT(INTEL, 0x193D) // Intel(R) Iris(TM) Pro Graphics P580␊ |
326 | ␊ |
327 | /* END */␊ |
328 | ␊ |
329 | #endif /* !__LIBSAIO_GMA_H */␊ |
330 |