Root/
Source at commit HEAD created 5 years 6 days ago. By ifabio, Few update to kernelPatcher (Credits to CrazyBirdy) | |
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1 | /*␊ |
2 | *␉NVidia injector␊ |
3 | *␊ |
4 | *␉Copyright (C) 2009␉Jasmin Fazlic, iNDi␊ |
5 | *␊ |
6 | *␉NVidia injector modified by Fabio (ErmaC) on May 2012,␊ |
7 | *␉for allow the cosmetics injection also based on SubVendorID and SubDeviceID.␊ |
8 | *␊ |
9 | *␉NVidia injector is free software: you can redistribute it and/or modify␊ |
10 | *␉it under the terms of the GNU General Public License as published by␊ |
11 | *␉the Free Software Foundation, either version 3 of the License, or␊ |
12 | *␉(at your option) any later version.␊ |
13 | *␊ |
14 | *␉NVidia driver and injector is distributed in the hope that it will be useful,␊ |
15 | *␉but WITHOUT ANY WARRANTY; without even the implied warranty of␊ |
16 | *␉MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊ |
17 | *␉GNU General Public License for more details.␊ |
18 | *␊ |
19 | *␉You should have received a copy of the GNU General Public License␊ |
20 | *␉along with NVidia injector.␉ If not, see <http://www.gnu.org/licenses/>.␊ |
21 | *␊ |
22 | *␉Alternatively you can choose to comply with APSL␊ |
23 | *␊ |
24 | *␉DCB-Table parsing is based on software (nouveau driver) originally distributed under following license:␊ |
25 | *␊ |
26 | *␊ |
27 | *␉Copyright 2005-2006 Erik Waling␊ |
28 | *␉Copyright 2006 Stephane Marchesin␊ |
29 | *␉Copyright 2007-2009 Stuart Bennett␊ |
30 | *␊ |
31 | *␉Permission is hereby granted, free of charge, to any person obtaining a␊ |
32 | *␉copy of this software and associated documentation files (the "Software"),␊ |
33 | *␉to deal in the Software without restriction, including without limitation␊ |
34 | *␉the rights to use, copy, modify, merge, publish, distribute, sublicense,␊ |
35 | *␉and/or sell copies of the Software, and to permit persons to whom the␊ |
36 | *␉Software is furnished to do so, subject to the following conditions:␊ |
37 | *␊ |
38 | *␉The above copyright notice and this permission notice shall be included in␊ |
39 | *␉all copies or substantial portions of the Software.␊ |
40 | *␊ |
41 | *␉THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR␊ |
42 | *␉IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,␊ |
43 | *␉FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL␊ |
44 | *␉THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,␊ |
45 | *␉WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF␊ |
46 | *␉OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE␊ |
47 | *␉SOFTWARE.␊ |
48 | */␊ |
49 | ␊ |
50 | #include "config.h"␊ |
51 | #include "boot.h"␊ |
52 | #include "bootstruct.h"␊ |
53 | #include "pci.h"␊ |
54 | #include "platform.h"␊ |
55 | #include "device_inject.h"␊ |
56 | #include "convert.h"␊ |
57 | #include "nvidia.h"␊ |
58 | #include "nvidia_helper.h"␊ |
59 | ␊ |
60 | #if DEBUG_NVIDIA␊ |
61 | ␉#define DBG(x...)␉printf(x)␊ |
62 | #else␊ |
63 | ␉#define DBG(x...)␊ |
64 | #endif␊ |
65 | ␊ |
66 | #define NVIDIA_ROM_SIZE␉␉␉␉0x20000␊ |
67 | #define PATCH_ROM_SUCCESS␉␉␉1␊ |
68 | #define PATCH_ROM_SUCCESS_HAS_LVDS␉␉2␊ |
69 | #define PATCH_ROM_FAILED␉␉␉0␊ |
70 | #define MAX_NUM_DCB_ENTRIES␉␉␉16␊ |
71 | #define TYPE_GROUPED␉␉␉␉0xff␊ |
72 | #define READ_BYTE(rom, offset) (*(u_char *)(rom + offset))␊ |
73 | #define READ_LE_SHORT(rom, offset) (READ_BYTE(rom, offset+1) << 8 | READ_BYTE(rom, offset))␊ |
74 | #define READ_LE_INT(rom, offset) (READ_LE_SHORT(rom, offset+2) << 16 | READ_LE_SHORT(rom, offset))␊ |
75 | #define WRITE_LE_SHORT(data) (((data) << 8 & 0xff00) | ((data) >> 8 & 0x00ff ))␊ |
76 | #define WRITE_LE_INT(data) (WRITE_LE_SHORT(data) << 16 | WRITE_LE_SHORT(data >> 16))␊ |
77 | ␊ |
78 | static bool␉showGeneric␉= false;␊ |
79 | static bool␉nvidiaSingle␉= true;␊ |
80 | static bool␉doit␉␉= false;␊ |
81 | char generic_name[128];␊ |
82 | extern uint32_t devices_number;␊ |
83 | ␊ |
84 | const char *nvidia_compatible_0[] =␉{ "@0,compatible",␉"NVDA,NVMac"␉ };␊ |
85 | const char *nvidia_compatible_1[] =␉{ "@1,compatible",␉"NVDA,NVMac"␉ };␊ |
86 | const char *nvidia_device_type_0[] =␉{ "@0,device_type",␉"display"␉ };␊ |
87 | const char *nvidia_device_type_1[] =␉{ "@1,device_type",␉"display"␉ };␊ |
88 | const char *nvidia_device_type_parent[] =␉{ "device_type",␉"NVDA,Parent"␉ };␊ |
89 | const char *nvidia_device_type_child[]␉=␉{ "device_type",␉"NVDA,Child"␉ };␊ |
90 | const char *nvidia_name_0[] =␉{ "@0,name",␉␉"NVDA,Display-A" };␊ |
91 | const char *nvidia_name_1[] =␉{ "@1,name",␉␉"NVDA,Display-B" };␊ |
92 | //const char *nvidia_slot_name[] =␉{ "AAPL,slot-name", "Slot-1"␉␉ };␊ |
93 | ␊ |
94 | static uint8_t default_NVCAP[]= {␊ |
95 | ␉0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,␊ |
96 | ␉0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,␊ |
97 | ␉0x00, 0x00, 0x00, 0x00␊ |
98 | };␊ |
99 | ␊ |
100 | #define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )␊ |
101 | ␊ |
102 | static uint8_t default_dcfg_0[]␉␉=␉{0x03, 0x01, 0x03, 0x00};␊ |
103 | static uint8_t default_dcfg_1[]␉␉=␉{0xff, 0xff, 0x00, 0x01};␊ |
104 | ␊ |
105 | #define DCFG0_LEN ( sizeof(default_dcfg_0) / sizeof(uint8_t) )␊ |
106 | #define DCFG1_LEN ( sizeof(default_dcfg_1) / sizeof(uint8_t) )␊ |
107 | ␊ |
108 | static uint8_t default_NVPM[]= {␊ |
109 | ␉0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊ |
110 | ␉0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊ |
111 | ␉0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊ |
112 | ␉0x00, 0x00, 0x00, 0x00␊ |
113 | };␊ |
114 | ␊ |
115 | #define NVPM_LEN ( sizeof(default_NVPM) / sizeof(uint8_t) )␊ |
116 | ␊ |
117 | static nvidia_pci_info_t nvidia_card_vendors[] = {␊ |
118 | ␉{ 0x10190000,␉"Elitegroup" },␊ |
119 | ␉{ 0x10250000,␉"Acer" },␊ |
120 | ␉{ 0x10280000,␉"Dell" },␊ |
121 | ␉{ 0x10330000,␉"NEC" },␊ |
122 | ␉{ 0x103C0000,␉"HP" },␊ |
123 | ␉{ 0x10430000,␉"Asus" },␊ |
124 | ␉{ 0x104D0000,␉"Sony" },␊ |
125 | ␉{ 0x105B0000,␉"Foxconn" },␊ |
126 | ␉{ 0x106B0000,␉"Apple" },␊ |
127 | ␉{ 0x10710000,␉"Mitac" },␊ |
128 | ␉{ 0x107B0000,␉"Gateway" },␊ |
129 | ␉{ 0x107D0000,␉"Leadtek" },␊ |
130 | ␉{ 0x109F0000,␉"Trigem" },␊ |
131 | ␉{ 0x10B00000,␉"Gainward" },␊ |
132 | ␉{ 0x10CF0000,␉"Fujitsu" },␊ |
133 | ␉{ 0x10DE0000,␉"nVidia" },␊ |
134 | ␉{ 0x11790000,␉"Toshiba" },␊ |
135 | ␉{ 0x12970000,␉"Shuttle" },␊ |
136 | ␉{ 0x13DC0000,␉"Netbost" },␊ |
137 | ␉{ 0x144D0000,␉"Samsung" },␊ |
138 | ␉{ 0x14580000,␉"Gigabyte" },␊ |
139 | ␉{ 0x14620000,␉"MSi" },␊ |
140 | ␉{ 0x14C00000,␉"Compal" },␊ |
141 | ␉{ 0x152D0000,␉"Quanta" },␊ |
142 | ␉{ 0x15540000,␉"Prolink" },␊ |
143 | ␉{ 0x15580000,␉"Clevo" },␊ |
144 | ␉{ 0x15690000,␉"Palit" },␊ |
145 | ␉{ 0x161F0000,␉"Arima" },␊ |
146 | ␉{ 0x16310000,␉"NEC" },␊ |
147 | ␉{ 0x16420000,␉"Bitland" },␊ |
148 | ␉{ 0x16820000,␉"XFX" },␊ |
149 | ␉{ 0x17340000,␉"Fujitsu" },␊ |
150 | ␉{ 0x174B0000,␉"PC Partner" },␊ |
151 | ␉{ 0x17AA0000,␉"Lenovo" },␊ |
152 | ␉{ 0x17C00000,␉"Wistron" },␊ |
153 | ␉{ 0x17FF0000,␉"Benq" },␊ |
154 | ␉{ 0x18490000,␉"ASRock" },␊ |
155 | ␉{ 0x18540000,␉"LG" },␊ |
156 | ␉{ 0x18640000,␉"LG" },␊ |
157 | ␉{ 0x18940000,␉"LG" },␊ |
158 | ␉{ 0x19610000,␉"ESS" },␊ |
159 | ␉{ 0x196E0000,␉"PNY" },␊ |
160 | ␉{ 0x19910000,␉"Topstar" },␊ |
161 | ␉{ 0x19DA0000,␉"Zotac" },␊ |
162 | ␉{ 0x19F10000,␉"BFG" },␊ |
163 | ␉{ 0x1ACC0000,␉"Point of View" },␊ |
164 | ␉{ 0x1B0A0000,␉"Pegatron" },␊ |
165 | ␉{ 0x1B130000,␉"Jaton" },␊ |
166 | ␉{ 0x34420000,␉"Bihl" },␊ |
167 | ␉{ 0x38420000,␉"EVGA" },␊ |
168 | ␉{ 0x73770000,␉"Colorful" },␊ |
169 | };␊ |
170 | ␊ |
171 | static nvidia_pci_info_t nvidia_card_generic[] = {␊ |
172 | ␉// 0000 - 0040␊ |
173 | ␉{ 0x10DE0000,␉"Unknown" },␊ |
174 | ␉// 0040 - 004F␊ |
175 | /*␊ |
176 | ␉{ 0x10DE0040,␉"GeForce 6800 Ultra" },␊ |
177 | ␉{ 0x10DE0041,␉"GeForce 6800" },␊ |
178 | ␉{ 0x10DE0042,␉"GeForce 6800 LE" },␊ |
179 | ␉{ 0x10DE0043,␉"GeForce 6800 XE" },␊ |
180 | ␉{ 0x10DE0044,␉"GeForce 6800 XT" },␊ |
181 | ␉{ 0x10DE0045,␉"GeForce 6800 GT" },␊ |
182 | ␉{ 0x10DE0046,␉"GeForce 6800 GT" },␊ |
183 | ␉{ 0x10DE0047,␉"GeForce 6800 GS" },␊ |
184 | ␉{ 0x10DE0048,␉"GeForce 6800 XT" },␊ |
185 | ␉{ 0x10DE0049,␉"NV40GL" },␊ |
186 | ␉{ 0x10DE004D,␉"Quadro FX 3400" },␊ |
187 | ␉{ 0x10DE004E,␉"Quadro FX 4000" },␊ |
188 | */␊ |
189 | ␉// 0050 - 005F␊ |
190 | ␉// 0060 - 006F␊ |
191 | ␉// 0070 - 007F␊ |
192 | ␉// 0080 - 008F␊ |
193 | ␉// 0090 - 009F␊ |
194 | ␉{ 0x10DE0090,␉"GeForce 7800 GTX" },␊ |
195 | ␉{ 0x10DE0091,␉"GeForce 7800 GTX" },␊ |
196 | ␉{ 0x10DE0092,␉"GeForce 7800 GT" },␊ |
197 | ␉{ 0x10DE0093,␉"GeForce 7800 GS" },␊ |
198 | ␉{ 0x10DE0094,␉"GeForce 7800SE/XT/LE/LT/ZT" },␊ |
199 | ␉{ 0x10DE0095,␉"GeForce 7800 SLI" },␊ |
200 | ␉{ 0x10DE0098,␉"GeForce Go 7800" },␊ |
201 | ␉{ 0x10DE0099,␉"GeForce Go 7800 GTX" },␊ |
202 | ␉{ 0x10DE009D,␉"Quadro FX 4500" },␊ |
203 | ␉// 00A0 - 00AF␊ |
204 | ␉// 00B0 - 00BF␊ |
205 | ␉// 00C0 - 00CF␊ |
206 | /*␊ |
207 | ␉{ 0x10DE00C0,␉"GeForce 6800 GS" },␊ |
208 | ␉{ 0x10DE00C1,␉"GeForce 6800" },␊ |
209 | ␉{ 0x10DE00C2,␉"GeForce 6800 LE" },␊ |
210 | ␉{ 0x10DE00C3,␉"GeForce 6800 XT" },␊ |
211 | ␉{ 0x10DE00C8,␉"GeForce Go 6800" },␊ |
212 | ␉{ 0x10DE00C9,␉"GeForce Go 6800 Ultra" },␊ |
213 | ␉{ 0x10DE00CC,␉"Quadro FX Go1400" },␊ |
214 | ␉{ 0x10DE00CD,␉"Quadro FX 3450/4000 SDI" },␊ |
215 | ␉{ 0x10DE00CE,␉"Quadro FX 1400" },␊ |
216 | ␉// 00D0 - 00DF␊ |
217 | ␉// 00E0 - 00EF␊ |
218 | ␉// 00F0 - 00FF␊ |
219 | ␉{ 0x10DE00F1,␉"GeForce 6600 GT" },␊ |
220 | ␉{ 0x10DE00F2,␉"GeForce 6600" },␊ |
221 | ␉{ 0x10DE00F3,␉"GeForce 6200" },␊ |
222 | ␉{ 0x10DE00F4,␉"GeForce 6600 LE" },␊ |
223 | ␉{ 0x10DE00F5,␉"GeForce 7800 GS" },␊ |
224 | ␉{ 0x10DE00F6,␉"GeForce 6800 GS/XT" },␊ |
225 | ␉{ 0x10DE00F8,␉"Quadro FX 3400/4400" },␊ |
226 | ␉{ 0x10DE00F9,␉"GeForce 6800 Series GPU" },␊ |
227 | */␊ |
228 | ␉// 0100 - 010F␊ |
229 | ␉// 0110 - 011F␊ |
230 | ␉// 0120 - 012F␊ |
231 | ␉// 0130 - 013F␊ |
232 | ␉// 0140 - 014F␊ |
233 | /*␊ |
234 | ␉{ 0x10DE0140,␉"GeForce 6600 GT" },␊ |
235 | ␉{ 0x10DE0141,␉"GeForce 6600" },␊ |
236 | ␉{ 0x10DE0142,␉"GeForce 6600 LE" },␊ |
237 | ␉{ 0x10DE0143,␉"GeForce 6600 VE" },␊ |
238 | ␉{ 0x10DE0144,␉"GeForce Go 6600" },␊ |
239 | ␉{ 0x10DE0145,␉"GeForce 6610 XL" },␊ |
240 | ␉{ 0x10DE0146,␉"GeForce Go 6600 TE/6200 TE" },␊ |
241 | ␉{ 0x10DE0147,␉"GeForce 6700 XL" },␊ |
242 | ␉{ 0x10DE0148,␉"GeForce Go 6600" },␊ |
243 | ␉{ 0x10DE0149,␉"GeForce Go 6600 GT" },␊ |
244 | ␉{ 0x10DE014A,␉"Quadro NVS 440" },␊ |
245 | ␉{ 0x10DE014B,␉"NV43" },␊ |
246 | ␉{ 0x10DE014C,␉"Quadro FX 550" },␊ |
247 | ␉{ 0x10DE014D,␉"Quadro FX 550" },␊ |
248 | ␉{ 0x10DE014E,␉"Quadro FX 540" },␊ |
249 | ␉{ 0x10DE014F,␉"GeForce 6200" },␊ |
250 | ␉// 0150 - 015F␊ |
251 | ␉// 0160 - 016F␊ |
252 | ␉{ 0x10DE0160,␉"GeForce 6500" },␊ |
253 | ␉{ 0x10DE0161,␉"GeForce 6200 TurboCache(TM)" },␊ |
254 | ␉{ 0x10DE0162,␉"GeForce 6200SE TurboCache(TM)" },␊ |
255 | ␉{ 0x10DE0163,␉"GeForce 6200 LE" },␊ |
256 | ␉{ 0x10DE0164,␉"GeForce Go 6200" },␊ |
257 | ␉{ 0x10DE0165,␉"Quadro NVS 285" },␊ |
258 | ␉{ 0x10DE0166,␉"GeForce Go 6400" },␊ |
259 | ␉{ 0x10DE0167,␉"GeForce Go 6200" },␊ |
260 | ␉{ 0x10DE0168,␉"GeForce Go 6400" },␊ |
261 | ␉{ 0x10DE0169,␉"GeForce 6250" },␊ |
262 | ␉{ 0x10DE016A,␉"GeForce 7100 GS" },␊ |
263 | ␉{ 0x10DE016C,␉"NVIDIA NV44GLM" },␊ |
264 | ␉{ 0x10DE016D,␉"NVIDIA NV44GLM" },␊ |
265 | */␊ |
266 | ␉// 0170 - 017F␊ |
267 | ␉// 0180 - 018F␊ |
268 | ␉// 0190 - 019F␊ |
269 | ␉{ 0x10DE0190,␉"GeForce 8800" },␊ |
270 | ␉{ 0x10DE0191,␉"GeForce 8800 GTX" },␊ |
271 | ␉{ 0x10DE0192,␉"GeForce 8800" },␊ |
272 | ␉{ 0x10DE0193,␉"GeForce 8800 GTS" },␊ |
273 | ␉{ 0x10DE0194,␉"GeForce 8800 Ultra" },␊ |
274 | ␉{ 0x10DE0197,␉"Tesla C870" },␊ |
275 | ␉{ 0x10DE019D,␉"Quadro FX 5600" },␊ |
276 | ␉{ 0x10DE019E,␉"Quadro FX 4600" },␊ |
277 | ␉// 01A0 - 01AF␊ |
278 | ␉// 01B0 - 01BF␊ |
279 | ␉// 01C0 - 01CF␊ |
280 | ␉// 01D0 - 01DF␊ |
281 | ␉{ 0x10DE01D0,␉"GeForce 7350 LE" },␊ |
282 | ␉{ 0x10DE01D1,␉"GeForce 7300 LE" },␊ |
283 | ␉{ 0x10DE01D2,␉"GeForce 7550 LE" },␊ |
284 | ␉{ 0x10DE01D3,␉"GeForce 7300 SE/7200 GS" },␊ |
285 | ␉{ 0x10DE01D6,␉"GeForce Go 7200" },␊ |
286 | ␉{ 0x10DE01D7,␉"GeForce Go 7300" },␊ |
287 | ␉{ 0x10DE01D8,␉"GeForce Go 7400" },␊ |
288 | ␉{ 0x10DE01D9,␉"GeForce Go 7450" },␊ |
289 | ␉{ 0x10DE01DA,␉"Quadro NVS 110M" },␊ |
290 | ␉{ 0x10DE01DB,␉"Quadro NVS 120M" },␊ |
291 | ␉{ 0x10DE01DC,␉"Quadro FX 350M" },␊ |
292 | ␉{ 0x10DE01DD,␉"GeForce 7500 LE" },␊ |
293 | ␉{ 0x10DE01DE,␉"Quadro FX 350" },␊ |
294 | ␉{ 0x10DE01DF,␉"GeForce 7300 GS" },␊ |
295 | ␉// 01E0 - 01EF␊ |
296 | ␉// 01F0 - 01FF␊ |
297 | /*␊ |
298 | ␉{ 0x10DE01F0,␉"GeForce4 MX" },␊ |
299 | ␉// 0200 - 020F␊ |
300 | ␉// 0210 - 021F␊ |
301 | ␉{ 0x10DE0211,␉"GeForce 6800" },␊ |
302 | ␉{ 0x10DE0212,␉"GeForce 6800 LE" },␊ |
303 | ␉{ 0x10DE0215,␉"GeForce 6800 GT" },␊ |
304 | ␉{ 0x10DE0218,␉"GeForce 6800 XT" },␊ |
305 | ␉// 0220 - 022F␊ |
306 | ␉{ 0x10DE0221,␉"GeForce 6200" },␊ |
307 | ␉{ 0x10DE0222,␉"GeForce 6200 A-LE" },␊ |
308 | ␉{ 0x10DE0228,␉"NVIDIA NV44M" },␊ |
309 | ␉// 0230 - 023F␊ |
310 | ␉// 0240 - 024F␊ |
311 | ␉{ 0x10DE0240,␉"GeForce 6150" },␊ |
312 | ␉{ 0x10DE0241,␉"GeForce 6150 LE" },␊ |
313 | ␉{ 0x10DE0242,␉"GeForce 6100" },␊ |
314 | ␉{ 0x10DE0243,␉"NVIDIA C51" },␊ |
315 | ␉{ 0x10DE0244,␉"GeForce Go 6150" },␊ |
316 | ␉{ 0x10DE0245,␉"Quadro NVS 210S / GeForce 6150LE" },␊ |
317 | ␉{ 0x10DE0247,␉"GeForce Go 6100" },␊ |
318 | ␉// 0250 - 025F␊ |
319 | ␉{ 0x10DE025B,␉"Quadro4 700 XGL" },␊ |
320 | */␊ |
321 | ␉// 0260 - 026F␊ |
322 | ␉// 0270 - 027F␊ |
323 | ␉// 0280 - 028F␊ |
324 | ␉// 0290 - 029F␊ |
325 | ␉{ 0x10DE0290,␉"GeForce 7900 GTX" },␊ |
326 | ␉{ 0x10DE0291,␉"GeForce 7900 GT/GTO" },␊ |
327 | ␉{ 0x10DE0292,␉"GeForce 7900 GS" },␊ |
328 | ␉{ 0x10DE0293,␉"GeForce 7950 GX2" },␊ |
329 | ␉{ 0x10DE0294,␉"GeForce 7950 GX2" },␊ |
330 | ␉{ 0x10DE0295,␉"GeForce 7950 GT" },␊ |
331 | ␉{ 0x10DE0296,␉"G71" },␊ |
332 | ␉{ 0x10DE0297,␉"GeForce Go 7950 GTX" },␊ |
333 | ␉{ 0x10DE0298,␉"GeForce Go 7900 GS" },␊ |
334 | ␉{ 0x10DE0299,␉"GeForce Go 7900 GTX" },␊ |
335 | ␉{ 0x10DE029A,␉"Quadro FX 2500M" },␊ |
336 | ␉{ 0x10DE029B,␉"Quadro FX 1500M" },␊ |
337 | ␉{ 0x10DE029C,␉"Quadro FX 5500" },␊ |
338 | ␉{ 0x10DE029D,␉"Quadro FX 3500" },␊ |
339 | ␉{ 0x10DE029E,␉"Quadro FX 1500" },␊ |
340 | ␉{ 0x10DE029F,␉"Quadro FX 4500 X2" },␊ |
341 | ␉// 02A0 - 02AF␊ |
342 | ␉// 02B0 - 02BF␊ |
343 | ␉// 02C0 - 02CF␊ |
344 | ␉// 02D0 - 02DF␊ |
345 | ␉// 02E0 - 02EF␊ |
346 | ␉{ 0x10DE02E0,␉"GeForce 7600 GT" },␊ |
347 | ␉{ 0x10DE02E1,␉"GeForce 7600 GS" },␊ |
348 | ␉{ 0x10DE02E2,␉"GeForce 7300 GT" },␊ |
349 | ␉{ 0x10DE02E3,␉"GeForce 7900 GS" },␊ |
350 | ␉{ 0x10DE02E4,␉"GeForce 7950 GT" },␊ |
351 | ␉// 02F0 - 02FF␊ |
352 | ␉// 0300 - 030F␊ |
353 | /*␊ |
354 | ␉{ 0x10DE0301,␉"GeForce FX 5800 Ultra" },␊ |
355 | ␉{ 0x10DE0302,␉"GeForce FX 5800" },␊ |
356 | ␉{ 0x10DE0308,␉"Quadro FX 2000" },␊ |
357 | ␉{ 0x10DE0309,␉"Quadro FX 1000" },␊ |
358 | ␉// 0310 - 031F␊ |
359 | ␉{ 0x10DE0311,␉"GeForce FX 5600 Ultra" },␊ |
360 | ␉{ 0x10DE0312,␉"GeForce FX 5600" },␊ |
361 | ␉{ 0x10DE0314,␉"GeForce FX 5600XT" },␊ |
362 | ␉{ 0x10DE031A,␉"GeForce FX Go5600" },␊ |
363 | ␉{ 0x10DE031B,␉"GeForce FX Go5650" },␊ |
364 | ␉{ 0x10DE031C,␉"Quadro FX Go700" },␊ |
365 | ␉// 0320 - 032F␊ |
366 | ␉{ 0x10DE0320,␉"GeForce FX 5200" },␊ |
367 | ␉{ 0x10DE0321,␉"GeForce FX 5200 Ultra" },␊ |
368 | ␉{ 0x10DE0322,␉"GeForce FX 5200" },␊ |
369 | ␉{ 0x10DE0323,␉"GeForce FX 5200 LE" },␊ |
370 | ␉{ 0x10DE0324,␉"GeForce FX Go5200" },␊ |
371 | ␉{ 0x10DE0325,␉"GeForce FX Go5250" },␊ |
372 | ␉{ 0x10DE0326,␉"GeForce FX 5500" },␊ |
373 | ␉{ 0x10DE0328,␉"GeForce FX Go5200 32M/64M" },␊ |
374 | ␉{ 0x10DE0329,␉"GeForce FX Go5200" },␊ |
375 | ␉{ 0x10DE032A,␉"Quadro NVS 55/280 PCI" },␊ |
376 | ␉{ 0x10DE032B,␉"Quadro FX 500/600 PCI" },␊ |
377 | ␉{ 0x10DE032C,␉"GeForce FX Go53xx Series" },␊ |
378 | ␉{ 0x10DE032D,␉"GeForce FX Go5100" },␊ |
379 | ␉{ 0x10DE032F,␉"NV34GL" },␊ |
380 | ␉// 0330 - 033F␊ |
381 | ␉{ 0x10DE0330,␉"GeForce FX 5900 Ultra" },␊ |
382 | ␉{ 0x10DE0331,␉"GeForce FX 5900" },␊ |
383 | ␉{ 0x10DE0332,␉"GeForce FX 5900XT" },␊ |
384 | ␉{ 0x10DE0333,␉"GeForce FX 5950 Ultra" },␊ |
385 | ␉{ 0x10DE0334,␉"GeForce FX 5900ZT" },␊ |
386 | ␉{ 0x10DE0338,␉"Quadro FX 3000" },␊ |
387 | ␉{ 0x10DE033F,␉"Quadro FX 700" },␊ |
388 | ␉// 0340 - 034F␊ |
389 | ␉{ 0x10DE0341,␉"GeForce FX 5700 Ultra" },␊ |
390 | ␉{ 0x10DE0342,␉"GeForce FX 5700" },␊ |
391 | ␉{ 0x10DE0343,␉"GeForce FX 5700LE" },␊ |
392 | ␉{ 0x10DE0344,␉"GeForce FX 5700VE" },␊ |
393 | ␉{ 0x10DE0345,␉"NV36.5" },␊ |
394 | ␉{ 0x10DE0347,␉"GeForce FX Go5700" },␊ |
395 | ␉{ 0x10DE0348,␉"GeForce FX Go5700" },␊ |
396 | ␉{ 0x10DE0349,␉"NV36M Pro" },␊ |
397 | ␉{ 0x10DE034B,␉"NV36MAP" },␊ |
398 | ␉{ 0x10DE034C,␉"Quadro FX Go1000" },␊ |
399 | ␉{ 0x10DE034E,␉"Quadro FX 1100" },␊ |
400 | ␉{ 0x10DE034F,␉"NV36GL" },␊ |
401 | */␊ |
402 | ␉// 0350 - 035F␊ |
403 | ␉// 0360 - 036F␊ |
404 | ␉// 0370 - 037F␊ |
405 | ␉// 0380 - 038F␊ |
406 | ␉{ 0x10DE038B,␉"GeForce 7650 GS" },␊ |
407 | ␉// 0390 - 039F␊ |
408 | ␉{ 0x10DE0390,␉"GeForce 7650 GS" },␊ |
409 | ␉{ 0x10DE0391,␉"GeForce 7600 GT" },␊ |
410 | ␉{ 0x10DE0392,␉"GeForce 7600 GS" },␊ |
411 | ␉{ 0x10DE0393,␉"GeForce 7300 GT" },␊ |
412 | ␉{ 0x10DE0394,␉"GeForce 7600 LE" },␊ |
413 | ␉{ 0x10DE0395,␉"GeForce 7300 GT" },␊ |
414 | ␉{ 0x10DE0397,␉"GeForce Go 7700" },␊ |
415 | ␉{ 0x10DE0398,␉"GeForce Go 7600" },␊ |
416 | ␉{ 0x10DE0399,␉"GeForce Go 7600 GT"},␊ |
417 | ␉{ 0x10DE039A,␉"Quadro NVS 300M" },␊ |
418 | ␉{ 0x10DE039B,␉"GeForce Go 7900 SE" },␊ |
419 | ␉{ 0x10DE039C,␉"Quadro FX 560M" },␊ |
420 | ␉{ 0x10DE039E,␉"Quadro FX 560" },␊ |
421 | ␉// 03A0 - 03AF␊ |
422 | ␉// 03B0 - 03BF␊ |
423 | ␉// 03C0 - 03CF␊ |
424 | ␉// 03D0 - 03DF␊ |
425 | ␉{ 0x10DE03D0,␉"GeForce 6150SE nForce 430" },␊ |
426 | ␉{ 0x10DE03D1,␉"GeForce 6100 nForce 405" },␊ |
427 | ␉{ 0x10DE03D2,␉"GeForce 6100 nForce 400" },␊ |
428 | ␉{ 0x10DE03D5,␉"GeForce 6100 nForce 420" },␊ |
429 | ␉{ 0x10DE03D6,␉"GeForce 7025 / nForce 630a" },␊ |
430 | ␉// 03E0 - 03EF␊ |
431 | ␉// 03F0 - 03FF␊ |
432 | ␉// 0400 - 040F␊ |
433 | ␉{ 0x10DE0400,␉"GeForce 8600 GTS" },␊ |
434 | ␉{ 0x10DE0401,␉"GeForce 8600 GT" },␊ |
435 | ␉{ 0x10DE0402,␉"GeForce 8600 GT" },␊ |
436 | ␉{ 0x10DE0403,␉"GeForce 8600 GS" },␊ |
437 | ␉{ 0x10DE0404,␉"GeForce 8400 GS" },␊ |
438 | ␉{ 0x10DE0405,␉"GeForce 9500M GS" },␊ |
439 | ␉{ 0x10DE0406,␉"GeForce 8300 GS" },␊ |
440 | ␉{ 0x10DE0407,␉"GeForce 8600M GT" },␊ |
441 | ␉{ 0x10DE0408,␉"GeForce 9650M GS" },␊ |
442 | ␉{ 0x10DE0409,␉"GeForce 8700M GT" },␊ |
443 | ␉{ 0x10DE040A,␉"Quadro FX 370" },␊ |
444 | ␉{ 0x10DE040B,␉"Quadro NVS 320M" },␊ |
445 | ␉{ 0x10DE040C,␉"Quadro FX 570M" },␊ |
446 | ␉{ 0x10DE040D,␉"Quadro FX 1600M" },␊ |
447 | ␉{ 0x10DE040E,␉"Quadro FX 570" },␊ |
448 | ␉{ 0x10DE040F,␉"Quadro FX 1700" },␊ |
449 | ␉// 0410 - 041F␊ |
450 | ␉{ 0x10DE0410,␉"GeForce GT 330" },␊ |
451 | ␉// 0420 - 042F␊ |
452 | ␉{ 0x10DE0420,␉"GeForce 8400 SE" },␊ |
453 | ␉{ 0x10DE0421,␉"GeForce 8500 GT" },␊ |
454 | ␉{ 0x10DE0422,␉"GeForce 8400 GS" },␊ |
455 | ␉{ 0x10DE0423,␉"GeForce 8300 GS" },␊ |
456 | ␉{ 0x10DE0424,␉"GeForce 8400 GS" },␊ |
457 | ␉{ 0x10DE0425,␉"GeForce 8600M GS" },␊ |
458 | ␉{ 0x10DE0426,␉"GeForce 8400M GT" },␊ |
459 | ␉{ 0x10DE0427,␉"GeForce 8400M GS" },␊ |
460 | ␉{ 0x10DE0428,␉"GeForce 8400M G" },␊ |
461 | ␉{ 0x10DE0429,␉"Quadro NVS 140M" },␊ |
462 | ␉{ 0x10DE042A,␉"Quadro NVS 130M" },␊ |
463 | ␉{ 0x10DE042B,␉"Quadro NVS 135M" },␊ |
464 | ␉{ 0x10DE042C,␉"GeForce 9400 GT" },␊ |
465 | ␉{ 0x10DE042D,␉"Quadro FX 360M" },␊ |
466 | ␉{ 0x10DE042E,␉"GeForce 9300M G" },␊ |
467 | ␉{ 0x10DE042F,␉"Quadro NVS 290" },␊ |
468 | ␉// 0430 - 043F␊ |
469 | ␉// 0440 - 044F␊ |
470 | ␉// 0450 - 045F␊ |
471 | ␉// 0460 - 046F␊ |
472 | ␉// 0470 - 047F␊ |
473 | ␉// 0480 - 048F␊ |
474 | ␉// 0490 - 049F␊ |
475 | ␉// 04A0 - 04AF␊ |
476 | ␉// 04B0 - 04BF␊ |
477 | ␉// 04C0 - 04CF␊ |
478 | ␉{ 0x10DE04C0,␉"NVIDIA G78" },␊ |
479 | ␉{ 0x10DE04C1,␉"NVIDIA G78" },␊ |
480 | ␉{ 0x10DE04C2,␉"NVIDIA G78" },␊ |
481 | ␉{ 0x10DE04C3,␉"NVIDIA G78" },␊ |
482 | ␉{ 0x10DE04C4,␉"NVIDIA G78" },␊ |
483 | ␉{ 0x10DE04C5,␉"NVIDIA G78" },␊ |
484 | ␉{ 0x10DE04C6,␉"NVIDIA G78" },␊ |
485 | ␉{ 0x10DE04C7,␉"NVIDIA G78" },␊ |
486 | ␉{ 0x10DE04C8,␉"NVIDIA G78" },␊ |
487 | ␉{ 0x10DE04C9,␉"NVIDIA G78" },␊ |
488 | ␉{ 0x10DE04CA,␉"NVIDIA G78" },␊ |
489 | ␉{ 0x10DE04CB,␉"NVIDIA G78" },␊ |
490 | ␉{ 0x10DE04CC,␉"NVIDIA G78" },␊ |
491 | ␉{ 0x10DE04CD,␉"NVIDIA G78" },␊ |
492 | ␉{ 0x10DE04CE,␉"NVIDIA G78" },␊ |
493 | ␉{ 0x10DE04CF,␉"NVIDIA G78" },␊ |
494 | ␉// 04D0 - 04DF␊ |
495 | ␉// 04E0 - 04EF␊ |
496 | ␉// 04F0 - 04FF␊ |
497 | ␉// 0500 - 050F␊ |
498 | ␉// 0510 - 051F␊ |
499 | ␉// 0520 - 052F␊ |
500 | ␉// 0530 - 053F␊ |
501 | ␉{ 0x10DE0530,␉"GeForce 7190M / nForce 650M" },␊ |
502 | ␉{ 0x10DE0531,␉"GeForce 7150M / nForce 630M" },␊ |
503 | ␉{ 0x10DE0533,␉"GeForce 7000M / nForce 610M" },␊ |
504 | ␉{ 0x10DE053A,␉"GeForce 7050 PV / nForce 630a" },␊ |
505 | ␉{ 0x10DE053B,␉"GeForce 7050 PV / nForce 630a" },␊ |
506 | ␉{ 0x10DE053E,␉"GeForce 7025 / nForce 630a" },␊ |
507 | ␉// 0540 - 054F␊ |
508 | ␉// 0550 - 055F␊ |
509 | ␉// 0560 - 056F␊ |
510 | ␉// 0570 - 057F␊ |
511 | ␉// 0580 - 058F␊ |
512 | ␉// 0590 - 059F␊ |
513 | ␉// 05A0 - 05AF␊ |
514 | ␉// 05B0 - 05BF␊ |
515 | ␉// 05C0 - 05CF␊ |
516 | ␉// 05D0 - 05DF␊ |
517 | ␉// 05E0 - 05EF␊ |
518 | ␉{ 0x10DE05E0,␉"GeForce GTX 295" },␊ |
519 | ␉{ 0x10DE05E1,␉"GeForce GTX 280" },␊ |
520 | ␉{ 0x10DE05E2,␉"GeForce GTX 260" },␊ |
521 | ␉{ 0x10DE05E3,␉"GeForce GTX 285" },␊ |
522 | ␉{ 0x10DE05E4,␉"NVIDIA GT200" },␊ |
523 | ␉{ 0x10DE05E5,␉"NVIDIA GT200" },␊ |
524 | ␉{ 0x10DE05E6,␉"GeForce GTX 275" },␊ |
525 | ␉{ 0x10DE05E7,␉"nVidia Tesla C1060" },␊ |
526 | ␉{ 0x10DE05E8,␉"NVIDIA GT200" },␊ |
527 | ␉{ 0x10DE05E9,␉"NVIDIA GT200" },␊ |
528 | ␉{ 0x10DE05EA,␉"GeForce GTX 260" },␊ |
529 | ␉{ 0x10DE05EB,␉"GeForce GTX 295" },␊ |
530 | ␉{ 0x10DE05EC,␉"NVIDIA GT200" },␊ |
531 | ␉{ 0x10DE05ED,␉"Quadroplex 2200 D2" },␊ |
532 | ␉{ 0x10DE05EE,␉"NVIDIA GT200" },␊ |
533 | ␉{ 0x10DE05EF,␉"NVIDIA GT200" },␊ |
534 | ␉// 05F0 - 05FF␊ |
535 | ␉{ 0x10DE05F0,␉"NVIDIA GT200" },␊ |
536 | ␉{ 0x10DE05F1,␉"NVIDIA GT200" },␊ |
537 | ␉{ 0x10DE05F2,␉"NVIDIA GT200" },␊ |
538 | ␉{ 0x10DE05F3,␉"NVIDIA GT200" },␊ |
539 | ␉{ 0x10DE05F4,␉"NVIDIA GT200" },␊ |
540 | ␉{ 0x10DE05F5,␉"NVIDIA GT200" },␊ |
541 | ␉{ 0x10DE05F6,␉"NVIDIA GT200" },␊ |
542 | ␉{ 0x10DE05F7,␉"NVIDIA GT200" },␊ |
543 | ␉{ 0x10DE05F8,␉"Quadroplex 2200 S4" },␊ |
544 | ␉{ 0x10DE05F9,␉"NVIDIA Quadro CX" },␊ |
545 | ␉{ 0x10DE05FA,␉"NVIDIA GT200" },␊ |
546 | ␉{ 0x10DE05FB,␉"NVIDIA GT200" },␊ |
547 | ␉{ 0x10DE05FC,␉"NVIDIA GT200" },␊ |
548 | ␉{ 0x10DE05FD,␉"Quadro FX 5800" },␊ |
549 | ␉{ 0x10DE05FE,␉"Quadro FX 4800" },␊ |
550 | ␉{ 0x10DE05FF,␉"Quadro FX 3800" },␊ |
551 | ␉// 0600 - 060F␊ |
552 | ␉{ 0x10DE0600,␉"GeForce 8800 GTS" },␊ |
553 | ␉{ 0x10DE0601,␉"GeForce 9800 GT" },␊ |
554 | ␉{ 0x10DE0602,␉"GeForce 8800 GT" },␊ |
555 | ␉{ 0x10DE0603,␉"GeForce GT 230" },␊ |
556 | ␉{ 0x10DE0604,␉"GeForce 9800 GX2" },␊ |
557 | ␉{ 0x10DE0605,␉"GeForce 9800 GT" },␊ |
558 | ␉{ 0x10DE0606,␉"GeForce 8800 GS" },␊ |
559 | ␉{ 0x10DE0607,␉"GeForce GTS 240" },␊ |
560 | ␉{ 0x10DE0608,␉"GeForce 9800M GTX" },␊ |
561 | ␉{ 0x10DE0609,␉"GeForce 8800M GTS" },␊ |
562 | ␉{ 0x10DE060A,␉"GeForce GTX 280M" },␊ |
563 | ␉{ 0x10DE060B,␉"GeForce 9800M GT" },␊ |
564 | ␉{ 0x10DE060C,␉"GeForce 8800M GTX" },␊ |
565 | ␉{ 0x10DE060D,␉"GeForce 8800 GS" },␊ |
566 | ␉{ 0x10DE060F,␉"GeForce GTX 285M" },␊ |
567 | ␉// 0610 - 061F␊ |
568 | ␉{ 0x10DE0610,␉"GeForce 9600 GSO" },␊ |
569 | ␉{ 0x10DE0611,␉"GeForce 8800 GT" },␊ |
570 | ␉{ 0x10DE0612,␉"GeForce 9800 GTX" },␊ |
571 | ␉{ 0x10DE0613,␉"GeForce 9800 GTX+" },␊ |
572 | ␉{ 0x10DE0614,␉"GeForce 9800 GT" },␊ |
573 | ␉{ 0x10DE0615,␉"GeForce GTS 250" },␊ |
574 | ␉{ 0x10DE0617,␉"GeForce 9800M GTX" },␊ |
575 | ␉{ 0x10DE0618,␉"GeForce GTX 260M" },␊ |
576 | ␉{ 0x10DE0619,␉"Quadro FX 4700 X2" },␊ |
577 | ␉{ 0x10DE061A,␉"Quadro FX 3700" },␊ |
578 | ␉{ 0x10DE061B,␉"Quadro VX 200" },␊ |
579 | ␉{ 0x10DE061C,␉"Quadro FX 3600M" },␊ |
580 | ␉{ 0x10DE061D,␉"Quadro FX 2800M" },␊ |
581 | ␉{ 0x10DE061E,␉"Quadro FX 3700M" },␊ |
582 | ␉{ 0x10DE061F,␉"Quadro FX 3800M" },␊ |
583 | ␉// 0620 - 062F␊ |
584 | ␉{ 0x10DE0620,␉"NVIDIA G94" },␊ |
585 | ␉{ 0x10DE0621,␉"GeForce GT 230" },␊ |
586 | ␉{ 0x10DE0622,␉"GeForce 9600 GT" },␊ |
587 | ␉{ 0x10DE0623,␉"GeForce 9600 GS" },␊ |
588 | ␉{ 0x10DE0624,␉"NVIDIA G94" },␊ |
589 | ␉{ 0x10DE0625,␉"GeForce 9600 GSO 512"},␊ |
590 | ␉{ 0x10DE0626,␉"GeForce GT 130" },␊ |
591 | ␉{ 0x10DE0627,␉"GeForce GT 140" },␊ |
592 | ␉{ 0x10DE0628,␉"GeForce 9800M GTS" },␊ |
593 | ␉{ 0x10DE0629,␉"NVIDIA G94" },␊ |
594 | ␉{ 0x10DE062A,␉"GeForce 9700M GTS" },␊ |
595 | ␉{ 0x10DE062B,␉"GeForce 9800M GS" },␊ |
596 | ␉{ 0x10DE062C,␉"GeForce 9800M GTS" },␊ |
597 | ␉{ 0x10DE062D,␉"GeForce 9600 GT" },␊ |
598 | ␉{ 0x10DE062E,␉"GeForce 9600 GT" },␊ |
599 | ␉{ 0x10DE062F,␉"GeForce 9800 S" },␊ |
600 | ␉// 0630 - 063F␊ |
601 | ␉{ 0x10DE0630,␉"GeForce 9700 S" },␊ |
602 | ␉{ 0x10DE0631,␉"GeForce GTS 160M" },␊ |
603 | ␉{ 0x10DE0632,␉"GeForce GTS 150M" },␊ |
604 | ␉{ 0x10DE0633,␉"NVIDIA G94" },␊ |
605 | ␉{ 0x10DE0634,␉"NVIDIA G94" },␊ |
606 | ␉{ 0x10DE0635,␉"GeForce 9600 GSO" },␊ |
607 | ␉{ 0x10DE0636,␉"NVIDIA G94" },␊ |
608 | ␉{ 0x10DE0637,␉"GeForce 9600 GT" },␊ |
609 | ␉{ 0x10DE0638,␉"Quadro FX 1800" },␊ |
610 | ␉{ 0x10DE0639,␉"NVIDIA G94" },␊ |
611 | ␉{ 0x10DE063A,␉"Quadro FX 2700M" },␊ |
612 | ␉{ 0x10DE063B,␉"NVIDIA G94" },␊ |
613 | ␉{ 0x10DE063C,␉"NVIDIA G94" },␊ |
614 | ␉{ 0x10DE063D,␉"NVIDIA G94" },␊ |
615 | ␉{ 0x10DE063E,␉"NVIDIA G94" },␊ |
616 | ␉{ 0x10DE063F,␉"NVIDIA G94" },␊ |
617 | ␉// 0640 - 064F␊ |
618 | ␉{ 0x10DE0640,␉"GeForce 9500 GT" },␊ |
619 | ␉{ 0x10DE0641,␉"GeForce 9400 GT" },␊ |
620 | ␉{ 0x10DE0642,␉"GeForce 8400 GS" },␊ |
621 | ␉{ 0x10DE0643,␉"GeForce 9500 GT" },␊ |
622 | ␉{ 0x10DE0644,␉"GeForce 9500 GS" },␊ |
623 | ␉{ 0x10DE0645,␉"GeForce 9500 GS" },␊ |
624 | ␉{ 0x10DE0646,␉"GeForce GT 120" },␊ |
625 | ␉{ 0x10DE0647,␉"GeForce 9600M GT" },␊ |
626 | ␉{ 0x10DE0648,␉"GeForce 9600M GS" },␊ |
627 | ␉{ 0x10DE0649,␉"GeForce 9600M GT" },␊ |
628 | ␉{ 0x10DE064A,␉"GeForce 9700M GT" },␊ |
629 | ␉{ 0x10DE064B,␉"GeForce 9500M G" },␊ |
630 | ␉{ 0x10DE064C,␉"GeForce 9650M GT" },␊ |
631 | ␉// 0650 - 065F␊ |
632 | ␉{ 0x10DE0650,␉"NVIDIA G96-825" },␊ |
633 | ␉{ 0x10DE0651,␉"GeForce G 110M" },␊ |
634 | ␉{ 0x10DE0652,␉"GeForce GT 130M" },␊ |
635 | ␉{ 0x10DE0653,␉"GeForce GT 120M" },␊ |
636 | ␉{ 0x10DE0654,␉"GeForce GT 220M" },␊ |
637 | ␉{ 0x10DE0655,␉"GeForce GT 120" },␊ |
638 | ␉{ 0x10DE0656,␉"GeForce 9650 S" },␊ |
639 | ␉{ 0x10DE0657,␉"NVIDIA G96" },␊ |
640 | ␉{ 0x10DE0658,␉"Quadro FX 380" },␊ |
641 | ␉{ 0x10DE0659,␉"Quadro FX 580" },␊ |
642 | ␉{ 0x10DE065A,␉"Quadro FX 1700M" },␊ |
643 | ␉{ 0x10DE065B,␉"GeForce 9400 GT" },␊ |
644 | ␉{ 0x10DE065C,␉"Quadro FX 770M" },␊ |
645 | ␉{ 0x10DE065D,␉"NVIDIA G96" },␊ |
646 | ␉{ 0x10DE065E,␉"NVIDIA G96" },␊ |
647 | ␉{ 0x10DE065F,␉"GeForce G210" },␊ |
648 | ␉// 0660 - 066F␊ |
649 | ␉// 0670 - 067F␊ |
650 | ␉// 0680 - 068F␊ |
651 | ␉// 0690 - 069F␊ |
652 | ␉// 06A0 - 06AF␊ |
653 | ␉{ 0x10DE06A0,␉"NVIDIA GT214" },␊ |
654 | ␉// 06B0 - 06BF␊ |
655 | ␉{ 0x10DE06B0,␉"NVIDIA GT214" },␊ |
656 | ␉// 06C0 - 06CF␊ |
657 | ␉{ 0x10DE06C0,␉"GeForce GTX 480" },␊ |
658 | ␉{ 0x10DE06C3,␉"GeForce GTX D12U" },␊ |
659 | ␉{ 0x10DE06C4,␉"GeForce GTX 465" },␊ |
660 | ␉{ 0x10DE06CA,␉"GeForce GTX 480M" },␊ |
661 | ␉{ 0x10DE06CD,␉"GeForce GTX 470" },␊ |
662 | ␉// 06D0 - 06DF␊ |
663 | ␉{ 0x10DE06D1,␉"Tesla C2050" },␊ |
664 | ␉{ 0x10DE06D2,␉"Tesla M2070" },␊ |
665 | ␉{ 0x10DE06D8,␉"Quadro 6000" },␊ |
666 | ␉{ 0x10DE06D9,␉"Quadro 5000" },␊ |
667 | ␉{ 0x10DE06DA,␉"Quadro 5000M" },␊ |
668 | ␉{ 0x10DE06DC,␉"Quadro 6000" },␊ |
669 | ␉{ 0x10DE06DD,␉"Quadro 4000" },␊ |
670 | ␉{ 0x10DE06DE,␉"Tesla M2050" },␊ |
671 | ␉{ 0x10DE06DF,␉"Tesla M2070-Q" },␊ |
672 | ␉// 06E0 - 06EF␊ |
673 | ␉{ 0x10DE06E0,␉"GeForce 9300 GE" },␊ |
674 | ␉{ 0x10DE06E1,␉"GeForce 9300 GS" },␊ |
675 | ␉{ 0x10DE06E2,␉"GeForce 8400" },␊ |
676 | ␉{ 0x10DE06E3,␉"GeForce 8400 SE" },␊ |
677 | ␉{ 0x10DE06E4,␉"GeForce 8400 GS" },␊ |
678 | ␉{ 0x10DE06E5,␉"GeForce 9300M GS" },␊ |
679 | ␉{ 0x10DE06E6,␉"GeForce G100" },␊ |
680 | ␉{ 0x10DE06E7,␉"GeForce 9300 SE" },␊ |
681 | ␉{ 0x10DE06E8,␉"GeForce 9200M GE" },␊ |
682 | ␉{ 0x10DE06E9,␉"GeForce 9300M GS" },␊ |
683 | ␉{ 0x10DE06EA,␉"Quadro NVS 150M" },␊ |
684 | ␉{ 0x10DE06EB,␉"Quadro NVS 160M" },␊ |
685 | ␉{ 0x10DE06EC,␉"GeForce G 105M" },␊ |
686 | ␉{ 0x10DE06ED,␉"NVIDIA G98" },␊ |
687 | ␉{ 0x10DE06EF,␉"GeForce G 103M" },␊ |
688 | ␉// 06F0 - 06FF␊ |
689 | ␉{ 0x10DE06F0,␉"NVIDIA G98" },␊ |
690 | ␉{ 0x10DE06F1,␉"GeForce G105M" },␊ |
691 | ␉{ 0x10DE06F2,␉"NVIDIA G98" },␊ |
692 | ␉{ 0x10DE06F3,␉"NVIDIA G98" },␊ |
693 | ␉{ 0x10DE06F4,␉"NVIDIA G98" },␊ |
694 | ␉{ 0x10DE06F5,␉"NVIDIA G98" },␊ |
695 | ␉{ 0x10DE06F6,␉"NVIDIA G98" },␊ |
696 | ␉{ 0x10DE06F7,␉"NVIDIA G98" },␊ |
697 | ␉{ 0x10DE06F8,␉"Quadro NVS 420" },␊ |
698 | ␉{ 0x10DE06F9,␉"Quadro FX 370 LP" },␊ |
699 | ␉{ 0x10DE06FA,␉"Quadro NVS 450" },␊ |
700 | ␉{ 0x10DE06FB,␉"Quadro FX 370M" },␊ |
701 | ␉{ 0x10DE06FC,␉"NVIDIA G98" },␊ |
702 | ␉{ 0x10DE06FD,␉"Quadro NVS 295" },␊ |
703 | ␉{ 0x10DE06FE,␉"NVIDIA G98" },␊ |
704 | ␉{ 0x10DE06FF,␉"HICx16 + Graphics" },␊ |
705 | ␉// 0700 - 070F␊ |
706 | ␉// 0710 - 071F␊ |
707 | ␉// 0720 - 072F␊ |
708 | ␉// 0730 - 073F␊ |
709 | ␉// 0740 - 074F␊ |
710 | ␉// 0750 - 075F␊ |
711 | ␉// 0760 - 076F␊ |
712 | ␉// 0770 - 077F␊ |
713 | ␉// 0780 - 078F␊ |
714 | ␉// 0790 - 079F␊ |
715 | ␉// 07A0 - 07AF␊ |
716 | ␉// 07B0 - 07BF␊ |
717 | ␉// 07C0 - 07CF␊ |
718 | ␉// 07D0 - 07DF␊ |
719 | ␉// 07E0 - 07EF␊ |
720 | ␉{ 0x10DE07E0,␉"GeForce 7150 / nForce 630i" },␊ |
721 | ␉{ 0x10DE07E1,␉"GeForce 7100 / nForce 630i" },␊ |
722 | ␉{ 0x10DE07E2,␉"GeForce 7050 / nForce 630i" },␊ |
723 | ␉{ 0x10DE07E3,␉"GeForce 7050 / nForce 610i" },␊ |
724 | ␉{ 0x10DE07E5,␉"GeForce 7050 / nForce 620i" },␊ |
725 | ␉// 07F0 - 07FF␊ |
726 | ␉// 0800 - 080F␊ |
727 | ␉// 0810 - 081F␊ |
728 | ␉// 0820 - 082F␊ |
729 | ␉// 0830 - 083F␊ |
730 | ␉// 0840 - 084F␊ |
731 | ␉{ 0x10DE0840,␉"GeForce 8200M" },␊ |
732 | ␉{ 0x10DE0844,␉"GeForce 9100M G" },␊ |
733 | ␉{ 0x10DE0845,␉"GeForce 8200M G" },␊ |
734 | ␉{ 0x10DE0846,␉"GeForce 9200" },␊ |
735 | ␉{ 0x10DE0847,␉"GeForce 9100" },␊ |
736 | ␉{ 0x10DE0848,␉"GeForce 8300" },␊ |
737 | ␉{ 0x10DE0849,␉"GeForce 8200" },␊ |
738 | ␉{ 0x10DE084A,␉"nForce 730a" },␊ |
739 | ␉{ 0x10DE084B,␉"GeForce 9200" },␊ |
740 | ␉{ 0x10DE084C,␉"nForce 980a/780a SLI" },␊ |
741 | ␉{ 0x10DE084D,␉"nForce 750a SLI" },␊ |
742 | ␉{ 0x10DE084F,␉"GeForce 8100 / nForce 720a" },␊ |
743 | ␉// 0850 - 085F␊ |
744 | ␉// 0860 - 086F␊ |
745 | ␉{ 0x10DE0860,␉"GeForce 9300" },␊ |
746 | ␉{ 0x10DE0861,␉"GeForce 9400" },␊ |
747 | ␉{ 0x10DE0862,␉"GeForce 9400M G" },␊ |
748 | ␉{ 0x10DE0863,␉"GeForce 9400M" },␊ |
749 | ␉{ 0x10DE0864,␉"GeForce 9300" },␊ |
750 | ␉{ 0x10DE0865,␉"GeForce 9300" },␊ |
751 | ␉{ 0x10DE0866,␉"GeForce 9400M G" },␊ |
752 | ␉{ 0x10DE0867,␉"GeForce 9400" },␊ |
753 | ␉{ 0x10DE0868,␉"nForce 760i SLI" },␊ |
754 | ␉{ 0x10DE0869,␉"GeForce 9400" },␊ |
755 | ␉{ 0x10DE086A,␉"GeForce 9400" },␊ |
756 | ␉{ 0x10DE086C,␉"GeForce 9300 / nForce 730i" },␊ |
757 | ␉{ 0x10DE086D,␉"GeForce 9200" },␊ |
758 | ␉{ 0x10DE086E,␉"GeForce 9100M G" },␊ |
759 | ␉{ 0x10DE086F,␉"GeForce 8200M G" },␊ |
760 | ␉// 0870 - 087F␊ |
761 | ␉{ 0x10DE0870,␉"GeForce 9400M" },␊ |
762 | ␉{ 0x10DE0871,␉"GeForce 9200" },␊ |
763 | ␉{ 0x10DE0872,␉"GeForce G102M" },␊ |
764 | ␉{ 0x10DE0873,␉"GeForce G205M" },␊ |
765 | ␉{ 0x10DE0874,␉"ION 9300M" },␊ |
766 | ␉{ 0x10DE0876,␉"ION 9400M" },␊ |
767 | ␉{ 0x10DE087A,␉"GeForce 9400" },␊ |
768 | ␉{ 0x10DE087D,␉"ION 9400M" },␊ |
769 | ␉{ 0x10DE087E,␉"ION LE" },␊ |
770 | ␉{ 0x10DE087F,␉"ION LE" }, // Tesla M2070-Q ??␊ |
771 | ␉// 0880 - 088F␊ |
772 | ␉// 0890 - 089F␊ |
773 | ␉// 08A0 - 08AF␊ |
774 | ␉{ 0x10DE08A0,␉"GeForce 320M" },␊ |
775 | ␉{ 0x10DE08A1,␉"MCP89-MZT" },␊ |
776 | ␉{ 0x10DE08A2,␉"GeForce 320M" },␊ |
777 | ␉{ 0x10DE08A3,␉"GeForce 320M" },␊ |
778 | ␉{ 0x10DE08A4,␉"GeForce 320M" },␊ |
779 | ␉{ 0x10DE08A5,␉"GeForce 320M" },␊ |
780 | ␉// 08B0 - 08BF␊ |
781 | ␉{ 0x10DE08B0,␉"MCP83 MMD" },␊ |
782 | ␉{ 0x10DE08B1,␉"GeForce 300M" },␊ |
783 | ␉{ 0x10DE08B2,␉"GeForce 300M" }, // MCP83-MJ␊ |
784 | ␉{ 0x10DE08B3,␉"MCP89 MM9" },␊ |
785 | ␉// 08C0 - 08CF␊ |
786 | ␉// 08D0 - 08DF␊ |
787 | ␉// 08E0 - 08EF␊ |
788 | ␉// 08F0 - 08FF␊ |
789 | ␉// 0900 - 090F␊ |
790 | ␉// 0910 - 091F␊ |
791 | ␉// 0920 - 092F␊ |
792 | ␉// 0930 - 093F␊ |
793 | ␉// 0940 - 094F␊ |
794 | ␉// 0950 - 095F␊ |
795 | ␉// 0960 - 096F␊ |
796 | ␉// 0970 - 097F␊ |
797 | ␉// 0980 - 098F␊ |
798 | ␉// 0990 - 099F␊ |
799 | ␉// 09A0 - 09AF␊ |
800 | ␉// 09B0 - 09BF␊ |
801 | ␉// 09C0 - 09CF␊ |
802 | ␉// 09D0 - 09DF␊ |
803 | ␉// 09E0 - 09EF␊ |
804 | ␉// 09F0 - 09FF␊ |
805 | ␉// 0A00 - 0A0F␊ |
806 | ␉// { 0x10DE0A00,␉"NVIDIA GT212" },␊ |
807 | ␉// 0A10 - 0A1F␊ |
808 | ␉// { 0x10DE0A10,␉"NVIDIA GT212" },␊ |
809 | ␉// 0A20 - 0A2F␊ |
810 | ␉{ 0x10DE0A20,␉"GeForce GT 220" },␊ |
811 | ␉{ 0x10DE0A21,␉"D10M2-20" },␊ |
812 | ␉{ 0x10DE0A22,␉"GeForce 315" },␊ |
813 | ␉{ 0x10DE0A23,␉"GeForce 210" },␊ |
814 | ␉{ 0x10DE0A26,␉"GeForce 405" },␊ |
815 | ␉{ 0x10DE0A27,␉"GeForce 405" },␊ |
816 | ␉{ 0x10DE0A28,␉"GeForce GT 230" },␊ |
817 | ␉{ 0x10DE0A29,␉"GeForce GT 330M" },␊ |
818 | ␉{ 0x10DE0A2A,␉"GeForce GT 230M" },␊ |
819 | ␉{ 0x10DE0A2B,␉"GeForce GT 330M" },␊ |
820 | ␉{ 0x10DE0A2C,␉"NVS 5100M" },␊ |
821 | ␉{ 0x10DE0A2D,␉"GeForce GT 320M" },␊ |
822 | ␉// 0A30 - 0A3F␊ |
823 | ␉{ 0x10DE0A30,␉"GeForce GT 330M" },␊ |
824 | ␉{ 0x10DE0A32,␉"GeForce GT 415" },␊ |
825 | ␉{ 0x10DE0A34,␉"GeForce GT 240M" },␊ |
826 | ␉{ 0x10DE0A35,␉"GeForce GT 325M" },␊ |
827 | ␉{ 0x10DE0A38,␉"Quadro 400" },␊ |
828 | ␉{ 0x10DE0A3C,␉"Quadro FX 880M" },␊ |
829 | ␉{ 0x10DE0A3D,␉"N10P-ES" },␊ |
830 | ␉{ 0x10DE0A3F,␉"GT216-INT" },␊ |
831 | ␉// 0A40 - 0A4F␊ |
832 | ␉// 0A50 - 0A5F␊ |
833 | ␉// 0A60 - 0A6F␊ |
834 | ␉{ 0x10DE0A60,␉"GeForce G210" },␊ |
835 | ␉{ 0x10DE0A61,␉"NVS 2100" },␊ |
836 | ␉{ 0x10DE0A62,␉"GeForce 205" },␊ |
837 | ␉{ 0x10DE0A63,␉"GeForce 310" },␊ |
838 | ␉{ 0x10DE0A64,␉"ION" },␊ |
839 | ␉{ 0x10DE0A65,␉"GeForce 210" },␊ |
840 | ␉{ 0x10DE0A66,␉"GeForce 310" },␊ |
841 | ␉{ 0x10DE0A67,␉"GeForce 315" },␊ |
842 | ␉{ 0x10DE0A68,␉"GeForce G105M" },␊ |
843 | ␉{ 0x10DE0A69,␉"GeForce G105M" },␊ |
844 | ␉{ 0x10DE0A6A,␉"NVS 2100M" },␊ |
845 | ␉{ 0x10DE0A6C,␉"NVS 3100M" },␊ |
846 | ␉{ 0x10DE0A6E,␉"GeForce 305M" },␊ |
847 | ␉{ 0x10DE0A6F,␉"ION" },␊ |
848 | ␉// 0A70 - 0A7F␊ |
849 | ␉{ 0x10DE0A70,␉"GeForce 310M" },␊ |
850 | ␉{ 0x10DE0A71,␉"GeForce 305M" },␊ |
851 | ␉{ 0x10DE0A72,␉"GeForce 310M" },␊ |
852 | ␉{ 0x10DE0A73,␉"GeForce 305M" },␊ |
853 | ␉{ 0x10DE0A74,␉"GeForce G210M" },␊ |
854 | ␉{ 0x10DE0A75,␉"GeForce G310M" },␊ |
855 | ␉{ 0x10DE0A76,␉"ION" },␊ |
856 | ␉{ 0x10DE0A78,␉"Quadro FX 380 LP" },␊ |
857 | ␉// { 0x10DE0A79,␉"N12M-NS-S" },␊ |
858 | ␉{ 0x10DE0A7A,␉"GeForce 315M" },␊ |
859 | ␉{ 0x10DE0A7B,␉"GeForce 505" },␊ |
860 | ␉{ 0x10DE0A7C,␉"Quadro FX 380M" },␊ |
861 | ␉{ 0x10DE0A7D,␉"N11M-ES" }, //SUBIDS␊ |
862 | ␉{ 0x10DE0A7E,␉"GT218-INT-S" },␊ |
863 | ␉{ 0x10DE0A7F,␉"GT218-INT-B" },␊ |
864 | ␉// 0A80 - 0A8F␊ |
865 | ␉// 0A90 - 0A9F␊ |
866 | ␉// 0AA0 - 0AAF␊ |
867 | ␉// 0AB0 - 0ABF␊ |
868 | ␉// 0AC0 - 0ACF␊ |
869 | ␉// 0AD0 - 0ADF␊ |
870 | ␉// 0AE0 - 0AEF␊ |
871 | ␉// 0AF0 - 0AFF␊ |
872 | ␉// 0B00 - 0B0F␊ |
873 | ␉// 0B10 - 0B1F␊ |
874 | ␉// 0B20 - 0B2F␊ |
875 | ␉// 0B30 - 0B3F␊ |
876 | ␉// 0B40 - 0B4F␊ |
877 | ␉// 0B50 - 0B5F␊ |
878 | ␉// 0B60 - 0B6F␊ |
879 | ␉// 0B70 - 0B7F␊ |
880 | ␉// 0B80 - 0B8F␊ |
881 | ␉// 0B90 - 0B9F␊ |
882 | ␉// 0BA0 - 0BAF␊ |
883 | ␉// 0BB0 - 0BBF␊ |
884 | ␉// 0BC0 - 0BCF␊ |
885 | ␉// 0BD0 - 0BDF␊ |
886 | ␉// 0BE0 - 0BEF␊ |
887 | ␉// 0BF0 - 0BFF␊ |
888 | ␉// 0C00 - 0C0F␊ |
889 | ␉// 0C10 - 0C1F␊ |
890 | ␉// 0C20 - 0C2F␊ |
891 | ␉// 0C30 - 0C3F␊ |
892 | ␉// 0C40 - 0C4F␊ |
893 | ␉// 0C50 - 0C5F␊ |
894 | ␉// 0C60 - 0C6F␊ |
895 | ␉// 0C70 - 0C7F␊ |
896 | ␉// 0C80 - 0C8F␊ |
897 | ␉// 0C90 - 0C9F␊ |
898 | ␉// 0CA0 - 0CAF␊ |
899 | ␉{ 0x10DE0CA0,␉"GeForce GT 330 " },␊ |
900 | ␉{ 0x10DE0CA2,␉"GeForce GT 320" },␊ |
901 | ␉{ 0x10DE0CA3,␉"GeForce GT 240" },␊ |
902 | ␉{ 0x10DE0CA4,␉"GeForce GT 340" },␊ |
903 | ␉{ 0x10DE0CA5,␉"GeForce GT 220" },␊ |
904 | ␉{ 0x10DE0CA7,␉"GeForce GT 330" },␊ |
905 | ␉{ 0x10DE0CA8,␉"GeForce GTS 260M" },␊ |
906 | ␉{ 0x10DE0CA9,␉"GeForce GTS 250M" },␊ |
907 | ␉{ 0x10DE0CAC,␉"GeForce GT 220" },␊ |
908 | ␉{ 0x10DE0CAD,␉"N10E-ES" }, // SUBIDS␊ |
909 | ␉{ 0x10DE0CAE,␉"GT215-INT" },␊ |
910 | ␉{ 0x10DE0CAF,␉"GeForce GT 335M" },␊ |
911 | ␉// 0CB0 - 0CBF␊ |
912 | ␉{ 0x10DE0CB0,␉"GeForce GTS 350M" },␊ |
913 | ␉{ 0x10DE0CB1,␉"GeForce GTS 360M" },␊ |
914 | ␉{ 0x10DE0CBC,␉"Quadro FX 1800M" },␊ |
915 | ␉// 0CC0 - 0CCF␊ |
916 | ␉// 0CD0 - 0CDF␊ |
917 | ␉// 0CE0 - 0CEF␊ |
918 | ␉// 0CF0 - 0CFF␊ |
919 | ␉// 0D00 - 0D0F␊ |
920 | ␉// 0D10 - 0D1F␊ |
921 | ␉// 0D20 - 0D2F␊ |
922 | ␉// 0D30 - 0D3F␊ |
923 | ␉// 0D40 - 0D4F␊ |
924 | ␉// 0D50 - 0D5F␊ |
925 | ␉// 0D60 - 0D6F␊ |
926 | ␉// 0D70 - 0D7F␊ |
927 | ␉// 0D80 - 0D8F␊ |
928 | ␉// 0D90 - 0D9F␊ |
929 | ␉// 0DA0 - 0DAF␊ |
930 | ␉// 0DB0 - 0DBF␊ |
931 | ␉// 0DC0 - 0DCF␊ |
932 | ␉{ 0x10DE0DC0,␉"GeForce GT 440" },␊ |
933 | ␉// { 0x10DE0DC1,␉"D12-P1-35" },␊ |
934 | ␉// { 0x10DE0DC2,␉"D12-P1-35" },␊ |
935 | ␉{ 0x10DE0DC4,␉"GeForce GTS 450" },␊ |
936 | ␉{ 0x10DE0DC5,␉"GeForce GTS 450" },␊ |
937 | ␉{ 0x10DE0DC6,␉"GeForce GTS 450" },␊ |
938 | ␉// { 0x10DE0DCA,␉"GF10x" },␊ |
939 | ␉// { 0x10DE0DCC,␉"N12E-GS" },␊ |
940 | ␉{ 0x10DE0DCD,␉"GeForce GT 555M" },␊ |
941 | ␉{ 0x10DE0DCE,␉"GeForce GT 555M" },␊ |
942 | ␉// { 0x10DE0DCF,␉"N12P-GT-B" },␊ |
943 | ␉// 0DD0 - 0DDF␊ |
944 | ␉{ 0x10DE0DD0,␉"N11E-GT" },␊ |
945 | ␉{ 0x10DE0DD1,␉"GeForce GTX 460M" },␊ |
946 | ␉{ 0x10DE0DD2,␉"GeForce GT 445M" },␊ |
947 | ␉{ 0x10DE0DD3,␉"GeForce GT 435M" },␊ |
948 | ␉{ 0x10DE0DD6,␉"GeForce GT 550M" },␊ |
949 | ␉{ 0x10DE0DD8,␉"Quadro 2000" },␊ |
950 | ␉{ 0x10DE0DDA,␉"Quadro 2000M" },␊ |
951 | ␉{ 0x10DE0DDE,␉"GF106-ES" },␊ |
952 | ␉{ 0x10DE0DDF,␉"GF106-INT" },␊ |
953 | ␉// 0DE0 - 0DEF␊ |
954 | ␉{ 0x10DE0DE0,␉"GeForce GT 440" },␊ |
955 | ␉{ 0x10DE0DE1,␉"GeForce GT 430" },␊ |
956 | ␉{ 0x10DE0DE2,␉"GeForce GT 420" },␊ |
957 | ␉{ 0x10DE0DE3,␉"GeForce GT 635M" },␊ |
958 | ␉{ 0x10DE0DE4,␉"GeForce GT 520" },␊ |
959 | ␉{ 0x10DE0DE5,␉"GeForce GT 530" },␊ |
960 | ␉{ 0x10DE0DE8,␉"GeForce GT 620M" },␊ |
961 | ␉{ 0x10DE0DE9,␉"GeForce GT 630M" },␊ |
962 | ␉{ 0x10DE0DEA,␉"GeForce GT 610M" },␊ |
963 | ␉{ 0x10DE0DEB,␉"GeForce GT 555M" },␊ |
964 | ␉{ 0x10DE0DEC,␉"GeForce GT 525M" },␊ |
965 | ␉{ 0x10DE0DED,␉"GeForce GT 520M" },␊ |
966 | ␉{ 0x10DE0DEE,␉"GeForce GT 415M" },␊ |
967 | ␉{ 0x10DE0DEF,␉"NVS 5400M" },␊ |
968 | ␉// 0DF0 - 0DFF␊ |
969 | ␉{ 0x10DE0DF0,␉"GeForce GT 425M" },␊ |
970 | ␉{ 0x10DE0DF1,␉"GeForce GT 420M" },␊ |
971 | ␉{ 0x10DE0DF2,␉"GeForce GT 435M" },␊ |
972 | ␉{ 0x10DE0DF3,␉"GeForce GT 420M" },␊ |
973 | ␉{ 0x10DE0DF4,␉"GeForce GT 540M" },␊ |
974 | ␉{ 0x10DE0DF5,␉"GeForce GT 525M" },␊ |
975 | ␉{ 0x10DE0DF6,␉"GeForce GT 550M" },␊ |
976 | ␉{ 0x10DE0DF7,␉"GeForce GT 520M" },␊ |
977 | ␉{ 0x10DE0DF8,␉"Quadro 600" },␊ |
978 | ␉{ 0x10DE0DF9,␉"Quadro 500M" },␊ |
979 | ␉{ 0x10DE0DFA,␉"Quadro 1000M" },␊ |
980 | ␉{ 0x10DE0DFC,␉"NVS 5200M" },␊ |
981 | ␉{ 0x10DE0DFE,␉"GF108 ES" },␊ |
982 | ␉{ 0x10DE0DFF,␉"GF108 INT" },␊ |
983 | ␉// 0E00 - 0E0F␊ |
984 | ␉// 0E10 - 0E1F␊ |
985 | ␉// 0E20 - 0E2F␊ |
986 | ␉{ 0x10DE0E21,␉"D12U-25" },␊ |
987 | ␉{ 0x10DE0E22,␉"GeForce GTX 460" },␊ |
988 | ␉{ 0x10DE0E23,␉"GeForce GTX 460 SE" },␊ |
989 | ␉{ 0x10DE0E24,␉"GeForce GTX 460" },␊ |
990 | ␉{ 0x10DE0E25,␉"D12U-50" },␊ |
991 | ␉{ 0x10DE0E28,␉"GeForce GTX 460" },␊ |
992 | ␉// 0E30 - 0E3F␊ |
993 | ␉{ 0x10DE0E30,␉"GeForce GTX 470M" },␊ |
994 | ␉{ 0x10DE0E31,␉"GeForce GTX 485M" },␊ |
995 | ␉{ 0x10DE0E32,␉"N12E-GT" },␊ |
996 | ␉{ 0x10DE0E38,␉"GF104GL" },␊ |
997 | ␉{ 0x10DE0E3A,␉"Quadro 3000M" },␊ |
998 | ␉{ 0x10DE0E3B,␉"Quadro 4000M" },␊ |
999 | ␉{ 0x10DE0E3E,␉"GF104-ES" },␊ |
1000 | ␉{ 0x10DE0E3F,␉"GF104-INT" },␊ |
1001 | ␉// 0E40 - 0E4F␊ |
1002 | ␉// 0E50 - 0E5F␊ |
1003 | ␉// 0E60 - 0E6F␊ |
1004 | ␉// 0E70 - 0E7F␊ |
1005 | ␉// 0E80 - 0E8F␊ |
1006 | ␉// 0E90 - 0E9F␊ |
1007 | ␉// 0EA0 - 0EAF␊ |
1008 | ␉// 0EB0 - 0EBF␊ |
1009 | ␉// 0EC0 - 0ECF␊ |
1010 | ␉// 0ED0 - 0EDF␊ |
1011 | ␉// 0EE0 - 0EEF␊ |
1012 | ␉// 0EF0 - 0EFF␊ |
1013 | ␉// 0F00 - 0F0F␊ |
1014 | ␉{ 0x10DE0F00,␉"GeForce GT 630" },␊ |
1015 | ␉{ 0x10DE0F01,␉"GeForce GT 620" },␊ |
1016 | ␉{ 0x10DE0F02,␉"GeForce GT 730" },␊ |
1017 | ␉// 0F10 - 0F1F␊ |
1018 | ␉// 0F20 - 0F2F␊ |
1019 | ␉// 0F30 - 0F3F␊ |
1020 | ␉// 0F40 - 0F4F␊ |
1021 | ␉// 0F50 - 0F5F␊ |
1022 | ␉// 0F60 - 0F6F␊ |
1023 | ␉// 0F70 - 0F7F␊ |
1024 | ␉// 0F80 - 0F8F␊ |
1025 | ␉// 0F90 - 0F9F␊ |
1026 | ␉// 0FA0 - 0FAF␊ |
1027 | ␉// 0FB0 - 0FBF␊ |
1028 | ␉{ 0x10DE0FBB,␉"GeForce GTX 970" },␊ |
1029 | ␉// 0FC0 - 0FCF␊ |
1030 | ␉{ 0x10DE0FC0,␉"GeForce GT 640" },␊ |
1031 | ␉{ 0x10DE0FC1,␉"GeForce GT 640" },␊ |
1032 | ␉{ 0x10DE0FC2,␉"GeForce GT 630" },␊ |
1033 | ␉{ 0x10DE0FC6,␉"GeForce GTX 650" },␊ |
1034 | ␉{ 0x10DE0FC8,␉"GeForce GT 740" },␊ |
1035 | ␉{ 0x10DE0FCD,␉"GeForce GT 755M" },␊ |
1036 | ␉{ 0x10DE0FCE,␉"GeForce GT 640M LE" },␊ |
1037 | ␉// 0FD0 - 0FDF␊ |
1038 | ␉{ 0x10DE0FD1,␉"GeForce GT 650M" },␊ |
1039 | ␉{ 0x10DE0FD2,␉"GeForce GT 640M" },␊ |
1040 | ␉{ 0x10DE0FD3,␉"GeForce GT 640M LE" },␊ |
1041 | ␉{ 0x10DE0FD4,␉"GeForce GTX 660M" },␊ |
1042 | ␉{ 0x10DE0FD5,␉"GeForce GT 650M" },␊ |
1043 | ␉{ 0x10DE0FD8,␉"GeForce GT 640M" },␊ |
1044 | ␉{ 0x10DE0FD9,␉"GeForce GT 645M" },␊ |
1045 | ␉{ 0x10DE0FDA,␉"GK107-ES-A1" },␊ |
1046 | ␉{ 0x10DE0FDB,␉"GK107-ESP-A1" },␊ |
1047 | ␉{ 0x10DE0FDC,␉"GK107-INT22-A1" },␊ |
1048 | ␉{ 0x10DE0FDF,␉"GeForce GT 740M" },␊ |
1049 | ␉// 0FE0 - 0FEF␊ |
1050 | ␉{ 0x10DE0FE0,␉"GeForce GTX 660M" },␊ |
1051 | ␉{ 0x10DE0FE1,␉"GeForce GT 730M" },␊ |
1052 | ␉{ 0x10DE0FE3,␉"GeForce GT 745M" },␊ |
1053 | ␉{ 0x10DE0FE4,␉"GeForce GT 750M" },␊ |
1054 | ␉{ 0x10DE0FE5,␉"GeForce K340 USM" },␊ |
1055 | ␉{ 0x10DE0FE6,␉"NVS K1 USM" },␊ |
1056 | ␉{ 0x10DE0FE7,␉"Generic K1 USM / GRID K100" },␊ |
1057 | ␉{ 0x10DE0FE9,␉"GeForce GT 750M" },␊ |
1058 | ␉{ 0x10DE0FEA,␉"GeForce GT 755M" },␊ |
1059 | ␉{ 0x10DE0FEF,␉"GRID K340" },␊ |
1060 | ␉// 0FF0 - 0FFF␊ |
1061 | ␉{ 0x10DE0FF0,␉"NB1Q" },␊ |
1062 | ␉{ 0x10DE0FF1,␉"NVS 1000" },␊ |
1063 | ␉{ 0x10DE0FF2,␉"GRID K1" },␊ |
1064 | ␉{ 0x10DE0FF3,␉"Quadro K420" },␊ |
1065 | ␉{ 0x10DE0FF5,␉"Tesla K1 USM" },␊ |
1066 | ␉{ 0x10DE0FF6,␉"Quadro K1100M" },␊ |
1067 | ␉{ 0x10DE0FF7,␉"Quadro K1 USM" }, // K1 USM / GRID K120Q / GRID K140Q␊ |
1068 | ␉{ 0x10DE0FF8,␉"Quadro K500M" },␊ |
1069 | ␉{ 0x10DE0FF9,␉"Quadro K2000D" },␊ |
1070 | ␉{ 0x10DE0FFA,␉"Quadro K600" },␊ |
1071 | ␉{ 0x10DE0FFB,␉"Quadro K2000M" },␊ |
1072 | ␉{ 0x10DE0FFC,␉"Quadro K1000M" },␊ |
1073 | ␉{ 0x10DE0FFD,␉"NVS 510" },␊ |
1074 | ␉{ 0x10DE0FFE,␉"Quadro K2000" },␊ |
1075 | ␉{ 0x10DE0FFF,␉"Quadro 410" },␊ |
1076 | ␉// 1000 - 100F␊ |
1077 | ␉{ 0x10DE1001,␉"GeForce GTX TITAN Z" },␊ |
1078 | ␉{ 0x10DE1003,␉"GeForce GTX Titan LE" },␊ |
1079 | ␉{ 0x10DE1004,␉"GeForce GTX 780" },␊ |
1080 | ␉{ 0x10DE1005,␉"GeForce GTX Titan" },␊ |
1081 | ␉{ 0x10DE1006,␉"GeForce GTX 780 Ti" },␊ |
1082 | ␉{ 0x10DE1007,␉"GeForce GTX 780" },␊ |
1083 | ␉{ 0x10DE1008,␉"GeForce GTX 780 Ti" },␊ |
1084 | ␉{ 0x10DE100A,␉"GeForce GTX 780 Ti" },␊ |
1085 | //␉{ 0x10DE100B,␉"Graphics Device" }, // GK110␊ |
1086 | ␉{ 0x10DE100C,␉"GeForce GTX Titan Black" },␊ |
1087 | ␉// 1010 - 101F␊ |
1088 | ␉{ 0x10DE101E,␉"Tesla K20X" }, // GK110GL␊ |
1089 | ␉{ 0x10DE101F,␉"Tesla K20" },␊ |
1090 | ␉// 1020 - 102F␊ |
1091 | ␉{ 0x10DE1020,␉"Tesla K20X" },␊ |
1092 | ␉{ 0x10DE1021,␉"Tesla K20Xm" },␊ |
1093 | ␉{ 0x10DE1022,␉"Tesla K20c" },␊ |
1094 | ␉{ 0x10DE1023,␉"Tesla K40m" }, // GK110BGL␊ |
1095 | ␉{ 0x10DE1024,␉"Tesla K40c" }, // GK110BGL␊ |
1096 | ␉{ 0x10DE1026,␉"Tesla K20s" },␊ |
1097 | ␉{ 0x10DE1027,␉"Tesla K40st" }, // GK110BGL␊ |
1098 | ␉{ 0x10DE1028,␉"Tesla K20m" },␊ |
1099 | ␉{ 0x10DE1029,␉"Tesla K40s" }, // GK110BGL␊ |
1100 | ␉{ 0x10DE102A,␉"Tesla K40t" }, // GK110BGL␊ |
1101 | //␉{ 0x10DE102B,␉"Graphics Device" }, // GK110BGL␊ |
1102 | //␉{ 0x10DE102C,␉"Graphics Device" }, // GK110BGL␊ |
1103 | ␉{ 0x10DE102D,␉"Tesla K80" }, // GK110BGL (2x)␊ |
1104 | ␉{ 0x10DE102E,␉"Tesla K40d" }, // GK110BGL␊ |
1105 | ␉{ 0x10DE102F,␉"Tesla Stella Solo" }, // GK110BGL␊ |
1106 | ␉// 1030 - 103F␊ |
1107 | //␉{ 0x10DE1030,␉"" }, // GK110␊ |
1108 | ␉{ 0x10DE103a,␉"Quadro K6000" }, // GK110GL␊ |
1109 | ␉{ 0x10DE103c,␉"Quadro K5200" }, // GK110GL␊ |
1110 | ␉{ 0x10DE103F,␉"Tesla Stella SXM" }, // GK110␊ |
1111 | ␉// 1040 - 104F␊ |
1112 | ␉{ 0x10DE1040,␉"GeForce GT 520" },␊ |
1113 | ␉// { 0x10DE1041,␉"D13M1-45" },␊ |
1114 | ␉{ 0x10DE1042,␉"GeForce 510" },␊ |
1115 | ␉{ 0x10DE1048,␉"GeForce 605" },␊ |
1116 | ␉{ 0x10DE1049,␉"GeForce GT 620" },␊ |
1117 | ␉{ 0x10DE104A,␉"GeForce GT 610" },␊ |
1118 | ␉{ 0x10DE104B,␉"GeForce GT 625 (OEM)" },␊ |
1119 | ␉{ 0x10DE104C,␉"GeForce GT 705" }, // GF119␊ |
1120 | ␉{ 0x10DE104D,␉" GeForce GT 710" }, // GF119␊ |
1121 | ␉// 1050 - 105F␊ |
1122 | ␉{ 0x10DE1050,␉"GeForce GT 520M" },␊ |
1123 | ␉{ 0x10DE1051,␉"GeForce GT 520MX" },␊ |
1124 | ␉{ 0x10DE1052,␉"GeForce GT 520M" },␊ |
1125 | ␉{ 0x10DE1054,␉"GeForce GT 410M" },␊ |
1126 | ␉{ 0x10DE1055,␉"GeForce 410M" },␊ |
1127 | ␉{ 0x10DE1056,␉"Quadro NVS 4200M" },␊ |
1128 | ␉{ 0x10DE1057,␉"Quadro NVS 4200M" },␊ |
1129 | ␉{ 0x10DE1058,␉"GeForce GT 610M" },␊ |
1130 | ␉{ 0x10DE1059,␉"GeForce 610M" },␊ |
1131 | ␉{ 0x10DE105A,␉"GeForce 610M" },␊ |
1132 | ␉{ 0x10DE105B,␉"GeForce 705A" },␊ |
1133 | ␉// 1060 - 106F␊ |
1134 | ␉// 1070 - 107F␊ |
1135 | ␉{ 0x10DE107C,␉"Quadro NVS 315" },␊ |
1136 | ␉{ 0x10DE107D,␉"Quadro NVS 310" },␊ |
1137 | ␉// { 0x10DE107E,␉"GF119-INT" },␊ |
1138 | ␉{ 0x10DE107F,␉"GF119-ES" },␊ |
1139 | ␉// 1080 - 108F␊ |
1140 | ␉{ 0x10DE1080,␉"GeForce GTX 580" },␊ |
1141 | ␉{ 0x10DE1081,␉"GeForce GTX 570" },␊ |
1142 | ␉{ 0x10DE1082,␉"GeForce GTX 560 Ti" },␊ |
1143 | ␉{ 0x10DE1083,␉"D13U" },␊ |
1144 | ␉{ 0x10DE1084,␉"GeForce GTX 560" },␊ |
1145 | ␉{ 0x10DE1086,␉"GeForce GTX 570 HD" },␊ |
1146 | ␉{ 0x10DE1087,␉"GeForce GTX 560 Ti-448" },␊ |
1147 | ␉{ 0x10DE1088,␉"GeForce GTX 590" },␊ |
1148 | ␉{ 0x10DE1089,␉"GeForce GTX 580" },␊ |
1149 | ␉{ 0x10DE108B,␉"GeForce GTX 590" },␊ |
1150 | ␉// { 0x10DE108C,␉"D13U" },␊ |
1151 | ␉{ 0x10DE108E,␉"Tesla C2090" },␊ |
1152 | ␉// 1090 - 109F␊ |
1153 | ␉{ 0x10DE1091,␉"Tesla M2090" }, // X2090␊ |
1154 | ␉{ 0x10DE1094,␉"Tesla M2075" },␊ |
1155 | ␉{ 0x10DE1096,␉"Tesla C2075" },␊ |
1156 | ␉{ 0x10DE1098,␉"D13U" },␊ |
1157 | ␉{ 0x10DE109A,␉"Quadro 5010M" },␊ |
1158 | ␉{ 0x10DE109B,␉"Quadro 7000" },␊ |
1159 | ␉// 10A0 - 10AF␊ |
1160 | ␉// 10B0 - 10BF␊ |
1161 | ␉// 10C0 - 10CF␊ |
1162 | ␉{ 0x10DE10C0,␉"GeForce 9300 GS" },␊ |
1163 | ␉{ 0x10DE10C3,␉"GeForce 8400 GS" },␊ |
1164 | ␉{ 0x10DE10C4,␉"ION" },␊ |
1165 | ␉{ 0x10DE10C5,␉"GeForce 405" },␊ |
1166 | ␉// 10D0 - 10DF␊ |
1167 | ␉{ 0x10DE10D8,␉"Quadro NVS 300" },␊ |
1168 | ␉// 10E0 - 10EF␊ |
1169 | ␉// 10F0 - 10FF␊ |
1170 | ␉// 1100 - 110F␊ |
1171 | ␉// 1110 - 111F␊ |
1172 | ␉// 1120 - 112F␊ |
1173 | ␉{ 0x10DE1128,␉"GeForce GTX 970M" },␊ |
1174 | ␉// 1130 - 113F␊ |
1175 | ␉// 1140 - 114F␊ |
1176 | ␉{ 0x10DE1140,␉"GeForce GT 610M" },␊ |
1177 | ␉{ 0x10DE1141,␉"GeForce 610M" },␊ |
1178 | ␉{ 0x10DE1142,␉"GeForce 620M" },␊ |
1179 | ␉{ 0x10DE1143,␉"N13P-GV" },␊ |
1180 | ␉{ 0x10DE1144,␉"GF117" },␊ |
1181 | ␉{ 0x10DE1145,␉"GF117" },␊ |
1182 | ␉{ 0x10DE1146,␉"GF117" },␊ |
1183 | ␉{ 0x10DE1147,␉"GF117" },␊ |
1184 | ␉{ 0x10DE1149,␉"GF117-ES" },␊ |
1185 | ␉{ 0x10DE114A,␉"GF117-INT" },␊ |
1186 | ␉{ 0x10DE114B,␉"PCI-GEN3-B" },␊ |
1187 | ␉{ 0x10DE1150,␉"N13M-NS" },␊ |
1188 | ␉// 1160 - 116F␊ |
1189 | ␉// 1170 - 117F␊ |
1190 | ␉// 1180 - 118F␊ |
1191 | ␉{ 0x10DE1180,␉"GeForce GTX 680" },␊ |
1192 | ␉{ 0x10DE1182,␉"GeForce GTX 760 Ti" },␊ |
1193 | ␉{ 0x10DE1183,␉"GeForce GTX 660 Ti" },␊ |
1194 | ␉{ 0x10DE1184,␉"GeForce GTX 770" },␊ |
1195 | ␉{ 0x10DE1185,␉"GeForce GTX 660 OEM" },␊ |
1196 | ␉{ 0x10DE1187,␉"GeForce GTX 760" },␊ |
1197 | ␉{ 0x10DE1188,␉"GeForce GTX 690" },␊ |
1198 | ␉{ 0x10DE1189,␉"GeForce GTX 670" },␊ |
1199 | ␉{ 0x10DE118A,␉"GRID K520" },␊ |
1200 | ␉{ 0x10DE118B,␉"GRID K200" }, // GRID K2 GeForce USM␊ |
1201 | ␉{ 0x10DE118C,␉"GRID K2 NVS USM" }, // GK104␊ |
1202 | ␉{ 0x10DE118D,␉"GRID K200 vGPU" }, // GK104GL␊ |
1203 | ␉{ 0x10DE118E,␉"GeForce GTX 760 (192-bit)" },␊ |
1204 | ␉{ 0x10DE118F,␉"Tesla K10" },␊ |
1205 | ␉// 1190 - 119F␊ |
1206 | ␉{ 0x10DE1191,␉"GeForce GTX 760" }, // GK104␊ |
1207 | ␉{ 0x10DE1192,␉"GeForce GK104" },␊ |
1208 | ␉{ 0x10DE1193,␉"GeForce GTX 760 Ti" },␊ |
1209 | ␉{ 0x10DE1194,␉"Tesla K8" }, // GK104␊ |
1210 | ␉{ 0x10DE1195,␉"GeForce GTX 660" },␊ |
1211 | ␉{ 0x10DE1198,␉"GeForce GTX 880M" },␊ |
1212 | ␉{ 0x10DE1199,␉"GeForce GTX 870M" },␊ |
1213 | ␉{ 0x10DE119A,␉"GeForce GTX 860M" },␊ |
1214 | ␉{ 0x10DE119D,␉"GeForce GTX 775M" }, // Mac Edition␊ |
1215 | ␉{ 0x10DE119E,␉"GeForce GTX 780M" }, // Mac Edition␊ |
1216 | ␉{ 0x10DE119F,␉"GeForce GTX 780M" },␊ |
1217 | ␉// 11A0 - 11AF␊ |
1218 | ␉{ 0x10DE11A0,␉"GeForce GTX 680M" },␊ |
1219 | ␉{ 0x10DE11A1,␉"GeForce GTX 670MX" },␊ |
1220 | ␉{ 0x10DE11A2,␉"GeForce GTX 675MX" }, // Mac Edition␊ |
1221 | ␉{ 0x10DE11A3,␉"GeForce GTX 680MX" },␊ |
1222 | ␉{ 0x10DE11A7,␉"GeForce GTX 675MX" },␊ |
1223 | ␉{ 0x10DE11AF,␉"GRID IceCube" }, // GF104M␊ |
1224 | ␉// 11B0 - 11BF␊ |
1225 | ␉{ 0x10DE11B0,␉"GRID K240Q" }, // K260Q vGPU␊ |
1226 | ␉{ 0x10DE11B1,␉"GRID K2 Tesla USM" },␊ |
1227 | ␉{ 0x10DE11B4,␉"Quadro K4200" },␊ |
1228 | ␉{ 0x10DE11B6,␉"Quadro K3100M" },␊ |
1229 | ␉{ 0x10DE11B7,␉"Quadro K4100M" },␊ |
1230 | ␉{ 0x10DE11B8,␉"Quadro K5100M" },␊ |
1231 | ␉{ 0x10DE11BA,␉"Quadro K5000" },␊ |
1232 | ␉{ 0x10DE11BB,␉"Quadro 4100" },␊ |
1233 | ␉{ 0x10DE11BC,␉"Quadro K5000M" },␊ |
1234 | ␉{ 0x10DE11BD,␉"Quadro K4000M" },␊ |
1235 | ␉{ 0x10DE11BE,␉"Quadro K3000M" },␊ |
1236 | ␉{ 0x10DE11BF,␉"GRID K2" }, // GK104GL␊ |
1237 | ␉// 11C0 - 11CF␊ |
1238 | ␉{ 0x10DE11C0,␉"GeForce GTX 660" },␊ |
1239 | ␉{ 0x10DE11C2,␉"GeForce GTX 650 Ti BOOST" },␊ |
1240 | ␉{ 0x10DE11C3,␉"GeForce GTX 650 Ti" },␊ |
1241 | ␉{ 0x10DE11C4,␉"GeForce GTX 645" },␊ |
1242 | ␉{ 0x10DE11C6,␉"GeForce GTX 650 Ti" },␊ |
1243 | ␉{ 0x10DE11C7,␉"GeForce GTX 750 Ti" },␊ |
1244 | ␉{ 0x10DE11C8,␉"GeForce GTX 650 OEM" },␊ |
1245 | ␉// 11D0 - 11DF␊ |
1246 | ␉{ 0x10DE11D0,␉"GK106-INT353" },␊ |
1247 | ␉// 11E0 - 11EF␊ |
1248 | ␉{ 0x10DE11E0,␉"GeForce GTX 770M" },␊ |
1249 | ␉{ 0x10DE11E1,␉"GeForce GTX 765M" },␊ |
1250 | ␉{ 0x10DE11E2,␉"GeForce GTX 765M" },␊ |
1251 | ␉{ 0x10DE11E3,␉"GeForce GTX 760M" },␊ |
1252 | //␉{ 0x10DE11E7,␉"GeForce " }, // GK106M␊ |
1253 | ␉// 11F0 - 11FF␊ |
1254 | ␉{ 0x10DE11FA,␉"Quadro K4000" },␊ |
1255 | ␉{ 0x10DE11FC,␉"Quadro 2100M" },␊ |
1256 | ␉{ 0x10DE11FF,␉"NB1Q" }, //␊ |
1257 | ␉// 1200 - 120F␊ |
1258 | ␉{ 0x10DE1200,␉"GeForce GTX 560 Ti" },␊ |
1259 | ␉{ 0x10DE1201,␉"GeForce GTX 560" },␊ |
1260 | ␉{ 0x10DE1202,␉"GeForce GTX 560 Ti" },␊ |
1261 | ␉{ 0x10DE1203,␉"GeForce GTX 460 SE v2" },␊ |
1262 | ␉{ 0x10DE1205,␉"GeForce GTX 460 v2" },␊ |
1263 | ␉{ 0x10DE1206,␉"GeForce GTX 555" },␊ |
1264 | ␉{ 0x10DE1207,␉"GeForce GT 645" },␊ |
1265 | ␉{ 0x10DE1208,␉"GeForce GTX 560 SE" },␊ |
1266 | ␉{ 0x10DE1210,␉"GeForce GTX 570M" },␊ |
1267 | ␉{ 0x10DE1211,␉"GeForce GTX 580M" },␊ |
1268 | ␉{ 0x10DE1212,␉"GeForce GTX 675M" },␊ |
1269 | ␉{ 0x10DE1213,␉"GeForce GTX 670M" },␊ |
1270 | ␉{ 0x10DE121F,␉"GF114-INT" },␊ |
1271 | ␉{ 0x10DE1240,␉"GeForce GT 620M" },␊ |
1272 | ␉{ 0x10DE1241,␉"GeForce GT 545" },␊ |
1273 | ␉{ 0x10DE1243,␉"GeForce GT 545" },␊ |
1274 | ␉{ 0x10DE1244,␉"GeForce GTX 550 Ti" },␊ |
1275 | ␉{ 0x10DE1245,␉"GeForce GTS 450" },␊ |
1276 | ␉{ 0x10DE1246,␉"GeForce GT 550M" },␊ |
1277 | ␉{ 0x10DE1247,␉"GeForce GT 555M" },␊ |
1278 | ␉{ 0x10DE1248,␉"GeForce GT 555M" },␊ |
1279 | ␉{ 0x10DE1249,␉"GeForce GTS 450" },␊ |
1280 | ␉{ 0x10DE124B,␉"GeForce GT 640" },␊ |
1281 | ␉{ 0x10DE124D,␉"GeForce GT 555M" },␊ |
1282 | ␉{ 0x10DE1250,␉"GF116-INT" },␊ |
1283 | ␉{ 0x10DE1251,␉"GeForce GTX 560M" },␊ |
1284 | ␉// 1260 - 126F␊ |
1285 | ␉// 1270 - 127F␊ |
1286 | ␉// 1280 - 128F␊ |
1287 | ␉{ 0x10DE1280,␉"GeForce GT 635" },␊ |
1288 | ␉{ 0x10DE1281,␉"GeForce GT 710" },␊ |
1289 | ␉{ 0x10DE1282,␉"GeForce GT 640" },␊ |
1290 | ␉{ 0x10DE1284,␉"GeForce GT 630" },␊ |
1291 | ␉{ 0x10DE1286,␉"GeForce GT 720" },␊ |
1292 | ␉{ 0x10DE1287,␉"GeForce GT 730" }, // GK208␊ |
1293 | ␉{ 0x10DE1288,␉"GeForce GT 720" }, // GK208␊ |
1294 | ␉{ 0x10DE128b,␉"GeForce GT 710" },␊ |
1295 | ␉// 1290 - 129F␊ |
1296 | ␉{ 0x10DE1290,␉"GeForce GT 730M" },␊ |
1297 | ␉{ 0x10DE1291,␉"GeForce GT 735M" },␊ |
1298 | ␉{ 0x10DE1292,␉"GeForce GT 740M" },␊ |
1299 | ␉{ 0x10DE1293,␉"GeForce GT 730M" },␊ |
1300 | ␉{ 0x10DE1294,␉"GeForce GT 740M" },␊ |
1301 | ␉{ 0x10DE1295,␉"GeForce GT 710M" },␊ |
1302 | ␉{ 0x10DE1296,␉"GeForce 825M" }, // GK208M␊ |
1303 | ␉{ 0x10DE1298,␉"GeForce GT 720M" },␊ |
1304 | ␉{ 0x10DE1299,␉"GeForce 920M" }, // GK208M␊ |
1305 | ␉// 12A0 - 12AF␊ |
1306 | ␉{ 0x10DE12A0,␉"GK208" },␊ |
1307 | ␉{ 0x10DE12AF,␉"GK208-INT" },␊ |
1308 | ␉{ 0x10DE12B0,␉"GK208-CS-Q" },␊ |
1309 | ␉{ 0x10DE12B9,␉"Quadro K610M" },␊ |
1310 | ␉{ 0x10DE12BA,␉"Quadro K510M" },␊ |
1311 | ␉// 12B0 - 12BF␊ |
1312 | ␉// 12C0 - 12CF␊ |
1313 | ␉// 12D0 - 12DF␊ |
1314 | ␉// 12E0 - 12EF␊ |
1315 | ␉// 12F0 - 12FF␊ |
1316 | ␉{ 0x10DE1340,␉"GeForce 830M" },␊ |
1317 | ␉{ 0x10DE1341,␉"GeForce 840M" },␊ |
1318 | ␉{ 0x10DE1346,␉"GeForce 930M" }, // GM108M␊ |
1319 | ␉{ 0x10DE1347,␉"GeForce 940M" }, // GM108M␊ |
1320 | ␉{ 0x10DE1348,␉"GeForce 945M/945A" }, // GM108M␊ |
1321 | ␉{ 0x10DE1349,␉"GeForce 930M" }, // GM108M␊ |
1322 | ␉{ 0x10DE134D,␉"GeForce 940MX" }, // GM108M␊ |
1323 | ␉{ 0x10DE134E,␉"GeForce 930MX" }, // GM108M␊ |
1324 | ␉{ 0x10DE134F,␉"GeForce 920MX" }, // GM108M␊ |
1325 | ␉{ 0x10DE137A,␉"Quadro K620M/M500M" }, // GM108GLM␊ |
1326 | ␉{ 0x10DE137D,␉"GeForce 940A" }, // GM108M␊ |
1327 | ␉{ 0x10DE1380,␉"GeForce GTX 750 Ti" },␊ |
1328 | ␉{ 0x10DE1381,␉"GeForce GTX 750" },␊ |
1329 | ␉{ 0x10DE1382,␉"GeForce GTX 745" },␊ |
1330 | //␉{ 0x10DE1383,␉"Graphics Device" }, // GM107␊ |
1331 | ␉{ 0x10DE1389,␉"GRID M3" }, // GM107␊ |
1332 | ␉{ 0x10DE1390,␉"GeForce 845M" },␊ |
1333 | ␉{ 0x10DE1391,␉"GeForce GTX 850M" },␊ |
1334 | ␉{ 0x10DE1392,␉"GeForce GTX 860M" },␊ |
1335 | ␉{ 0x10DE1393,␉"GeForce 840M" },␊ |
1336 | ␉{ 0x10DE1398,␉"GeForce 845M" }, //␊ |
1337 | ␉{ 0x10DE139A,␉"GeForce GTX 950M" }, // GM107␊ |
1338 | ␉{ 0x10DE139B,␉"GeForce GTX 960M" }, // GM107␊ |
1339 | ␉{ 0x10DE139C,␉"GeForce 940M" }, // GM107M␊ |
1340 | ␉{ 0x10DE139D,␉"GeForce GTX 750 Ti" }, // GM107M␊ |
1341 | ␉{ 0x10DE13AD,␉"GM107 INT52" }, //␊ |
1342 | ␉{ 0x10DE13AE,␉"GM107 CS1" }, //␊ |
1343 | //␉{ 0x10DE13AF,␉"Graphics Device" }, // GM107GLM␊ |
1344 | ␉{ 0x10DE13B0,␉"GQuadro M2000M" }, // GM107GLM␊ |
1345 | ␉{ 0x10DE13B1,␉"Quadro M1000M" }, // GM107GLM␊ |
1346 | ␉{ 0x10DE13B2,␉"Quadro M600M" }, // GM107GLM␊ |
1347 | ␉{ 0x10DE13B3,␉"Quadro K2200M" }, // GM107GLM␊ |
1348 | ␉{ 0x10DE13B9,␉"NVS 810" }, // GM107GL␊ |
1349 | ␉{ 0x10DE13BA,␉"Quadro K2200" },␊ |
1350 | ␉{ 0x10DE13BB,␉"Quadro K620" },␊ |
1351 | ␉{ 0x10DE13BC,␉"Quadro K1200" },␊ |
1352 | ␉{ 0x10DE13BD,␉"Tesla M40" }, // GM107GLM␊ |
1353 | ␉{ 0x10DE13BE,␉"GM107 CS1" }, //␊ |
1354 | ␉{ 0x10DE13BF,␉"GM107 INT52" }, //␊ |
1355 | ␉// 12B0 - 12BF␊ |
1356 | ␉{ 0x10DE13C0,␉"GeForce GTX 980" }, // GM107GLM␊ |
1357 | //␉{ 0x10DE13C1,␉"Graphics Device" }, // GM107GLM␊ |
1358 | ␉{ 0x10DE13C2,␉"GeForce GTX 970" }, // GM107GLM␊ |
1359 | //␉{ 0x10DE13C3,␉"Graphics Device" }, // GM107GLM␊ |
1360 | ␉{ 0x10DE13D7,␉"GeForce GTX 980M" }, //␊ |
1361 | ␉{ 0x10DE13D8,␉"GeForce GTX 970M" }, //␊ |
1362 | ␉{ 0x10DE13D9,␉"GeForce GTX 965M" },␊ |
1363 | ␉{ 0x10DE13DA,␉"GeForce GTX 980" }, // GM204M␊ |
1364 | ␉{ 0x10DE13F0,␉"Quadro M5000" }, // GM204GL␊ |
1365 | ␉{ 0x10DE13F1,␉"Quadro M4000" }, // GM204GL␊ |
1366 | ␉{ 0x10DE13F2,␉"Tesla M60" }, // GM204GL␊ |
1367 | ␉{ 0x10DE13F3,␉"Tesla M6" }, // GM204GL␊ |
1368 | ␉{ 0x10DE13F8,␉"Quadro M5000M" }, // GM204GLM␊ |
1369 | ␉{ 0x10DE13F9,␉"Quadro M4000M" }, // GM204GLM␊ |
1370 | ␉{ 0x10DE13FA,␉"Quadro M3000M" }, // GM204GLM␊ |
1371 | ␉{ 0x10DE13FB,␉"Quadro M5500" }, // GM204GLM␊ |
1372 | ␉{ 0x10DE1401,␉"GeForce GTX 960" }, //␊ |
1373 | ␉{ 0x10DE1402,␉"GeForce GTX 950" }, //␊ |
1374 | ␉{ 0x10DE1406,␉"GeForce GTX 960" }, // GM206␊ |
1375 | ␉{ 0x10DE1407,␉"GeForce GTX 750 v2" }, // GM206␊ |
1376 | ␉{ 0x10DE1427,␉"GeForce GTX 965M" }, // GM206M␊ |
1377 | ␉{ 0x10DE1430,␉"Quadro M2000" }, //␊ |
1378 | ␉{ 0x10DE1431,␉"Tesla M4" }, // GM206GL␊ |
1379 | //␉{ 0x10DE143F,␉"Graphics Device" }, //␊ |
1380 | //␉{ 0x10DE1600,␉"Graphics Device" }, //␊ |
1381 | //␉{ 0x10DE1601,␉"Graphics Device" }, //␊ |
1382 | //␉{ 0x10DE1602,␉"Graphics Device" }, //␊ |
1383 | //␉{ 0x10DE1603,␉"Graphics Device" }, //␊ |
1384 | ␉{ 0x10DE1617,␉"GeForce GTX 980M" }, //␊ |
1385 | ␉{ 0x10DE1618,␉"GeForce GTX 970M" }, // GM204M␊ |
1386 | ␉{ 0x10DE1619,␉"GeForce GTX 965M" }, // GM204M␊ |
1387 | ␉{ 0x10DE161A,␉"GeForce GTX 980" }, // GM204M␊ |
1388 | //␉{ 0x10DE1630,␉"Graphics Device" }, //␊ |
1389 | //␉{ 0x10DE1631,␉"Graphics Device" }, //␊ |
1390 | ␉{ 0x10DE1667,␉"GeForce GTX 965M" }, // GM204M␊ |
1391 | //␉{ 0x10DE1780,␉"Graphics Device" }, //␊ |
1392 | //␉{ 0x10DE1781,␉"Graphics Device" }, //␊ |
1393 | //␉{ 0x10DE1782,␉"Graphics Device" }, //␊ |
1394 | //␉{ 0x10DE1783,␉"Graphics Device" }, //␊ |
1395 | ␉{ 0x10DE1789,␉"GRID M3-3020" }, //␊ |
1396 | ␉{ 0x10DE1790,␉"N15S-GX" }, //␊ |
1397 | ␉{ 0x10DE1791,␉"N15P-GT" }, //␊ |
1398 | ␉{ 0x10DE1792,␉"N15P-GX" }, //␊ |
1399 | //␉{ 0x10DE17B3,␉"Quadro" }, //␊ |
1400 | //␉{ 0x10DE17BA,␉"Quadro" }, //␊ |
1401 | //␉{ 0x10DE17BB,␉"Quadro" }, //␊ |
1402 | //␉{ 0x10DE17BD,␉"Graphics Device" }, //␊ |
1403 | ␉{ 0x10DE17BE,␉"GM107 CS1" }, // GM107␊ |
1404 | //␉{ 0x10DE17C1,␉"Graphics Device" }, //␊ |
1405 | ␉{ 0x10DE17C2,␉"GeForce GTX Titan X" }, //␊ |
1406 | ␉{ 0x10DE17C8,␉"GeForce GTX 980 TI" }, //␊ |
1407 | //␉{ 0x10DE17EE,␉"Graphics Device" }, //␊ |
1408 | //␉{ 0x10DE17EF,␉"Graphics Device" }, //␊ |
1409 | ␉{ 0x10DE17F0,␉"Quadro M6000" },␊ |
1410 | //␉{ 0x10DE17FF,␉"Graphics Device" }, //␊ |
1411 | ␉{ 0x10DE17F1,␉"Quadro M6000" }, // GM200GL␊ |
1412 | ␉{ 0x10DE17FD,␉"Tesla M40" }, // GM200GL␊ |
1413 | ␉// 1B00 - 1CFFF␊ |
1414 | ␉{ 0x10DE1B00, "Titan X Pascal"}, // GP102␊ |
1415 | //␉{ 0x10DE1B01,␉"Graphics Device" }, // GP102␊ |
1416 | ␉{ 0x10DE1B30,␉"Quadro P6000" }, // GP102GL␊ |
1417 | //␉{ 0x10DE1B70,␉"Graphics Device" }, // GP102GL␊ |
1418 | //␉{ 0x10DE1B78,␉"Graphics Device" }, // GP102GL␊ |
1419 | ␉{ 0x10DE1B80, "GeForce GTX 1080"}, // GP104␊ |
1420 | ␉{ 0x10DE1B81, "GeForce GTX 1070"}, // GP104␊ |
1421 | //␉{ 0x10DE1B82,␉"Graphics Device" }, // GP104␊ |
1422 | //␉{ 0x10DE1B83,␉"Graphics Device" }, // GP104␊ |
1423 | ␉{ 0x10DE1BA0,␉"GeForce GTX 1080" }, // GP104M␊ |
1424 | ␉{ 0x10DE1BA1,␉"GeForce GTX 1070" }, // GP104M␊ |
1425 | ␉{ 0x10DE1BB0,␉"Quadro P5000" }, // GP104GL␊ |
1426 | //␉{ 0x10DE1BB1,␉"Graphics Device" }, // GP104GL␊ |
1427 | //␉{ 0x10DE1BB4,␉"Graphics Device" }, // GP104GL␊ |
1428 | ␉{ 0x10DE1BE0,␉"GeForce GTX 1080" }, //GP104M␊ |
1429 | ␉{ 0x10DE1BE1,␉"GeForce GTX 1070" }, //GP104M␊ |
1430 | //␉{ 0x10DE1C00,␉"Graphics Device" }, // GP106␊ |
1431 | //␉{ 0x10DE1C01,␉"Graphics Device" }, // GP106␊ |
1432 | ␉{ 0x10DE1C02, "GeForce GTX 1060"}, // GP106␊ |
1433 | ␉{ 0x10DE1C03, "GeForce GTX 1060"}, // GP106␊ |
1434 | ␉{ 0x10DE1c20,␉"GeForce GTX 1060" }, //GP106M␊ |
1435 | //␉{ 0x10DE1C30,␉"Graphics Device" }, // GP106GL␊ |
1436 | ␉{ 0x10DE1C60,␉"GeForce GTX 1060" }, // GP106M␊ |
1437 | //␉{ 0x10DE1C70,␉"Graphics Device" }, // GP106GL␊ |
1438 | //␉{ 0x10DE1C80,␉"Graphics Device" }, // GP107␊ |
1439 | //␉{ 0x10DE1C81,␉"Graphics Device" }, // GP107␊ |
1440 | ␉{ 0x10DE1C82,␉"GeForce GTX 1050 Ti"}, // GP107␊ |
1441 | };␊ |
1442 | ␊ |
1443 | static nvidia_card_info_t nvidia_card_exceptions[] = {␊ |
1444 | /* ========================================================================================␊ |
1445 | * Layout is device(VendorId + DeviceId), subdev (SubvendorId + SubdeviceId), display name.␊ |
1446 | * ========================================================================================␊ |
1447 | */␊ |
1448 | /* ------ Specific DeviceID and SubDevID. ------ */␊ |
1449 | ␉// 0000 - 00FF␊ |
1450 | ␉{ 0x10DE0040,␉0x10438178,␉"Asus V9999 Ultra V62.11" },␊ |
1451 | ␉{ 0x10DE0040,␉0x1043817D,␉"Asus V9999GT V61.21" },␊ |
1452 | ␉{ 0x10DE0040,␉0x7FFFFFFF,␉"GeForce 6800 Ultra [NV40.0]" },␊ |
1453 | ␉// 0100 - 01FF␊ |
1454 | ␉{ 0x10DE01D7,␉0x102801C2,␉"Dell Quadro NVS 110M" },␊ |
1455 | ␉{ 0x10DE01D7,␉0x102801CC,␉"Dell Quadro NVS 110M" },␊ |
1456 | ␉{ 0x10DE01D7,␉0x10DE014B,␉"nVidia Quadro NVS 110M" },␊ |
1457 | ␊ |
1458 | ␉{ 0x10DE01D8,␉0x102801CC,␉"Dell Quadro NVS 120M" },␊ |
1459 | ␉{ 0x10DE01D8,␉0x10282003,␉"Dell Quadro NVS 120M" },␊ |
1460 | ␊ |
1461 | ␉{ 0x10DE01DA,␉0x10280407,␉"Dell GeForce 7300 LE" },␊ |
1462 | ␉// 0200 - 02FF␊ |
1463 | ␉{ 0x10DE025B,␉0x10480D23,␉"ELSA Gloria4 700XGL" },␊ |
1464 | ␉// 0300 - 03FF␊ |
1465 | ␉{ 0x10DE0391,␉0x10DE047A,␉"Galaxy GeForce 7600 GT" },␊ |
1466 | ␉{ 0x10DE0391,␉0x19F120DE,␉"Galaxy GeForce 7600 GT" },␊ |
1467 | ␊ |
1468 | ␉{ 0x10DE0393,␉0x00000400,␉"Apple GeForce 7300GT" },␊ |
1469 | ␉// 0400 - 04FF␊ |
1470 | ␉{ 0x10DE0402,␉0x10DE0439,␉"Galaxy 8600GT" },␊ |
1471 | ␉{ 0x10DE0402,␉0x10DE0505,␉"Galaxy 8600GT" },␊ |
1472 | ␉// 0500 - 05FF␊ |
1473 | ␉{ 0x10DE05E2,␉0x104382EB,␉"ASUS ENGTX260" },␊ |
1474 | ␉{ 0x10DE05E2,␉0x16822390,␉"HFX GeForce GTX 260" },␊ |
1475 | ␉{ 0x10DE05E2,␉0x17870000,␉"HIS GeForce GTX 260" },␊ |
1476 | ␊ |
1477 | ␉{ 0x10DE05E6,␉0x10B00401,␉"Gainward GeForce GTX 285" },␊ |
1478 | ␊ |
1479 | ␉{ 0x10DE05E7,␉0x10DE0595,␉"nVidia Tesla T10 Processor" },␊ |
1480 | ␉{ 0x10DE05E7,␉0x10DE066A,␉"nVidia Tesla C1060" },␊ |
1481 | ␉{ 0x10DE05E7,␉0x10DE068F,␉"nVidia Tesla T10 Processor" },␊ |
1482 | ␉{ 0x10DE05E7,␉0x10DE0697,␉"nVidia Tesla M1060" },␊ |
1483 | ␉{ 0x10DE05E7,␉0x10DE0714,␉"nVidia Tesla M1060" },␊ |
1484 | ␉{ 0x10DE05E7,␉0x10DE0743,␉"nVidia Tesla M1060" },␊ |
1485 | ␉// 0600 - 06FF␊ |
1486 | ␉{ 0x10DE0600,␉0x10DE0000,␉"Abit GeForce 8800 GTS" },␊ |
1487 | ␊ |
1488 | ␉{ 0x10DE0605,␉0x145834A2,␉"Gigabyte GV-N98TOC-512H" },␊ |
1489 | ␊ |
1490 | ␉{ 0x10DE0608,␉0x15880577,␉"Solidum GeForce 9800M GTX" },␊ |
1491 | ␊ |
1492 | ␉{ 0x10DE0609,␉0x11700121,␉"Inventec GeForce 8800M GTS" },␊ |
1493 | ␊ |
1494 | ␉{ 0x10DE0612,␉0x104382A6,␉"Asus GeForce 9800 GTX+" },␊ |
1495 | ␉{ 0x10DE0612,␉0x10DE0571,␉"nVidia GeForce 9800 GTX+" },␊ |
1496 | ␉{ 0x10DE0612,␉0x10DE0592,␉"nVidia GeForce 9800 GTX+" },␊ |
1497 | ␉{ 0x10DE0612,␉0x3842C842,␉"EVGA GeForce 9800 GTX+" },␊ |
1498 | ␉{ 0x10DE0612,␉0x3842C875,␉"EVGA GeForce 9800 GTX+" },␊ |
1499 | ␊ |
1500 | ␉{ 0x10DE0615,␉0x10480F67,␉"ELSA GeForce GTS 250" },␊ |
1501 | ␉{ 0x10DE0615,␉0x10DE0592,␉"Palit GeForce GTS 250" },␊ |
1502 | ␉{ 0x10DE0615,␉0x10DE0593,␉"Palit GeForce GTS 250" },␊ |
1503 | ␉{ 0x10DE0615,␉0x10DE0652,␉"Palit GeForce GTS 250" },␊ |
1504 | ␉{ 0x10DE0615,␉0x10DE0719,␉"Palit GeForce GTS 250" },␊ |
1505 | ␉{ 0x10DE0615,␉0x10DE079E,␉"Palit GeForce GTS 250" },␊ |
1506 | ␉{ 0x10DE0615,␉0x11503842,␉"TMC GeForce GTS 250" }, // Thinking Machines Corporation␊ |
1507 | ␉{ 0x10DE0615,␉0x11513842,␉"JAE GeForce GTS 250" },␊ |
1508 | ␉{ 0x10DE0615,␉0x11553842,␉"Pine GeForce GTS 250" },␊ |
1509 | ␉{ 0x10DE0615,␉0x11563842,␉"Periscope GeForce GTS 250" },␊ |
1510 | ␊ |
1511 | ␉{ 0x10DE0618,␉0x10432028,␉"Asus GeForce GTX 170M" },␊ |
1512 | ␉{ 0x10DE0618,␉0x1043202B,␉"Asus GeForce GTX 680" },␊ |
1513 | ␊ |
1514 | ␉{ 0x10DE0622,␉0x104382AC,␉"Asus EN9600GT Magic" },␊ |
1515 | ␊ |
1516 | ␉{ 0x10DE0640,␉0x10DE077F,␉"Inno3D GeForce 9500GT HDMI" },␊ |
1517 | ␊ |
1518 | ␉{ 0x10DE0649,␉0x1043202D,␉"Asus GeForce GT 220M" },␊ |
1519 | ␊ |
1520 | ␉{ 0x10DE06CD,␉0x10DE079F,␉"Point of View GeForce GTX 470" },␊ |
1521 | ␉{ 0x10DE06CD,␉0x14622220,␉"MSi GeForce GTX 470 Twin Frozr II" },␊ |
1522 | ␊ |
1523 | ␉{ 0x10DE06D1,␉0x10DE0771,␉"nVidia Tesla C2050" },␊ |
1524 | ␉{ 0x10DE06D1,␉0x10DE0772,␉"nVidia Tesla C2070" },␊ |
1525 | ␊ |
1526 | ␉{ 0x10DE06D2,␉0x10DE0774,␉"nVidia Tesla M2070" },␊ |
1527 | ␉{ 0x10DE06D2,␉0x10DE0830,␉"nVidia Tesla M2070" },␊ |
1528 | ␉{ 0x10DE06D2,␉0x10DE0842,␉"nVidia Tesla M2070" },␊ |
1529 | ␉{ 0x10DE06D2,␉0x10DE088F,␉"nVidia Tesla X2070" },␊ |
1530 | ␉{ 0x10DE06D2,␉0x10DE0908,␉"nVidia Tesla M2070" },␊ |
1531 | ␊ |
1532 | ␉{ 0x10DE06DE,␉0x10DE0773,␉"nVidia Tesla S2050" },␊ |
1533 | ␉{ 0x10DE06DE,␉0x10DE0830,␉"nVidia Tesla M2070" },␊ |
1534 | ␉{ 0x10DE06DE,␉0x10DE0831,␉"nVidia Tesla M2070" },␊ |
1535 | ␉{ 0x10DE06DE,␉0x10DE0832,␉"nVidia Tesla M2070" },␊ |
1536 | ␉{ 0x10DE06DE,␉0x10DE0840,␉"nVidia Tesla X2070" },␊ |
1537 | ␊ |
1538 | ␉{ 0x10DE06E4,␉0x10438322,␉"Asus EN8400GS" },␊ |
1539 | ␉{ 0x10DE06E4,␉0x14583475,␉"GV-NX84S256HE [GeForce 8400 GS]" },␊ |
1540 | ␊ |
1541 | ␉{ 0x10DE06E8,␉0x10280262,␉"Dell GeForce 9200M GS" },␊ |
1542 | ␉{ 0x10DE06E8,␉0x10280271,␉"Dell GeForce 9200M GS" },␊ |
1543 | ␉{ 0x10DE06E8,␉0x10280272,␉"Dell GeForce 9200M GS" },␊ |
1544 | ␉{ 0x10DE06E8,␉0x103C30F4,␉"HP GeForce 9200M GS" },␊ |
1545 | ␉{ 0x10DE06E8,␉0x103C30F7,␉"HP GeForce 9200M GS" },␊ |
1546 | ␉{ 0x10DE06E8,␉0x103C3603,␉"HP GeForce 9200M GS" },␊ |
1547 | ␉// 0700 - 07FF␊ |
1548 | ␉// 0800 - 08FF␊ |
1549 | ␉{ 0x10DE0873,␉0x104319B4,␉"Asus GeForce G102M" },␊ |
1550 | ␉// 0900 - 09FF␊ |
1551 | ␉// 0A00 - 0AFF␊ |
1552 | ␉{ 0x10DE0A6F,␉0x12974003,␉"Shuttle XS 3510MA" },␊ |
1553 | ␊ |
1554 | ␉{ 0x10DE0A70,␉0x17AA3605,␉"Lenovo ION" },␊ |
1555 | ␊ |
1556 | ␉{ 0x10DE0A73,␉0x17AA3607,␉"Lenovo ION" },␊ |
1557 | ␉{ 0x10DE0A73,␉0x17AA3610,␉"Lenovo ION" },␊ |
1558 | ␊ |
1559 | ␉{ 0x10DE0A75,␉0x17AA3605,␉"Lenovo ION" },␊ |
1560 | ␉// 0B00 - 0BFF␊ |
1561 | ␉// 0C00 - 0CFF␊ |
1562 | ␉{ 0x10DE0CA3,␉0x14628041,␉"MSi VN240GT-MD1G" },␊ |
1563 | ␉{ 0x10DE0CA3,␉0x16423926,␉"Bitland GeForce GT 230" },␊ |
1564 | ␉// 0D00 - 0DFF␊ |
1565 | ␉{ 0x10DE0DD8,␉0x10DE0914,␉"nVidia Quadro 2000D" },␊ |
1566 | ␊ |
1567 | ␉{ 0x10DE0DEF,␉0x17AA21F3,␉"Lenovo NVS 5400M" },␊ |
1568 | ␉{ 0x10DE0DEF,␉0x17AA21F4,␉"Lenovo NVS 5400M" },␊ |
1569 | ␉{ 0x10DE0DEF,␉0x17AA21F5,␉"Lenovo NVS 5400M" },␊ |
1570 | ␉{ 0x10DE0DEF,␉0x17AA21F6,␉"Lenovo NVS 5400M" },␊ |
1571 | ␉{ 0x10DE0DEF,␉0x17AA5005,␉"Lenovo NVS 5400M" },␊ |
1572 | ␊ |
1573 | ␉// 0E00 - 0EFF␊ |
1574 | ␉{ 0x10DE0E22,␉0x1043835D,␉"Asus ENGTX460" },␊ |
1575 | ␊ |
1576 | ␉{ 0x10DE0E23,␉0x10B00401,␉"Gainward GeForce GTX 460" },␊ |
1577 | ␉// 0F00 - 0FFF␊ |
1578 | ␉{ 0x10DE0FBB,␉0x38422974,␉"EVGA GTX 970 OC" },␊ |
1579 | ␉{ 0x10DE0FD2,␉0x10280595,␉"Dell GeForce GT 640M LE" },␊ |
1580 | ␉{ 0x10DE0FD2,␉0x102805B2,␉"Dell GeForce GT 640M LE" },␊ |
1581 | ␉// 1000 - 10FF␊ |
1582 | ␉{ 0x10DE1080,␉0x14622561,␉"MSI N580GTX Lightning" },␊ |
1583 | ␉{ 0x10DE1080,␉0x14622563,␉"MSI N580GTX Lightning" },␊ |
1584 | ␊ |
1585 | ␉{ 0x10DE1086,␉0x10DE0871,␉"Inno3D GeForce GTX 570" },␊ |
1586 | ␊ |
1587 | ␉{ 0x10DE1087,␉0x104383D6,␉"Asus ENGTX560Ti448 DCII" },␊ |
1588 | ␊ |
1589 | ␉{ 0x10DE1091,␉0x10DE088E,␉"nVidia Tesla X2090" },␊ |
1590 | ␉{ 0x10DE1091,␉0x10DE0891,␉"nVidia Tesla X2090" },␊ |
1591 | ␊ |
1592 | ␉{ 0x10DE1094,␉0x10DE0888,␉"nVidia Tesla M2075" },␊ |
1593 | ␊ |
1594 | ␉{ 0x10DE1096,␉0x10DE0910,␉"nVidia Tesla C2075" },␊ |
1595 | ␉{ 0x10DE1096,␉0x10DE0911,␉"nVidia Tesla C2050" },␊ |
1596 | ␊ |
1597 | ␉// 1100 - 11FF␊ |
1598 | ␉{ 0x10DE1140,␉0x1025064A,␉"Acer GeForce GT 620M" },␊ |
1599 | ␉{ 0x10DE1140,␉0x1025064C,␉"Acer GeForce GT 620M" },␊ |
1600 | ␉{ 0x10DE1140,␉0x10250680,␉"Acer GeForce GT 620M" },␊ |
1601 | ␉{ 0x10DE1140,␉0x10250692,␉"Acer GeForce GT 620M" },␊ |
1602 | ␉{ 0x10DE1140,␉0x10250694,␉"Acer GeForce GT 620M" },␊ |
1603 | ␉{ 0x10DE1140,␉0x10250702,␉"Acer GeForce GT 620M" },␊ |
1604 | ␉{ 0x10DE1140,␉0x10250719,␉"Acer GeForce GT 620M" },␊ |
1605 | ␉{ 0x10DE1140,␉0x10250725,␉"Acer GeForce GT 620M" },␊ |
1606 | ␉{ 0x10DE1140,␉0x10250728,␉"Acer GeForce GT 620M" },␊ |
1607 | ␉{ 0x10DE1140,␉0x1025072B,␉"Acer GeForce GT 620M" },␊ |
1608 | ␉{ 0x10DE1140,␉0x1025072E,␉"Acer GeForce GT 620M" },␊ |
1609 | ␉{ 0x10DE1140,␉0x10250732,␉"Acer GeForce GT 620M" },␊ |
1610 | ␉{ 0x10DE1140,␉0x10280565,␉"Dell GeForce GT 630M" },␊ |
1611 | ␉{ 0x10DE1140,␉0x10280568,␉"Dell GeForce GT 630M" },␊ |
1612 | ␉{ 0x10DE1140,␉0x144DC0D5,␉"Samsung GeForce GT 630M" },␊ |
1613 | ␉{ 0x10DE1140,␉0x17AA500D,␉"Lenovo GeForce GT 620M" },␊ |
1614 | ␉{ 0x10DE1140,␉0x1B0A20DD,␉"Pegatron GeForce GT 620M" },␊ |
1615 | ␉{ 0x10DE1140,␉0x1B0A20FD,␉"Pegatron GeForce GT 620M" },␊ |
1616 | ␊ |
1617 | ␉{ 0x10DE1180,␉0x00001255,␉"Afox GTX 680" },␊ |
1618 | ␉{ 0x10DE1180,␉0x104383F0,␉"Asus GTX680-2GD5" },␊ |
1619 | ␉{ 0x10DE1180,␉0x104383F6,␉"Asus GTX 680 Direct CU II" },␊ |
1620 | ␉{ 0x10DE1180,␉0x104383F7,␉"Asus GTX 680 Direct CU II" },␊ |
1621 | ␉{ 0x10DE1180,␉0x1458353C,␉"GV-N680OC-2GD WindForce GTX 680 OC" },␊ |
1622 | ␉{ 0x10DE1180,␉0x14622820,␉"MSi N680GTX TwinFrozer" },␊ |
1623 | ␉{ 0x10DE1180,␉0x14622830,␉"MSi GTX 680 Lightning" },␊ |
1624 | ␉{ 0x10DE1180,␉0x14622831,␉"MSi GTX 680 Lightning LN2" },␊ |
1625 | ␉{ 0x10DE1180,␉0x15691180,␉"Palit GTX 680 JetStream" },␊ |
1626 | ␉{ 0x10DE1180,␉0x15691181,␉"Palit GTX 680 JetStream" },␊ |
1627 | ␉{ 0x10DE1180,␉0x15691189,␉"Palit GTX 680 JetStream" },␊ |
1628 | ␉{ 0x10DE1180,␉0x38422682,␉"EVGA GTX 680 SC" },␊ |
1629 | ␉{ 0x10DE1180,␉0x38422683,␉"EVGA GTX 680 SC" },␊ |
1630 | ␊ |
1631 | ␉{ 0x10DE1185,␉0x10DE106F,␉"nVidia GeForce GTX 760 OEM" }, // GK104␊ |
1632 | ␊ |
1633 | ␉{ 0x10DE1187,␉0x14583614,␉"GV-N760OC-4GD" },␊ |
1634 | ␊ |
1635 | ␉{ 0x10DE1189,␉0x10438405,␉"Asus GTX 670 Direct CU II TOP" },␊ |
1636 | ␉{ 0x10DE1189,␉0x15691189,␉"Palit GTX 670 JetStream" },␊ |
1637 | ␉{ 0x10DE1189,␉0x19DA1255,␉"Zotac GTX 670 AMP! Edition" },␊ |
1638 | ␊ |
1639 | ␉{ 0x10DE11A1,␉0x15587102,␉"Clevo N13E-GR" },␊ |
1640 | ␊ |
1641 | ␉{ 0x10DE11C0,␉0x10DE0995,␉"Inno3D GeForce GTX660" },␊ |
1642 | ␉{ 0x10DE11C0,␉0x1458354E,␉"GV-N660OC-2GD" },␊ |
1643 | ␊ |
1644 | ␉{ 0x10DE11C6,␉0x1043842A,␉"GTX650TI-1GD5" },␊ |
1645 | ␉// 1200 - 12FF␊ |
1646 | ␉{ 0x10DE1247,␉0x10432119,␉"Asus GeForce GT 670M" },␊ |
1647 | ␉{ 0x10DE1247,␉0x10432120,␉"Asus GeForce GT 670M" },␊ |
1648 | ␉{ 0x10DE1247,␉0x1043212A,␉"Asus GeForce GT 635M" },␊ |
1649 | ␉{ 0x10DE1247,␉0x1043212B,␉"Asus GeForce GT 635M" },␊ |
1650 | ␉{ 0x10DE1247,␉0x1043212C,␉"Asus GeForce GT 635M" },␊ |
1651 | ␉{ 0x10DE1247,␉0x152D0930,␉"Quanta GeForce GT 635M" },␊ |
1652 | ␊ |
1653 | ␉{ 0x10DE1248,␉0x152D0930,␉"Quanta GeForce GT 635M" },␊ |
1654 | ␊ |
1655 | ␉{ 0x10DE124D,␉0x146210CC,␉"MSi GeForce GT 635M" }␊ |
1656 | };␊ |
1657 | ␊ |
1658 | static int patch_nvidia_rom(uint8_t *rom)␊ |
1659 | {␊ |
1660 | ␉uint8_t␉␉num_outputs␉= 0;␊ |
1661 | ␉uint8_t␉␉i␉␉= 0;␊ |
1662 | ␉uint8_t␉␉dcbtable_version;␊ |
1663 | ␉uint8_t␉␉headerlength␉= 0;␊ |
1664 | ␉uint8_t␉␉numentries␉= 0;␊ |
1665 | ␉uint8_t␉␉recordlength␉= 0;␊ |
1666 | ␉uint8_t␉␉channel1␉= 0;␊ |
1667 | ␉uint8_t␉␉channel2␉= 0;␊ |
1668 | ␉uint16_t␉dcbptr;␊ |
1669 | ␉uint8_t␉␉*dcbtable;␊ |
1670 | ␉uint8_t␉␉*togroup;␊ |
1671 | ␉int␉␉has_lvds␉= false;␊ |
1672 | ␉struct dcbentry {␊ |
1673 | ␉␉uint8_t type;␊ |
1674 | ␉␉uint8_t index;␊ |
1675 | ␉␉uint8_t *heads;␊ |
1676 | ␉} entries[MAX_NUM_DCB_ENTRIES];␊ |
1677 | ␊ |
1678 | ␉DBG("patch_nvidia_rom.\n");␊ |
1679 | ␉if (!rom || (rom[0] != 0x55 && rom[1] != 0xaa))␊ |
1680 | ␉{␊ |
1681 | ␉␉DBG("False ROM signature: 0x%02x%02x\n", rom[0], rom[1]);␊ |
1682 | ␉␉return PATCH_ROM_FAILED;␊ |
1683 | ␉}␊ |
1684 | ␊ |
1685 | ␉dcbptr = *(uint16_t *)&rom[0x36];␊ |
1686 | ␊ |
1687 | ␉if (!dcbptr)␊ |
1688 | ␉{␊ |
1689 | ␉␉DBG("no dcb table found\n");␊ |
1690 | ␉␉return PATCH_ROM_FAILED;␊ |
1691 | ␉}␊ |
1692 | //␉else␊ |
1693 | //␉{␊ |
1694 | //␉␉DBG("dcb table at offset 0x%04x\n", dcbptr);␊ |
1695 | //␉}␊ |
1696 | ␊ |
1697 | ␉dcbtable␉␉= &rom[dcbptr];␊ |
1698 | ␉dcbtable_version␉= dcbtable[0];␊ |
1699 | ␊ |
1700 | ␉if (dcbtable_version >= 0x20)␊ |
1701 | ␉{␊ |
1702 | ␉␉uint32_t sig;␊ |
1703 | ␉␉␊ |
1704 | ␉␉if (dcbtable_version >= 0x30)␊ |
1705 | ␉␉{␊ |
1706 | ␉␉␉headerlength␉= dcbtable[1];␊ |
1707 | ␉␉␉numentries␉= dcbtable[2];␊ |
1708 | ␉␉␉recordlength␉= dcbtable[3];␊ |
1709 | ␊ |
1710 | ␉␉␉sig = *(uint32_t *)&dcbtable[6];␊ |
1711 | ␉␉}␊ |
1712 | ␉␉else␊ |
1713 | ␉␉{␊ |
1714 | ␉␉␉sig = *(uint32_t *)&dcbtable[4];␊ |
1715 | ␉␉␉headerlength = 8;␊ |
1716 | ␉␉}␊ |
1717 | ␊ |
1718 | ␉␉if (sig != 0x4edcbdcb)␊ |
1719 | ␉␉{␊ |
1720 | ␉␉␉DBG("Bad display config block signature (0x%8x)\n", sig); //Azi: issue #48␊ |
1721 | ␉␉␉return PATCH_ROM_FAILED;␊ |
1722 | ␉␉}␊ |
1723 | ␉}␊ |
1724 | ␉else if (dcbtable_version >= 0x14) { /* some NV15/16, and NV11+ */␊ |
1725 | ␉␉char sig[8];␊ |
1726 | ␉␉␊ |
1727 | ␉␉strncpy(sig, (char *)&dcbtable[-7], 7);␊ |
1728 | ␉␉sig[7] = 0;␊ |
1729 | ␉␉recordlength = 10;␊ |
1730 | ␊ |
1731 | ␉␉if (strcmp(sig, "DEV_REC"))␊ |
1732 | ␉␉{␊ |
1733 | ␉␉␉DBG("Bad Display Configuration Block signature (%s)\n", sig);␊ |
1734 | ␉␉␉return PATCH_ROM_FAILED;␊ |
1735 | ␉␉}␊ |
1736 | ␉}␊ |
1737 | ␉else␊ |
1738 | ␉{␊ |
1739 | ␉␉DBG("ERROR: dcbtable_version is 0x%X\n", dcbtable_version);␊ |
1740 | ␉␉return PATCH_ROM_FAILED;␊ |
1741 | ␉}␊ |
1742 | ␉␊ |
1743 | ␉if (numentries >= MAX_NUM_DCB_ENTRIES)␊ |
1744 | ␉{␊ |
1745 | ␉␉numentries = MAX_NUM_DCB_ENTRIES;␊ |
1746 | ␉}␊ |
1747 | ␊ |
1748 | ␉for (i = 0; i < numentries; i++)␊ |
1749 | ␉{␊ |
1750 | ␉␉uint32_t connection;␊ |
1751 | ␉␉connection = *(uint32_t *)&dcbtable[headerlength + recordlength * i];␊ |
1752 | ␊ |
1753 | ␉␉/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */␊ |
1754 | ␉␉if ((connection & 0x0000000f) == 0x0000000f) /* end of records */␊ |
1755 | ␉␉{␊ |
1756 | ␉␉␉continue;␊ |
1757 | ␉␉}␊ |
1758 | ␉␉if (connection == 0x00000000) /* seen on an NV11 with DCB v1.5 */␊ |
1759 | ␉␉{␊ |
1760 | ␉␉␉continue;␊ |
1761 | ␉␉}␊ |
1762 | ␉␉if ((connection & 0xf) == 0x6) /* we skip type 6 as it doesnt appear on macbook nvcaps */␊ |
1763 | ␉␉{␊ |
1764 | ␉␉␉continue;␊ |
1765 | ␉␉}␊ |
1766 | ␊ |
1767 | ␉␉entries[num_outputs].type = connection & 0xf;␊ |
1768 | ␉␉entries[num_outputs].index = num_outputs;␊ |
1769 | ␉␉entries[num_outputs++].heads = (uint8_t*)&(dcbtable[(headerlength + recordlength * i) + 1]);␊ |
1770 | ␊ |
1771 | ␉}␊ |
1772 | ␊ |
1773 | ␉for (i = 0; i < num_outputs; i++)␊ |
1774 | ␉{␊ |
1775 | ␉␉if (entries[i].type == 3)␊ |
1776 | ␉␉{␊ |
1777 | ␉␉␉has_lvds = true;␊ |
1778 | ␉␉␉//DBG("found LVDS\n");␊ |
1779 | ␉␉␉channel1 |= ( 0x1 << entries[i].index );␊ |
1780 | ␉␉␉entries[i].type = TYPE_GROUPED;␊ |
1781 | ␉␉}␊ |
1782 | ␉}␊ |
1783 | ␊ |
1784 | ␉// if we have a LVDS output, we group the rest to the second channel␊ |
1785 | ␉if (has_lvds)␊ |
1786 | ␉{␊ |
1787 | ␉␉for (i = 0; i < num_outputs; i++)␊ |
1788 | ␉␉{␊ |
1789 | ␉␉␉if (entries[i].type == TYPE_GROUPED)␊ |
1790 | ␉␉␉{␊ |
1791 | ␉␉␉␉continue;␊ |
1792 | ␉␉␉}␊ |
1793 | ␊ |
1794 | ␉␉␉channel2 |= ( 0x1 << entries[i].index );␊ |
1795 | ␉␉␉entries[i].type = TYPE_GROUPED;␊ |
1796 | ␉␉}␊ |
1797 | ␉}␊ |
1798 | ␉else␊ |
1799 | ␉{␊ |
1800 | ␉␉int x;␊ |
1801 | ␉␉// we loop twice as we need to generate two channels␊ |
1802 | ␉␉for (x = 0; x <= 1; x++)␊ |
1803 | ␉␉{␊ |
1804 | ␉␉␉for (i=0; i<num_outputs; i++)␊ |
1805 | ␉␉␉{␊ |
1806 | ␉␉␉␉if (entries[i].type == TYPE_GROUPED)␊ |
1807 | ␉␉␉␉{␊ |
1808 | ␉␉␉␉␉continue;␊ |
1809 | ␉␉␉␉}␊ |
1810 | ␉␉␉␉// if type is TMDS, the prior output is ANALOG␊ |
1811 | ␉␉␉␉// we always group ANALOG and TMDS␊ |
1812 | ␉␉␉␉// if there is a TV output after TMDS, we group it to that channel as well␊ |
1813 | ␉␉␉␉if (i && entries[i].type == 0x2)␊ |
1814 | ␉␉␉␉{␊ |
1815 | ␉␉␉␉␉switch (x)␊ |
1816 | ␉␉␉␉␉{␊ |
1817 | ␉␉␉␉␉␉case 0:␊ |
1818 | ␉␉␉␉␉␉␉//DBG("group channel 1\n");␊ |
1819 | ␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i].index );␊ |
1820 | ␉␉␉␉␉␉␉entries[i].type = TYPE_GROUPED;␊ |
1821 | ␊ |
1822 | ␉␉␉␉␉␉␉if (entries[i-1].type == 0x0)␊ |
1823 | ␉␉␉␉␉␉␉{␊ |
1824 | ␉␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i-1].index );␊ |
1825 | ␉␉␉␉␉␉␉␉entries[i-1].type = TYPE_GROUPED;␊ |
1826 | ␉␉␉␉␉␉␉}␊ |
1827 | ␉␉␉␉␉␉␉// group TV as well if there is one␊ |
1828 | ␉␉␉␉␉␉␉if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )␊ |
1829 | ␉␉␉␉␉␉␉{␊ |
1830 | ␉␉␉␉␉␉␉␉//␉DBG("group tv1\n");␊ |
1831 | ␉␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i+1].index );␊ |
1832 | ␉␉␉␉␉␉␉␉entries[i+1].type = TYPE_GROUPED;␊ |
1833 | ␉␉␉␉␉␉␉}␊ |
1834 | ␉␉␉␉␉␉␉break;␊ |
1835 | ␊ |
1836 | ␉␉␉␉␉␉case 1:␊ |
1837 | ␉␉␉␉␉␉␉//DBG("group channel 2 : %d\n", i);␊ |
1838 | ␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i].index );␊ |
1839 | ␉␉␉␉␉␉␉entries[i].type = TYPE_GROUPED;␊ |
1840 | ␊ |
1841 | ␉␉␉␉␉␉␉if (entries[i - 1].type == 0x0) {␊ |
1842 | ␉␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i-1].index );␊ |
1843 | ␉␉␉␉␉␉␉␉entries[i-1].type = TYPE_GROUPED;␊ |
1844 | ␉␉␉␉␉␉␉}␊ |
1845 | ␉␉␉␉␉␉␉// group TV as well if there is one␊ |
1846 | ␉␉␉␉␉␉␉if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )␊ |
1847 | ␉␉␉␉␉␉␉{␊ |
1848 | ␉␉␉␉␉␉␉␉//␉DBG("group tv2\n");␊ |
1849 | ␉␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i+1].index);␊ |
1850 | ␉␉␉␉␉␉␉␉entries[i+1].type = TYPE_GROUPED;␊ |
1851 | ␉␉␉␉␉␉␉}␊ |
1852 | ␉␉␉␉␉␉␉break;␊ |
1853 | ␉␉␉␉␉␉default:␊ |
1854 | ␉␉␉␉␉␉␉break;␊ |
1855 | ␊ |
1856 | ␉␉␉␉␉}␊ |
1857 | ␉␉␉␉␉break;␊ |
1858 | ␉␉␉␉}␊ |
1859 | ␉␉␉}␊ |
1860 | ␉␉}␊ |
1861 | ␉}␊ |
1862 | ␉␊ |
1863 | ␉// if we have left ungrouped outputs merge them to the empty channel␊ |
1864 | ␉togroup = &channel2; // = (channel1 ? (channel2 ? NULL : &channel2) : &channel1);␊ |
1865 | ␊ |
1866 | ␉for (i = 0; i < num_outputs; i++)␊ |
1867 | ␉{␊ |
1868 | ␉␉if (entries[i].type != TYPE_GROUPED)␊ |
1869 | ␉␉{␊ |
1870 | ␉␉␉//DBG("%d not grouped\n", i);␊ |
1871 | ␉␉␉if (togroup)␊ |
1872 | ␉␉␉{␊ |
1873 | ␉␉␉␉*togroup |= ( 0x1 << entries[i].index);␊ |
1874 | ␉␉␉}␊ |
1875 | ␉␉␉entries[i].type = TYPE_GROUPED;␊ |
1876 | ␉␉}␊ |
1877 | ␉}␊ |
1878 | ␉␊ |
1879 | ␉if (channel1 > channel2)␊ |
1880 | ␉{␊ |
1881 | ␉␉uint8_t buff = channel1;␊ |
1882 | ␉␉channel1 = channel2;␊ |
1883 | ␉␉channel2 = buff;␊ |
1884 | ␉}␊ |
1885 | ␉␊ |
1886 | ␉default_NVCAP[6] = channel1;␊ |
1887 | ␉default_NVCAP[8] = channel2;␊ |
1888 | ␉␊ |
1889 | ␉// patching HEADS␊ |
1890 | ␉for (i = 0; i < num_outputs; i++)␊ |
1891 | ␉{␊ |
1892 | ␉␉if (channel1 & (1 << i))␊ |
1893 | ␉␉{␊ |
1894 | ␉␉␉*entries[i].heads = 1;␊ |
1895 | ␉␉}␊ |
1896 | ␉␉else if(channel2 & (1 << i))␊ |
1897 | ␉␉{␊ |
1898 | ␉␉␉*entries[i].heads = 2;␊ |
1899 | ␉␉}␊ |
1900 | ␉}␊ |
1901 | ␉return (has_lvds ? PATCH_ROM_SUCCESS_HAS_LVDS : PATCH_ROM_SUCCESS);␊ |
1902 | }␊ |
1903 | ␊ |
1904 | static char *get_nvidia_model(uint32_t device_id, uint32_t subsys_id)␊ |
1905 | {␊ |
1906 | ␉int i, j;␊ |
1907 | ␊ |
1908 | ␉// First check in the plist, (for e.g this can override any hardcoded devices)␊ |
1909 | ␉cardList_t *nvcard = FindCardWithIds(device_id, subsys_id);␊ |
1910 | ␉if (nvcard)␊ |
1911 | ␉{␊ |
1912 | ␉␉if (nvcard->model)␊ |
1913 | ␉␉{␊ |
1914 | ␉␉␉return nvcard->model;␊ |
1915 | ␉␉}␊ |
1916 | ␉}␊ |
1917 | ␊ |
1918 | ␉//ErmaC added selector for Chameleon "old" style in System Profiler␊ |
1919 | ␉if (getBoolForKey(kNvidiaGeneric, &showGeneric, &bootInfo->chameleonConfig))␊ |
1920 | ␉{␊ |
1921 | ␊ |
1922 | ␊ |
1923 | ␉␉for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)␊ |
1924 | ␉␉{␊ |
1925 | ␉␉␉if (nvidia_card_generic[i].device == device_id)␊ |
1926 | ␉␉␉{␊ |
1927 | ␉␉␉␉return nvidia_card_generic[i].name_model;␊ |
1928 | ␉␉␉}␊ |
1929 | ␉␉}␊ |
1930 | ␉return nvidia_card_generic[0].name_model;␊ |
1931 | ␉}␊ |
1932 | ␊ |
1933 | ␉// Then check the exceptions table␊ |
1934 | ␉if (subsys_id)␊ |
1935 | ␉{␊ |
1936 | ␉␉for (i = 0; i < (sizeof(nvidia_card_exceptions) / sizeof(nvidia_card_exceptions[0])); i++)␊ |
1937 | ␉␉{␊ |
1938 | ␉␉␉if ((nvidia_card_exceptions[i].device == device_id) && (nvidia_card_exceptions[i].subdev == subsys_id))␊ |
1939 | ␉␉␉{␊ |
1940 | ␉␉␉␉return nvidia_card_exceptions[i].name_model;␊ |
1941 | ␉␉␉}␊ |
1942 | ␉␉}␊ |
1943 | ␉}␊ |
1944 | ␊ |
1945 | ␉// At last try the generic names␊ |
1946 | ␉for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)␊ |
1947 | ␉{␊ |
1948 | ␉␉if (nvidia_card_generic[i].device == device_id)␊ |
1949 | ␉␉{␊ |
1950 | ␉␉␉if (subsys_id)␊ |
1951 | ␉␉␉{␊ |
1952 | ␉␉␉␉for (j = 0; j < (sizeof(nvidia_card_vendors) / sizeof(nvidia_card_vendors[0])); j++)␊ |
1953 | ␉␉␉␉{␊ |
1954 | ␉␉␉␉␉if (nvidia_card_vendors[j].device == (subsys_id & 0xffff0000))␊ |
1955 | ␉␉␉␉␉{␊ |
1956 | ␉␉␉␉␉␉snprintf(generic_name, 128, "%s %s", // sizeof(generic_name), "%s %s",␊ |
1957 | ␉␉␉␉␉␉␉nvidia_card_vendors[j].name_model, nvidia_card_generic[i].name_model);␊ |
1958 | ␉␉␉␉␉␉return &generic_name[0];␊ |
1959 | ␉␉␉␉␉}␊ |
1960 | ␉␉␉␉}␊ |
1961 | ␉␉␉}␊ |
1962 | ␉␉␉return nvidia_card_generic[i].name_model;␊ |
1963 | ␉␉}␊ |
1964 | ␉}␊ |
1965 | ␉return nvidia_card_generic[0].name_model;␊ |
1966 | }␊ |
1967 | ␊ |
1968 | static int devprop_add_nvidia_template(DevPropDevice *device)␊ |
1969 | {␊ |
1970 | ␉//char tmp[16];␊ |
1971 | ␉DBG("\tdevprop_add_nvidia_template\n");␊ |
1972 | ␊ |
1973 | ␉if (!device)␊ |
1974 | ␉{␊ |
1975 | ␉␉return 0;␊ |
1976 | ␉}␊ |
1977 | ␊ |
1978 | ␉if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))␊ |
1979 | ␉{␊ |
1980 | ␉␉return 0;␊ |
1981 | ␉}␊ |
1982 | ␊ |
1983 | ␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))␊ |
1984 | ␉{␊ |
1985 | ␉␉return 0;␊ |
1986 | ␉}␊ |
1987 | ␊ |
1988 | ␉if (!DP_ADD_TEMP_VAL(device, nvidia_name_0))␊ |
1989 | ␉{␊ |
1990 | ␉␉return 0;␊ |
1991 | ␉}␊ |
1992 | ␊ |
1993 | ␉// Slice added selector for single nvidia card␊ |
1994 | ␉if (!getBoolForKey(kNvidiaSingle, &nvidiaSingle, &bootInfo->chameleonConfig))␊ |
1995 | ␉{␊ |
1996 | ␉␉if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))␊ |
1997 | ␉␉{␊ |
1998 | ␉␉␉return 0;␊ |
1999 | ␉␉}␊ |
2000 | ␊ |
2001 | ␉␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))␊ |
2002 | ␉␉{␊ |
2003 | ␉␉␉return 0;␊ |
2004 | ␉␉}␊ |
2005 | ␊ |
2006 | ␉␉if (!DP_ADD_TEMP_VAL(device, nvidia_name_1))␊ |
2007 | ␉␉{␊ |
2008 | ␉␉␉return 0;␊ |
2009 | ␉␉}␊ |
2010 | ␊ |
2011 | ␉}␊ |
2012 | ␉else␊ |
2013 | ␉{␊ |
2014 | ␉␉DBG("\tNVidia: Injecting only device 0\n");␊ |
2015 | ␉}␊ |
2016 | ␊ |
2017 | ␉if (devices_number == 1)␊ |
2018 | ␉{␊ |
2019 | ␉␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_parent))␊ |
2020 | ␉␉{␊ |
2021 | ␉␉␉return 0;␊ |
2022 | ␉␉}␊ |
2023 | ␉}␊ |
2024 | ␉else if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))␊ |
2025 | ␉{␊ |
2026 | ␉␉␉return 0;␊ |
2027 | ␉}␊ |
2028 | ␊ |
2029 | ␉// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!␊ |
2030 | ␉// len = sprintf(tmp, "Slot-%x", devices_number);␊ |
2031 | ␉//snprintf(tmp, sizeof(tmp), "Slot-%x",devices_number);␊ |
2032 | ␉//devprop_add_value(device, "AAPL,slot-name", (uint8_t *) tmp, (uint32_t)strlen(tmp));␊ |
2033 | ␉devices_number++;␊ |
2034 | ␊ |
2035 | ␉return 1;␊ |
2036 | }␊ |
2037 | ␊ |
2038 | static uint32_t load_nvidia_bios_file(const char *filename, uint8_t **buf)␊ |
2039 | {␊ |
2040 | ␉int fd;␊ |
2041 | ␉int size;␊ |
2042 | ␊ |
2043 | ␉if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0)␊ |
2044 | ␉{␊ |
2045 | ␉␉return 0;␊ |
2046 | ␉}␊ |
2047 | ␊ |
2048 | ␉size = file_size(fd);␊ |
2049 | ␊ |
2050 | ␉if (size)␊ |
2051 | ␉{␊ |
2052 | ␉␉*buf = malloc(size);␊ |
2053 | ␉␉size = read(fd, (char *)buf, size);␊ |
2054 | ␉}␊ |
2055 | ␉close(fd);␊ |
2056 | ␊ |
2057 | ␉return size > 0 ? size : 0;␊ |
2058 | }␊ |
2059 | ␊ |
2060 | uint64_t mem_detect(volatile uint8_t *regs, uint16_t nvCardType, pci_dt_t *nvda_dev, uint32_t device_id, uint32_t subsys_id)␊ |
2061 | {␊ |
2062 | ␉uint64_t vram_size = 0;␊ |
2063 | ␊ |
2064 | ␉// First check if any value exist in the plist␊ |
2065 | ␉cardList_t *nvcard = FindCardWithIds(device_id, subsys_id);␊ |
2066 | ␉if (nvcard) ␊ |
2067 | ␉{␊ |
2068 | ␉␉if (nvcard->videoRam > 0) ␊ |
2069 | ␉␉{␊ |
2070 | ␉␉␉vram_size = nvcard->videoRam * 1024 * 1024;␊ |
2071 | ␊ |
2072 | ␉␉␉return vram_size;␊ |
2073 | ␉␉}␊ |
2074 | ␉}␊ |
2075 | ␊ |
2076 | ␉// Finally, if vram_size still not set do the calculation with our own method␊ |
2077 | ␉if (nvCardType < NV_ARCH_50)␊ |
2078 | ␉{␊ |
2079 | ␉␉vram_size = (uint64_t)(REG32( NV04_PFB_FIFO_DATA ));␊ |
2080 | ␉␉vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;␊ |
2081 | ␉}␊ |
2082 | ␉else if (nvCardType < NV_ARCH_C0)␊ |
2083 | ␉{␊ |
2084 | ␉␉vram_size = (uint64_t)(REG32( NV04_PFB_FIFO_DATA ));␊ |
2085 | ␉␉vram_size |= (vram_size & 0xff) << 32;␊ |
2086 | ␉␉vram_size &= 0xffffffff00ll;␊ |
2087 | ␉}␊ |
2088 | ␉else␊ |
2089 | ␉{ // >= NV_ARCH_C0␊ |
2090 | ␉␉vram_size = REG32( NVC0_MEM_CTRLR_RAM_AMOUNT ) << 20;␊ |
2091 | ␉␉vram_size *= REG32( NVC0_MEM_CTRLR_COUNT );␊ |
2092 | ␉}␊ |
2093 | ␊ |
2094 | ␉// Then, Workaround for 9600M GT, GT 210/420/430/440/525M/540M & GTX 560M␊ |
2095 | ␉switch (nvda_dev->device_id)␊ |
2096 | ␉{␊ |
2097 | ␉␉case 0x0647: // 9600M GT 0647␊ |
2098 | ␉␉␉vram_size = 512*1024*1024;␊ |
2099 | ␉␉␉break;␊ |
2100 | ␉␉case 0x0649:␉// 9600M GT 0649␊ |
2101 | ␉␉␉// 10DE06491043202D 1GB VRAM␊ |
2102 | ␉␉␉if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x1043202D )␊ |
2103 | ␉␉␉{␊ |
2104 | ␉␉␉␉vram_size = 1024*1024*1024;␊ |
2105 | ␉␉␉}␊ |
2106 | ␉␉␉break;␊ |
2107 | ␉␉case 0x0A65: // GT 210␊ |
2108 | ␉␉case 0x0DE0: // GT 440␊ |
2109 | ␉␉case 0x0DE1: // GT 430␊ |
2110 | ␉␉case 0x0DE2: // GT 420␊ |
2111 | ␉␉case 0x0DEC: // GT 525M 0DEC␊ |
2112 | ␉␉␉vram_size = 1024*1024*1024;␊ |
2113 | ␉␉␉break;␊ |
2114 | ␉␉case 0x0DE9: // GT 630M␊ |
2115 | ␉␉␉// 10DE0DE9103C181D 1GB VRAM␊ |
2116 | ␉␉␉if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x103C181D )␊ |
2117 | ␉␉␉{␊ |
2118 | ␉␉␉␉vram_size = 1024*1024*1024;␊ |
2119 | ␉␉␉}␊ |
2120 | ␉␉␉break;␊ |
2121 | ␉␉case 0x0DF4: // GT 540M␊ |
2122 | ␉␉case 0x0DF5: // GT 525M 0DF5␊ |
2123 | ␉␉␉vram_size = 1024*1024*1024;␊ |
2124 | ␉␉␉break;␊ |
2125 | ␉␉case 0x0F00:␉// GT 630␊ |
2126 | ␉␉␉// 10DE0F0014583544 2GB VRAM␊ |
2127 | ␉␉␉//if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x14583544 )␊ |
2128 | ␉␉␉//{␊ |
2129 | ␉␉␉␉vram_size = -2147483648UL; // 2147483648;␊ |
2130 | ␉␉␉//}␊ |
2131 | ␉␉␉break;␊ |
2132 | ␉␉case 0x11C6:␉// GTX650TI 11C6␊ |
2133 | ␉␉␉// 10DE11C61043842A 1GB VRAM␊ |
2134 | ␉␉␉if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x1043842A )␊ |
2135 | ␉␉␉{␊ |
2136 | ␉␉␉␉vram_size = 1024*1024*1024;␊ |
2137 | ␉␉␉}␊ |
2138 | ␉␉␉break;␊ |
2139 | ␉␉case 0x1251: // GTX 560M␊ |
2140 | ␉␉␉vram_size = 1536*1024*1024;␊ |
2141 | ␉␉␉break;␊ |
2142 | ␉␉default:␊ |
2143 | ␉␉␉break;␊ |
2144 | ␉}␊ |
2145 | ␊ |
2146 | ␉DBG("mem_detected %ldMb\n", (vram_size >> 20));␊ |
2147 | ␉return vram_size;␊ |
2148 | }␊ |
2149 | ␊ |
2150 | static uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};␊ |
2151 | ␊ |
2152 | static bool checkNvRomSig(uint8_t * aRom)␊ |
2153 | {␊ |
2154 | ␉return aRom != NULL && (aRom[0] == 0x55 && aRom[1] == 0xaa);␊ |
2155 | }␊ |
2156 | ␊ |
2157 | bool setup_nvidia_devprop(pci_dt_t *nvda_dev)␊ |
2158 | {␊ |
2159 | ␉DevPropDevice␉*device␉␉= NULL;␊ |
2160 | ␉char␉␉*devicepath␉= NULL;␊ |
2161 | ␉uint8_t␉␉*rom␉␉= NULL;␊ |
2162 | ␉uint16_t␉nvCardType␉= 0;␊ |
2163 | ␉uint64_t␉videoRam␉= 0;␊ |
2164 | ␉uint32_t␉bar[7];␊ |
2165 | ␉uint32_t␉boot_display␉= 0;␊ |
2166 | ␉int␉␉nvPatch␉␉= 0;␊ |
2167 | ␉char␉␉*model␉␉= NULL;␊ |
2168 | ␉char␉␉nvFilename[64];␊ |
2169 | ␉option_rom_pci_header_t␉␉*rom_pci_header;␊ |
2170 | ␉volatile uint8_t␉␉*regs;␊ |
2171 | ␉uint32_t␉␉␉nvBiosOveride;␊ |
2172 | ␉int␉␉␉␉len;␊ |
2173 | ␉char␉␉␉␉biosVersion[64];␊ |
2174 | ␉char␉␉␉␉kNVCAP[12];␊ |
2175 | ␉const char␉␉␉*value;␊ |
2176 | ␊ |
2177 | ␉fill_card_list();␊ |
2178 | ␊ |
2179 | ␉devicepath = get_pci_dev_path(nvda_dev);␊ |
2180 | ␉bar[0] = pci_config_read32(nvda_dev->dev.addr, 0x10 );␊ |
2181 | ␉regs = (uint8_t *) (bar[0] & ~0x0f);␊ |
2182 | ␊ |
2183 | ␉// get card type␊ |
2184 | ␉nvCardType = (REG32(0) >> 20) & 0x1ff;␊ |
2185 | ␊ |
2186 | ␉verbose("\tClass code: [%04X]\n", nvda_dev->class_id);␊ |
2187 | ␊ |
2188 | ␉model = get_nvidia_model(((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id));␊ |
2189 | ␊ |
2190 | ␉// Amount of VRAM in kilobytes␊ |
2191 | ␉videoRam = mem_detect(regs, nvCardType, nvda_dev,((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) );␊ |
2192 | ␊ |
2193 | ␉snprintf(nvFilename, sizeof(nvFilename), "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id, (uint16_t)nvda_dev->device_id);␊ |
2194 | ␊ |
2195 | ␉if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)␊ |
2196 | ␉{␊ |
2197 | ␉␉verbose("\tLooking for nvidia video bios file %s\n", nvFilename);␊ |
2198 | ␉␉nvBiosOveride = load_nvidia_bios_file(nvFilename, &rom);␊ |
2199 | ␊ |
2200 | ␉␉if (nvBiosOveride > 0)␊ |
2201 | ␉␉{␊ |
2202 | ␉␉␉verbose("\tUsing nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);␊ |
2203 | ␉␉␉DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);␊ |
2204 | ␉␉}␊ |
2205 | ␉␉else␊ |
2206 | ␉␉{␊ |
2207 | ␉␉␉printf("\tERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);␊ |
2208 | ␉␉␉free(rom);␊ |
2209 | ␉␉␉return false;␊ |
2210 | ␉␉}␊ |
2211 | ␉}␊ |
2212 | ␉else␊ |
2213 | ␉{␊ |
2214 | ␉␉uint8_t␉*nvRom;␊ |
2215 | ␉␉rom = malloc(NVIDIA_ROM_SIZE);␊ |
2216 | ␉␉// Otherwise read bios from card␊ |
2217 | ␉␉nvBiosOveride = 0;␊ |
2218 | ␊ |
2219 | ␉␉// PROM first␊ |
2220 | ␉␉// Enable PROM access␊ |
2221 | ␉␉(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;␊ |
2222 | ␊ |
2223 | ␉␉nvRom = (uint8_t*)®s[NV_PROM_OFFSET];␊ |
2224 | ␊ |
2225 | ␉␉// Valid Signature ?␊ |
2226 | ␉␉if (checkNvRomSig(nvRom))␊ |
2227 | ␉␉{␊ |
2228 | ␉␉␉bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊ |
2229 | ␉␉␉DBG("\tPROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
2230 | ␉␉}␊ |
2231 | ␉␉else␊ |
2232 | ␉␉{␊ |
2233 | ␊ |
2234 | ␉␉␉// disable PROM access␊ |
2235 | ␉␉␉(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;␊ |
2236 | ␊ |
2237 | ␉␉␉//PRAM next␊ |
2238 | ␉␉␉nvRom = (uint8_t*)®s[NV_PRAMIN_OFFSET];␊ |
2239 | ␊ |
2240 | ␉␉␉if(checkNvRomSig(nvRom))␊ |
2241 | ␉␉␉{␊ |
2242 | ␉␉␉␉bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊ |
2243 | ␉␉␉␉DBG("\tPRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
2244 | ␉␉␉}␊ |
2245 | ␉␉␉else␊ |
2246 | ␉␉␉{␊ |
2247 | ␉␉␉␉// 0xC0000 last␊ |
2248 | ␉␉␉␉bcopy((char *)0xc0000, rom, NVIDIA_ROM_SIZE);␊ |
2249 | ␊ |
2250 | ␉␉␉␉// Valid Signature ?␊ |
2251 | ␉␉␉␉if (!checkNvRomSig(rom))␊ |
2252 | ␉␉␉␉{␊ |
2253 | ␉␉␉␉␉printf("\tERROR: Unable to locate nVidia Video BIOS\n");␊ |
2254 | ␉␉␉␉␉return false;␊ |
2255 | ␉␉␉␉}␊ |
2256 | ␉␉␉␉else␊ |
2257 | ␉␉␉␉{␊ |
2258 | ␉␉␉ DBG("\tROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊ |
2259 | ␉␉}␊ |
2260 | ␉␉}//end PRAM check␊ |
2261 | }//end PROM check␊ |
2262 | ␉}//end load rom from bios␊ |
2263 | ␊ |
2264 | ␉if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED)␊ |
2265 | ␉{␊ |
2266 | ␉␉printf("\tERROR: nVidia ROM Patching Failed!\n");␊ |
2267 | ␉␉free(rom);␊ |
2268 | ␉␉return false;␊ |
2269 | ␉}␊ |
2270 | ␊ |
2271 | ␉rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);␊ |
2272 | ␊ |
2273 | ␉// check for 'PCIR' sig␊ |
2274 | ␉if (rom_pci_header->signature == 0x50434952)␊ |
2275 | ␉{␊ |
2276 | ␉␉if (rom_pci_header->device_id != nvda_dev->device_id)␊ |
2277 | ␉␉{␊ |
2278 | ␉␉␉// Get Model from the OpROM␊ |
2279 | ␉␉␉model = get_nvidia_model(((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id), 0);␊ |
2280 | ␊ |
2281 | ␉␉␉// Get VRAM again␊ |
2282 | ␉␉␉videoRam = mem_detect(regs, nvCardType, nvda_dev, ((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id), 0);␊ |
2283 | ␊ |
2284 | ␉␉}␊ |
2285 | ␉␉else␊ |
2286 | ␉␉{␊ |
2287 | ␉␉␉printf("\tnVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);␊ |
2288 | ␉␉}␊ |
2289 | ␉}␊ |
2290 | ␊ |
2291 | ␉verbose("\tdevice number: %d\n\t%s %dMB NV%02x [%04x:%04x]-[%04x:%04x]\n\t%s\n",␊ |
2292 | ␉␉␉devices_number,␊ |
2293 | ␉␉␉model, (uint32_t)(videoRam / 1024 / 1024),␊ |
2294 | ␉␉␉(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,␊ |
2295 | ␉␉␉nvda_dev->subsys_id.subsys.vendor_id, nvda_dev->subsys_id.subsys.device_id,␊ |
2296 | ␉␉␉devicepath);␊ |
2297 | ␉verbose("\tNvidiaGeneric = %s\n", showGeneric ? "Yes" : "No");␊ |
2298 | ␉verbose("\tNvidiaSingle = %s\n", nvidiaSingle ? "Yes" : "No");␊ |
2299 | ␊ |
2300 | ␉if (!string)␊ |
2301 | ␉{␊ |
2302 | ␉␉string = devprop_create_string();␊ |
2303 | ␉}␊ |
2304 | ␊ |
2305 | ␉device = devprop_add_device(string, devicepath);␊ |
2306 | ␊ |
2307 | ␉/* FIXME: for primary graphics card only */␊ |
2308 | ␉boot_display = 1;␊ |
2309 | ␉devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t *)&boot_display, 4);␊ |
2310 | ␊ |
2311 | ␉if (getBoolForKey(kUseIntelHDMI, &doit, &bootInfo->chameleonConfig) && doit)␊ |
2312 | ␉{␊ |
2313 | ␉␉devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊ |
2314 | ␉}␊ |
2315 | ␉else␊ |
2316 | ␉{␊ |
2317 | ␉␉devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);␊ |
2318 | ␉}␊ |
2319 | ␊ |
2320 | ␉if (nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS)␊ |
2321 | ␉{␊ |
2322 | ␉␉uint8_t built_in = 0x01;␊ |
2323 | ␉␉devprop_add_value(device, "@0,built-in", &built_in, 1);␊ |
2324 | ␉}␊ |
2325 | ␊ |
2326 | ␉// get bios version␊ |
2327 | ␉const int MAX_BIOS_VERSION_LENGTH = 32;␊ |
2328 | ␉char *version_str = (char *)malloc(MAX_BIOS_VERSION_LENGTH);␊ |
2329 | ␊ |
2330 | ␉memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);␊ |
2331 | ␊ |
2332 | ␉int i, version_start;␊ |
2333 | ␉int crlf_count = 0;␊ |
2334 | ␊ |
2335 | ␉// only search the first 384 bytes␊ |
2336 | ␉for (i = 0; i < 0x180; i++)␊ |
2337 | ␉{␊ |
2338 | ␉␉if (rom[i] == 0x0D && rom[i+1] == 0x0A)␊ |
2339 | ␉␉{␊ |
2340 | ␉␉␉crlf_count++;␊ |
2341 | ␉␉␉// second 0x0D0A was found, extract bios version␊ |
2342 | ␉␉␉if (crlf_count == 2)␊ |
2343 | ␉␉␉{␊ |
2344 | ␉␉␉␉if (rom[i-1] == 0x20) i--; // strip last " "␊ |
2345 | ␊ |
2346 | ␉␉␉␉for (version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--)␊ |
2347 | ␉␉␉␉{␊ |
2348 | ␉␉␉␉␉// find start␊ |
2349 | ␉␉␉␉␉if (rom[version_start] == 0x00)␊ |
2350 | ␉␉␉␉␉{␊ |
2351 | ␉␉␉␉␉␉version_start++;␊ |
2352 | ␊ |
2353 | ␉␉␉␉␉␉// strip "Version "␊ |
2354 | ␉␉␉␉␉␉if (strncmp((const char*)rom+version_start, "Version ", 8) == 0)␊ |
2355 | ␉␉␉␉␉␉{␊ |
2356 | ␉␉␉␉␉␉␉version_start += 8;␊ |
2357 | ␉␉␉␉␉␉}␊ |
2358 | ␊ |
2359 | ␉␉␉␉␉␉strncpy(version_str, (const char*)rom+version_start, i-version_start);␊ |
2360 | ␉␉␉␉␉␉break;␊ |
2361 | ␉␉␉␉␉}␊ |
2362 | ␉␉␉␉}␊ |
2363 | ␉␉␉␉break;␊ |
2364 | ␉␉␉}␊ |
2365 | ␉␉}␊ |
2366 | ␉}␊ |
2367 | ␊ |
2368 | ␉strncpy(biosVersion, (nvBiosOveride > 0) ? nvFilename : version_str, sizeof(biosVersion) );␊ |
2369 | ␉snprintf(kNVCAP, sizeof(kNVCAP), "NVCAP_%04x", nvda_dev->device_id);␊ |
2370 | ␊ |
2371 | ␉if (getValueForKey(kNVCAP, &value, &len, &bootInfo->chameleonConfig) && len == NVCAP_LEN * 2)␊ |
2372 | ␉{␊ |
2373 | ␉␉uint8_t new_NVCAP[NVCAP_LEN];␊ |
2374 | ␊ |
2375 | ␉␉if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)␊ |
2376 | ␉␉{␊ |
2377 | ␉␉␉verbose("\tUsing user supplied NVCAP for %s :: %s\n", model, devicepath);␊ |
2378 | ␉␉␉memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);␊ |
2379 | ␉␉}␊ |
2380 | ␉}␊ |
2381 | ␊ |
2382 | ␉if (getValueForKey(kDcfg0, &value, &len, &bootInfo->chameleonConfig) && len == DCFG0_LEN * 2)␊ |
2383 | ␉{␊ |
2384 | ␉␉uint8_t new_dcfg0[DCFG0_LEN];␊ |
2385 | ␊ |
2386 | ␉␉if (hex2bin(value, new_dcfg0, DCFG0_LEN) == 0)␊ |
2387 | ␉␉{␊ |
2388 | ␉␉␉memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);␊ |
2389 | ␊ |
2390 | ␉␉␉verbose("\tUsing user supplied @0,display-cfg\n");␊ |
2391 | ␉␉␉printf("@0,display-cfg: %02x%02x%02x%02x\n",␊ |
2392 | ␉␉␉␉ default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);␊ |
2393 | ␉␉}␊ |
2394 | ␉}␊ |
2395 | ␊ |
2396 | ␉if (getValueForKey(kDcfg1, &value, &len, &bootInfo->chameleonConfig) && len == DCFG1_LEN * 2)␊ |
2397 | ␉{␊ |
2398 | ␉␉uint8_t new_dcfg1[DCFG1_LEN];␊ |
2399 | ␊ |
2400 | ␉␉if (hex2bin(value, new_dcfg1, DCFG1_LEN) == 0)␊ |
2401 | ␉␉{␊ |
2402 | ␉␉␉memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);␊ |
2403 | ␊ |
2404 | ␉␉␉verbose("Using user supplied @1,display-cfg\n");␊ |
2405 | ␉␉␉printf("\t@1,display-cfg: %02x%02x%02x%02x\n",␊ |
2406 | ␉␉␉␉ default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);␊ |
2407 | ␉␉}␊ |
2408 | ␉}␊ |
2409 | ␊ |
2410 | #if DEBUG_NVCAP␊ |
2411 | ␉printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",␊ |
2412 | ␉default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],␊ |
2413 | ␉default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],␊ |
2414 | ␉default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],␊ |
2415 | ␉default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],␊ |
2416 | ␉default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);␊ |
2417 | #endif␊ |
2418 | ␊ |
2419 | ␉devprop_add_nvidia_template(device);␊ |
2420 | ␉devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);␊ |
2421 | ␊ |
2422 | ␉devprop_add_value(device, "NVPM", default_NVPM, NVPM_LEN);␊ |
2423 | ␉devprop_add_value(device, "VRAM,totalsize", (uint8_t *)&videoRam, 4);␊ |
2424 | ␉devprop_add_value(device, "model", (uint8_t *)model, strlen(model) + 1);␊ |
2425 | ␉devprop_add_value(device, "rom-revision", (uint8_t *)biosVersion, strlen(biosVersion) + 1);␊ |
2426 | ␊ |
2427 | ␉devprop_add_value(device, "@0,display-cfg", (uint8_t *)&default_dcfg_0, DCFG0_LEN);␊ |
2428 | ␉devprop_add_value(device, "@1,display-cfg", (uint8_t *)&default_dcfg_1, DCFG1_LEN);␊ |
2429 | ␊ |
2430 | ␉/******************** Added Marchrius.**********************/␊ |
2431 | ␉// For the AppleBacklightDisplay //␊ |
2432 | ␉/***********************************************************/␊ |
2433 | ␉if (getBoolForKey(kEnableBacklight, &doit, &bootInfo->chameleonConfig) && doit)␊ |
2434 | ␉{␊ |
2435 | ␉␉uint8_t AAPL_value[] = {0x01, 0x00, 0x00, 0x00}; //Is the same for all␊ |
2436 | ␉␉devprop_add_value(device, "AAPL,HasPanel", AAPL_value, 4);␊ |
2437 | ␉␉devprop_add_value(device, "AAPL,Haslid", AAPL_value, 4);␊ |
2438 | ␉␉devprop_add_value(device, "AAPL,backlight-control", AAPL_value, 4);␊ |
2439 | ␉␉devprop_add_value(device, "@0,backlight-control", AAPL_value, 4);␊ |
2440 | ␉}␊ |
2441 | ␉/************************** End ****************************/␊ |
2442 | ␊ |
2443 | ␉/***********************************************************/␊ |
2444 | ␉// For the DualLink //␊ |
2445 | ␉/***********************************************************/␊ |
2446 | ␉if (getBoolForKey(kEnableDualLink, &doit, &bootInfo->chameleonConfig) && doit)␊ |
2447 | ␉{␊ |
2448 | ␉␉uint8_t AAPL00_value[] = {0x01, 0x00, 0x00, 0x00};␊ |
2449 | ␉␉devprop_add_value(device, "AAPL00,DualLink", AAPL00_value, 4);␊ |
2450 | ␉}␊ |
2451 | ␉/************************** End ****************************/␊ |
2452 | ␊ |
2453 | ␉/************************ HDMI Audio ***********************/␊ |
2454 | ␉doit = false;␊ |
2455 | ␉//http://forge.voodooprojects.org/p/chameleon/issues/67/␊ |
2456 | ␉if(getBoolForKey(kEnableHDMIAudio, &doit, &bootInfo->chameleonConfig) && doit)␊ |
2457 | ␉{␊ |
2458 | ␉␉devprop_add_value(device, "@1,connector-type",connector_type_1, 4);␊ |
2459 | ␉}␊ |
2460 | ␉/************************ End Audio *************************/␊ |
2461 | ␊ |
2462 | ␉if (getBoolForKey(kVBIOS, &doit, &bootInfo->chameleonConfig) && doit)␊ |
2463 | ␉{␊ |
2464 | ␉␉devprop_add_value(device, "vbios", rom, (nvBiosOveride > 0) ? nvBiosOveride : (rom[2] * 512));␊ |
2465 | ␉}␊ |
2466 | ␊ |
2467 | ␉stringdata = malloc(sizeof(uint8_t) * string->length);␊ |
2468 | ␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊ |
2469 | ␉stringlength = string->length;␊ |
2470 | ␊ |
2471 | ␉free(version_str);␊ |
2472 | ␉free(rom);␊ |
2473 | ␉return true;␊ |
2474 | }␊ |
2475 |