Root/
Source at commit 307 created 12 years 10 months ago. By ifabio, merge changes from trunk (929). Also merge the module changes from Azimutz branche (fix compile error) Also edited the info.plist into AHCIPortInjector.kext: http://forum.voodooprojects.org/index.php/topic,1170.0.html | |
---|---|
1 | /*␊ |
2 | * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project␊ |
3 | *␊ |
4 | * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.␊ |
5 | *␊ |
6 | */␊ |
7 | ␊ |
8 | #include "libsa.h"␊ |
9 | #include "saio_internal.h"␊ |
10 | ␊ |
11 | #include "bootstruct.h"␊ |
12 | #include "pci.h"␊ |
13 | #include "platform.h"␊ |
14 | #include "device_inject.h"␊ |
15 | #include "ati_reg.h"␊ |
16 | ␊ |
17 | #define kUseAtiROM␉␉␉"UseAtiROM"␊ |
18 | #define kAtiConfig␉␉␉"AtiConfig"␊ |
19 | #define kATYbinimage␉␉"ATYbinimage"␊ |
20 | ␊ |
21 | #define␉OFFSET_TO_GET_ATOMBIOS_STRINGS_START␉␉0x6e␊ |
22 | ␊ |
23 | #define Reg32(reg)␉␉␉␉␉(*(volatile uint32_t *)(card->mmio + reg))␊ |
24 | #define RegRead32(reg)␉␉␉␉(Reg32(reg))␊ |
25 | #define RegWrite32(reg, value)␉␉(Reg32(reg) = value)␊ |
26 | ␊ |
27 | typedef enum {␊ |
28 | ␉kNul,␊ |
29 | ␉kStr,␊ |
30 | ␉kPtr,␊ |
31 | ␉kCst␊ |
32 | } type_t;␊ |
33 | ␊ |
34 | typedef enum {␊ |
35 | ␉CHIP_FAMILY_UNKNOW,␊ |
36 | ␉CHIP_FAMILY_RS600,␊ |
37 | ␉CHIP_FAMILY_RS690,␊ |
38 | ␉CHIP_FAMILY_RS740,␊ |
39 | ␉/* R600 */␊ |
40 | ␉CHIP_FAMILY_R600,␊ |
41 | ␉CHIP_FAMILY_RV610,␊ |
42 | ␉CHIP_FAMILY_RV630,␊ |
43 | ␉CHIP_FAMILY_RV670,␊ |
44 | ␉CHIP_FAMILY_RV620,␊ |
45 | ␉CHIP_FAMILY_RV635,␊ |
46 | ␉CHIP_FAMILY_RS780,␊ |
47 | ␉CHIP_FAMILY_RS880,␊ |
48 | ␉/* R700 */␊ |
49 | ␉CHIP_FAMILY_RV770,␊ |
50 | ␉CHIP_FAMILY_RV730,␊ |
51 | ␉CHIP_FAMILY_RV710,␊ |
52 | ␉CHIP_FAMILY_RV740,␊ |
53 | ␉/* Evergreen */␊ |
54 | ␉CHIP_FAMILY_CEDAR,␊ |
55 | ␉CHIP_FAMILY_REDWOOD,␊ |
56 | ␉CHIP_FAMILY_JUNIPER,␊ |
57 | ␉CHIP_FAMILY_CYPRESS,␊ |
58 | ␉CHIP_FAMILY_HEMLOCK,␊ |
59 | ␉/* Northern Islands */␊ |
60 | ␉CHIP_FAMILY_BARTS,␊ |
61 | ␉CHIP_FAMILY_CAICOS,␊ |
62 | ␉CHIP_FAMILY_CAYMAN,␊ |
63 | ␉CHIP_FAMILY_TURKS,␊ |
64 | ␉CHIP_FAMILY_LAST␊ |
65 | } chip_family_t;␊ |
66 | ␊ |
67 | static const char *chip_family_name[] = {␊ |
68 | ␉"UNKNOW",␊ |
69 | ␉"RS600",␊ |
70 | ␉"RS690",␊ |
71 | ␉"RS740",␊ |
72 | ␉/* R600 */␊ |
73 | ␉"R600",␊ |
74 | ␉"RV610",␊ |
75 | ␉"RV630",␊ |
76 | ␉"RV670",␊ |
77 | ␉"RV620",␊ |
78 | ␉"RV635",␊ |
79 | ␉"RS780",␊ |
80 | ␉"RS880",␊ |
81 | ␉/* R700 */␊ |
82 | ␉"RV770",␊ |
83 | ␉"RV730",␊ |
84 | ␉"RV710",␊ |
85 | ␉"RV740",␊ |
86 | ␉/* Evergreen */␊ |
87 | ␉"Cedar",␉// RV810␊ |
88 | ␉"Redwood",␉// RV830␊ |
89 | ␉"Juniper",␉// RV840␊ |
90 | ␉"Cypress",␉// RV870␊ |
91 | ␉"Hemlock",␉␊ |
92 | ␉/* Northern Islands */␊ |
93 | ␉"Barts",␊ |
94 | ␉"Caicos",␊ |
95 | ␉"Cayman",␊ |
96 | ␉"Turks",␊ |
97 | ␉""␊ |
98 | };␊ |
99 | ␊ |
100 | typedef struct {␊ |
101 | ␉const char␉␉*name;␊ |
102 | ␉uint8_t␉␉␉ports;␊ |
103 | } card_config_t;␊ |
104 | ␊ |
105 | static card_config_t card_configs[] = {␊ |
106 | ␉{NULL,␉␉␉0},␊ |
107 | ␉{"Alopias",␉␉2},␊ |
108 | ␉{"Alouatta",␉4},␊ |
109 | ␉{"Baboon",␉␉3},␊ |
110 | ␉{"Cardinal",␉2},␊ |
111 | ␉{"Caretta",␉␉1},␊ |
112 | ␉{"Colobus",␉␉2},␊ |
113 | ␉{"Douc",␉␉2},␊ |
114 | ␉{"Eulemur",␉␉3},␊ |
115 | ␉{"Flicker",␉␉3},␊ |
116 | ␉{"Galago",␉␉2},␊ |
117 | ␉{"Gliff",␉␉3},␊ |
118 | ␉{"Hoolock",␉␉3},␊ |
119 | ␉{"Hypoprion",␉2},␊ |
120 | ␉{"Iago",␉␉2},␊ |
121 | ␉{"Kakapo",␉␉3},␊ |
122 | ␉{"Kipunji",␉␉4},␊ |
123 | ␉{"Lamna",␉␉2},␊ |
124 | ␉{"Langur",␉␉3},␊ |
125 | ␉{"Megalodon",␉3},␊ |
126 | ␉{"Motmot",␉␉2},␊ |
127 | ␉{"Nomascus",␉5},␊ |
128 | ␉{"Orangutan",␉2},␊ |
129 | ␉{"Peregrine",␉2},␊ |
130 | ␉{"Quail",␉␉3},␊ |
131 | ␉{"Raven",␉␉3},␊ |
132 | ␉{"Shrike",␉␉3},␊ |
133 | ␉{"Sphyrna",␉␉1},␊ |
134 | ␉{"Triakis",␉␉2},␊ |
135 | ␉{"Uakari",␉␉4},␊ |
136 | ␉{"Vervet",␉␉4},␊ |
137 | ␉{"Zonalis",␉␉6},␊ |
138 | ␉{"Pithecia",␉3},␊ |
139 | ␉{"Bulrushes",␉6},␊ |
140 | ␉{"Cattail",␉␉4},␊ |
141 | ␉{"Hydrilla",␉5},␊ |
142 | ␉{"Duckweed",␉4},␊ |
143 | ␉{"Fanwort",␉␉4},␊ |
144 | ␉{"Elodea",␉␉5},␊ |
145 | ␉{"Kudzu",␉␉2},␊ |
146 | ␉{"Gibba",␉␉5},␊ |
147 | ␉{"Lotus",␉␉3},␊ |
148 | ␉{"Ipomoea",␉␉3},␊ |
149 | ␉{"Mangabey",␉2},␊ |
150 | ␉{"Muskgrass",␉4},␊ |
151 | ␉{"Juncus",␉␉4}␊ |
152 | };␊ |
153 | ␊ |
154 | typedef enum {␊ |
155 | ␉kNull,␊ |
156 | ␉kAlopias,␊ |
157 | ␉kAlouatta,␊ |
158 | ␉kBaboon,␊ |
159 | ␉kCardinal,␊ |
160 | ␉kCaretta,␊ |
161 | ␉kColobus,␊ |
162 | ␉kDouc,␊ |
163 | ␉kEulemur,␊ |
164 | ␉kFlicker,␊ |
165 | ␉kGalago,␊ |
166 | ␉kGliff,␊ |
167 | ␉kHoolock,␊ |
168 | ␉kHypoprion,␊ |
169 | ␉kIago,␊ |
170 | ␉kKakapo,␊ |
171 | ␉kKipunji,␊ |
172 | ␉kLamna,␊ |
173 | ␉kLangur,␊ |
174 | ␉kMegalodon,␊ |
175 | ␉kMotmot,␊ |
176 | ␉kNomascus,␊ |
177 | ␉kOrangutan,␊ |
178 | ␉kPeregrine,␊ |
179 | ␉kQuail,␊ |
180 | ␉kRaven,␊ |
181 | ␉kShrike,␊ |
182 | ␉kSphyrna,␊ |
183 | ␉kTriakis,␊ |
184 | ␉kUakari,␊ |
185 | ␉kVervet,␊ |
186 | ␉kZonalis,␊ |
187 | ␉kPithecia,␊ |
188 | ␉kBulrushes,␊ |
189 | ␉kCattail,␊ |
190 | ␉kHydrilla,␊ |
191 | ␉kDuckweed,␊ |
192 | ␉kFanwort,␊ |
193 | ␉kElodea,␊ |
194 | ␉kKudzu,␊ |
195 | ␉kGibba,␊ |
196 | ␉kLotus,␊ |
197 | ␉kIpomoea,␊ |
198 | ␉kMangabey,␊ |
199 | ␉kMuskgrass,␊ |
200 | ␉kJuncus,␊ |
201 | ␉kCfgEnd␊ |
202 | } config_name_t;␊ |
203 | ␊ |
204 | typedef struct {␊ |
205 | ␉uint16_t␉␉device_id;␊ |
206 | ␉uint32_t␉␉subsys_id;␊ |
207 | ␉chip_family_t␉chip_family;␊ |
208 | ␉const char␉␉*model_name;␊ |
209 | ␉config_name_t␉cfg_name;␊ |
210 | } radeon_card_info_t;␊ |
211 | ␊ |
212 | static radeon_card_info_t radeon_cards[] = {␊ |
213 | ␉/* Earlier cards are not supported */␊ |
214 | ␉{ 0x9400,␉0x30001002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 PRO",␉␉␉kNull␉␉},␊ |
215 | ␉{ 0x9400,␉0x25521002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
216 | ␊ |
217 | ␉{ 0x9440,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
218 | ␉{ 0x9440,␉0x24411682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
219 | ␉{ 0x9440,␉0x24441682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
220 | ␉{ 0x9440,␉0x24451682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
221 | ␊ |
222 | ␉{ 0x9441,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
223 | ␊ |
224 | ␉{ 0x9442,␉0x24701682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
225 | ␉{ 0x9442,␉0x24711682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
226 | ␉{ 0x9442,␉0x080110B0,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
227 | ␉{ 0x9442,␉0xE104174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
228 | ␊ |
229 | ␉{ 0x944A,␉0x30001682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
230 | ␉{ 0x944A,␉0x30001043,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
231 | ␉{ 0x944A,␉0x30001458,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
232 | ␉{ 0x944A,␉0x30001462,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
233 | ␉{ 0x944A,␉0x30001545,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
234 | ␉{ 0x944A,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
235 | ␉{ 0x944A,␉0x3000174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
236 | ␉{ 0x944A,␉0x300017AF,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
237 | ␊ |
238 | ␉{ 0x944C,␉0x24801682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
239 | ␉{ 0x944C,␉0x24811682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
240 | ␊ |
241 | ␉{ 0x944E,␉0x3260174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
242 | ␉{ 0x944E,␉0x3261174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 series",␉␉kMotmot␉␉},␊ |
243 | ␉{ 0x944E,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4730 Series",␉␉kMotmot␉␉},␊ |
244 | ␉{ 0x944E,␉0x30101787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
245 | ␉{ 0x944E,␉0x31001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4820",␉␉␉␉kMotmot␉␉},␊ |
246 | ␊ |
247 | ␉{ 0x9490,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
248 | ␉{ 0x9490,␉0x4710174B,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
249 | ␉{ 0x9490,␉0x300017AF,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
250 | ␊ |
251 | ␉{ 0x9498,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4700",␉␉␉␉kNull␉␉},␊ |
252 | ␉{ 0x9498,␉0x31001787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4720",␉␉␉␉kNull␉␉},␊ |
253 | ␉{ 0x9498,␉0x24511682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
254 | ␉{ 0x9498,␉0x24521682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
255 | ␉{ 0x9498,␉0x24541682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
256 | ␉{ 0x9498,␉0x29331682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
257 | ␉{ 0x9498,␉0x29341682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
258 | ␉{ 0x9498,␉0x21CF1458,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kNull␉␉},␊ |
259 | ␊ |
260 | ␉{ 0x94B3,␉0x29001682,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
261 | ␉{ 0x94B3,␉0x1170174B,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
262 | ␉{ 0x94B3,␉0x10020D00,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
263 | ␊ |
264 | ␉{ 0x94C1,␉0x10021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
265 | ␉{ 0x94C1,␉0x0D021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
266 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
267 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
268 | ␉{ 0x94C1,␉0x21741458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
269 | ␉{ 0x94C1,␉0x10401462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
270 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
271 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
272 | ␉{ 0x94C1,␉0x11101462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
273 | ␊ |
274 | ␉{ 0x94C3,␉0x37161642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
275 | ␉{ 0x94C3,␉0x30001642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
276 | ␉{ 0x94C3,␉0x03421002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
277 | ␉{ 0x94C3,␉0x30001025,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
278 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
279 | ␉{ 0x94C3,␉0x03021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
280 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
281 | ␉{ 0x94C3,␉0x216A1458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
282 | ␉{ 0x94C3,␉0x21721458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
283 | ␉{ 0x94C3,␉0x30001458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
284 | ␉{ 0x94C3,␉0x11041462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
285 | ␉{ 0x94C3,␉0x10411462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
286 | ␉{ 0x94C3,␉0x11051462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
287 | ␉{ 0x94C3,␉0x10321462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
288 | ␉{ 0x94C3,␉0x30001462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
289 | ␉{ 0x94C3,␉0x3000148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
290 | ␉{ 0x94C3,␉0x2247148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
291 | ␉{ 0x94C3,␉0x3000174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
292 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
293 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
294 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
295 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
296 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
297 | ␉{ 0x94C3,␉0x203817AF,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
298 | ␉{ 0x94C3,␉0x30001787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
299 | ␉{ 0x94C3,␉0x22471787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
300 | ␉{ 0x94C3,␉0x01011A93,␉CHIP_FAMILY_RV610,␉␉"Qimonda Radeon HD 2400 PRO",␉␉kNull␉␉},␊ |
301 | ␊ |
302 | ␊ |
303 | ␉{ 0x9501,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
304 | ␉{ 0x9501,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870",␉␉␉␉kNull␉␉},␊ |
305 | ␉{ 0x9501,␉0x4750174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
306 | ␉{ 0x9501,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
307 | ␉{ 0x9501,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
308 | ␊ |
309 | ␉{ 0x9505,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
310 | ␉{ 0x9505,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
311 | ␉{ 0x9505,␉0x30011043,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
312 | ␉{ 0x9505,␉0x3000148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
313 | ␉{ 0x9505,␉0x3002148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
314 | ␉{ 0x9505,␉0x3001148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
315 | ␉{ 0x9505,␉0x3003148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
316 | ␉{ 0x9505,␉0x3004148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
317 | ␉{ 0x9505,␉0x4730174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
318 | ␉{ 0x9505,␉0x3010174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
319 | ␉{ 0x9505,␉0x3001174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
320 | ␉{ 0x9505,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
321 | ␉{ 0x9505,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
322 | ␉{ 0x9505,␉0x301017AF,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
323 | ␊ |
324 | ␉{ 0x9540,␉0x4590174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
325 | ␉{ 0x9540,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
326 | ␊ |
327 | ␉{ 0x954F,␉0x29201682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
328 | ␉{ 0x954F,␉0x29211682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
329 | ␉{ 0x954F,␉0x30901682,␉CHIP_FAMILY_RV710,␉␉"XFX Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
330 | ␉{ 0x954F,␉0x4450174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
331 | ␉{ 0x954F,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
332 | ␉{ 0x954F,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
333 | ␉{ 0x954F,␉0x31001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
334 | ␉{ 0x954F,␉0x4570174B,␉CHIP_FAMILY_RV710,␉␉"Sapphire Radeon HD4570",␉␉␉kNull␉␉},␊ |
335 | ␉{ 0x954F,␉0x301017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
336 | ␊ |
337 | ␉{ 0x9552,␉0x3000148C,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
338 | ␉{ 0x9552,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
339 | ␉{ 0x9552,␉0x30001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
340 | ␉{ 0x9552,␉0x300017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
341 | ␊ |
342 | ␉{ 0x9581,␉0x95811002,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
343 | ␉{ 0x9581,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
344 | ␊ |
345 | ␉{ 0x9583,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
346 | ␉{ 0x9588,␉0x01021A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
347 | ␊ |
348 | ␉{ 0x9589,␉0x30001462,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
349 | ␉{ 0x9589,␉0x30001642,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
350 | ␉{ 0x9589,␉0x0E41174B,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
351 | ␉{ 0x9589,␉0x30001787,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
352 | ␉{ 0x9589,␉0x01001A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 PRO",␉␉kNull␉␉},␊ |
353 | ␊ |
354 | ␉{ 0x9591,␉0x2303148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
355 | ␊ |
356 | ␉{ 0x9598,␉0xB3831002,␉CHIP_FAMILY_RV635,␉␉"ATI All-in-Wonder HD",␉␉␉␉kNull␉␉},␊ |
357 | ␉{ 0x9598,␉0x30011043,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
358 | ␉{ 0x9598,␉0x30001043,␉CHIP_FAMILY_RV635,␉␉"HD3730",␉␉␉␉␉␉␉kNull␉␉},␊ |
359 | ␉{ 0x9598,␉0x3000148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3730",␉␉␉␉kNull␉␉},␊ |
360 | ␉{ 0x9598,␉0x3031148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
361 | ␉{ 0x9598,␉0x3001148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
362 | ␉{ 0x9598,␉0x30011545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 Pro",␉␉kNull␉␉},␊ |
363 | ␉{ 0x9598,␉0x30001545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
364 | ␉{ 0x9598,␉0x4570174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
365 | ␉{ 0x9598,␉0x4580174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
366 | ␉{ 0x9598,␉0x4610174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
367 | ␉{ 0x9598,␉0x3000174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3730",␉␉␉kNull␉␉},␊ |
368 | ␉{ 0x9598,␉0x3001174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3750",␉␉␉kNull␉␉},␊ |
369 | ␉{ 0x9598,␉0x301017AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
370 | ␉{ 0x9598,␉0x301117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
371 | ␉{ 0x9598,␉0x300117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD3750",␉␉␉␉kNull␉␉},␊ |
372 | ␉{ 0x9598,␉0x30501787,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
373 | ␊ |
374 | ␉{ 0x95C0,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
375 | ␉{ 0x95C0,␉0xE3901745,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
376 | ␉{ 0x95C0,␉0x3002174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3570",␉␉␉␉kNull␉␉},␊ |
377 | ␉{ 0x95C0,␉0x3020174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
378 | ␉{ 0x95C0,␉0x3000174B,␉CHIP_FAMILY_RV620,␉␉"Sapphire Radeon HD 3550",␉␉␉kNull␉␉},␊ |
379 | ␊ |
380 | ␉{ 0x95C5,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3450",␉␉␉␉kNull␉␉},␊ |
381 | ␉{ 0x95C5,␉0x3001148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
382 | ␉{ 0x95C5,␉0x3002148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
383 | ␉{ 0x95C5,␉0x3033148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
384 | ␉{ 0x95C5,␉0x3003148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
385 | ␉{ 0x95C5,␉0x3032148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
386 | ␉{ 0x95C5,␉0x3010174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
387 | ␉{ 0x95C5,␉0x4250174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
388 | ␉{ 0x95C5,␉0x30501787,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
389 | ␉{ 0x95C5,␉0x301017AF,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
390 | ␉{ 0x95C5,␉0x01051A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
391 | ␉{ 0x95C5,␉0x01041A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
392 | ␊ |
393 | ␉/* Evergreen */␊ |
394 | ␉{ 0x6898,␉0x032E1043,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
395 | ␉{ 0x6898,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
396 | ␉{ 0x6898,␉0x29611682,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
397 | ␉{ 0x6898,␉0x0B001002,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kZonalis␉},␊ |
398 | ␉{ 0x6898,␉0x00D0106B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kLangur␉␉},␊ |
399 | ␊ |
400 | ␉{ 0x6899,␉0x21E41458,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
401 | ␉{ 0x6899,␉0x200A1787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
402 | ␉{ 0x6899,␉0x22901787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
403 | ␉{ 0x6899,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
404 | ␊ |
405 | ␉{ 0x689C,␉0x03521043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS ARES",␉␉␉␉␉␉kUakari␉␉},␊ |
406 | ␉{ 0x689C,␉0x039E1043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS EAH5870 Series",␉␉␉␉kUakari␉␉},␊ |
407 | ␉{ 0x689C,␉0x30201682,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5970",␉␉␉␉kUakari␉␉},␊ |
408 | ␊ |
409 | ␉{ 0x68B8,␉0xE147174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
410 | ␉{ 0x68B8,␉0x21D71458,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
411 | ␉{ 0x68B8,␉0x1482174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
412 | ␉{ 0x68B8,␉0x29901682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
413 | ␉{ 0x68B8,␉0x29911682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
414 | ␉{ 0x68B8,␉0x200B1787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
415 | ␉{ 0x68B8,␉0x22881787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
416 | ␉{ 0x68B8,␉0x00CF106B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kHoolock␉},␊ |
417 | ␊ |
418 | ␉{ 0x68D8,␉0x301117AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
419 | ␉{ 0x68D8,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
420 | ␉{ 0x68D8,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
421 | ␉{ 0x68D8,␉0x5690174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
422 | ␉{ 0x68D8,␉0x5730174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
423 | ␉{ 0x68D8,␉0x21D91458,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
424 | ␉{ 0x68D8,␉0x03561043,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
425 | ␉{ 0x68D8,␉0xE151174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
426 | ␉{ 0x68D9,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
427 | ␉{ 0x68DA,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
428 | ␉{ 0x68DA,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
429 | ␉{ 0x68DA,␉0x5630174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
430 | ␊ |
431 | ␉{ 0x68E0,␉0x04561028,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470M",␉␉␉␉kEulemur␉},␊ |
432 | ␉{ 0x68E1,␉0x1426103C,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5430M",␉␉␉␉kEulemur␉},␊ |
433 | ␉{ 0x68F9,␉0x301317AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
434 | ␉{ 0x68F9,␉0x301117AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
435 | ␉{ 0x68F9,␉0x301217AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
436 | ␉{ 0x68F9,␉0x30001787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
437 | ␉{ 0x68F9,␉0x30021787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
438 | ␉{ 0x68F9,␉0x30011787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
439 | ␉{ 0x68F9,␉0x5470174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
440 | ␉{ 0x68F9,␉0x5490174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
441 | ␉{ 0x68F9,␉0x5530174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
442 | ␊ |
443 | ␉/* Northen Islands */␊ |
444 | ␉{ 0x6718,␉0x0B001002,␉CHIP_FAMILY_CAYMAN,␉␉"AMD Radeon HD 6970",␉␉␉␉kNull␉␉},␊ |
445 | ␉{ 0x6718,␉0x31301682,␉CHIP_FAMILY_CAYMAN,␉␉"AMD Radeon HD 6970",␉␉␉␉kNull␉␉},␊ |
446 | ␉{ 0x6718,␉0x67181002,␉CHIP_FAMILY_CAYMAN,␉␉"AMD Radeon HD 6970",␉␉␉␉kNull␉␉},␊ |
447 | ␊ |
448 | ␉{ 0x6738,␉0x67381002,␉CHIP_FAMILY_BARTS,␉␉"AMD Radeon HD 6870",␉␉␉␉kDuckweed␉},␊ |
449 | ␉{ 0x6739,␉0x67391002,␉CHIP_FAMILY_BARTS,␉␉"AMD Radeon HD 6850",␉␉␉␉kDuckweed␉},␊ |
450 | ␊ |
451 | ␉{ 0x6759,␉0xE193174B,␉CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6570",␉␉␉␉kNull␉␉},␊ |
452 | ␉␊ |
453 | ␉/* standard/default models */␊ |
454 | ␉{ 0x9400,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
455 | ␉{ 0x9405,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 GT",␉␉␉kNull␉␉},␊ |
456 | ␉{ 0x9440,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
457 | ␉{ 0x9441,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
458 | ␉{ 0x9442,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
459 | ␉{ 0x9443,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850 X2",␉␉␉kMotmot␉␉},␊ |
460 | ␉{ 0x944C,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
461 | ␉{ 0x944E,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4700 Series",␉␉kMotmot␉␉},␊ |
462 | ␉{ 0x9450,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9270",␉␉␉␉kMotmot␉␉},␊ |
463 | ␉{ 0x9452,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9250",␉␉␉␉kMotmot␉␉},␊ |
464 | ␉{ 0x9460,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
465 | ␉{ 0x9462,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
466 | ␉{ 0x9490,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
467 | ␉{ 0x9498,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
468 | ␉{ 0x94B3,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
469 | ␉{ 0x94B4,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4700 Series",␉␉kFlicker␉},␊ |
470 | ␉{ 0x94B5,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
471 | ␉{ 0x94C1,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
472 | ␉{ 0x94C3,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
473 | ␉{ 0x94C7,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350",␉␉␉␉kIago␉␉},␊ |
474 | ␉{ 0x94CC,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
475 | ␊ |
476 | ␉{ 0x9501,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
477 | ␉{ 0x9505,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
478 | ␉{ 0x9507,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3830",␉␉␉␉kMegalodon␉},␊ |
479 | ␉{ 0x950F,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870 X2",␉␉␉kMegalodon␉},␊ |
480 | ␉{ 0x9513,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850 X2",␉␉␉kMegalodon␉},␊ |
481 | ␉{ 0x9519,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"AMD FireStream 9170",␉␉␉␉kMegalodon␉},␊ |
482 | ␉{ 0x9540,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
483 | ␉{ 0x954F,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
484 | ␉{ 0x9588,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 XT",␉␉␉kLamna␉␉},␊ |
485 | ␉{ 0x9589,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 PRO",␉␉␉kLamna␉␉},␊ |
486 | ␉{ 0x958A,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 X2 Series",␉␉kLamna␉␉},␊ |
487 | ␉{ 0x9598,␉0x00000000,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kMegalodon␉},␊ |
488 | ␉{ 0x95C0,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
489 | ␉{ 0x95C5,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
490 | ␊ |
491 | ␉{ 0x9610,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3200 Graphics",␉␉kNull␉␉},␊ |
492 | ␉{ 0x9611,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon 3100 Graphics",␉␉␉kNull␉␉},␊ |
493 | ␉{ 0x9614,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3300 Graphics",␉␉kNull␉␉},␊ |
494 | ␉{ 0x9616,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"AMD 760G",␉␉␉␉␉␉␉kNull␉␉},␊ |
495 | ␊ |
496 | ␉{ 0x9710,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4200",␉␉␉␉kNull␉␉},␊ |
497 | ␉{ 0x9715,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
498 | ␉{ 0x9714,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4290",␉␉␉␉kNull␉␉},␊ |
499 | ␊ |
500 | ␊ |
501 | ␉/* Evergreen */␊ |
502 | ␉{ 0x688D,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"AMD FireStream 9350",␉␉␉␉kUakari␉␉},␊ |
503 | ␊ |
504 | ␉{ 0x6898,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
505 | ␉{ 0x6899,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
506 | ␉{ 0x689E,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
507 | ␉{ 0x689C,␉0x00000000,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5900 Series",␉␉kUakari␉␉},␊ |
508 | ␊ |
509 | ␉{ 0x68B9,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5600 Series",␉␉kVervet␉␉},␊ |
510 | ␉{ 0x68B8,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
511 | ␉{ 0x68BE,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
512 | ␊ |
513 | ␉{ 0x68D8,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5600 Series",␉␉kBaboon␉␉},␊ |
514 | ␉{ 0x68D9,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
515 | ␉{ 0x68DA,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
516 | ␊ |
517 | ␉{ 0x68F9,␉0x00000000,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5400 Series",␉␉kNull␉␉},␊ |
518 | ␊ |
519 | ␉{ 0x6718,␉0x00000000,␉CHIP_FAMILY_CAYMAN,␉␉"AMD Radeon HD 6900 Series",␉␉kNull␉␉},␊ |
520 | ␊ |
521 | ␉/* Northen Islands */␊ |
522 | ␉{ 0x6758,␉0x00000000,␉CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6670",␉␉␉␉kNull␉␉},␊ |
523 | ␉{ 0x6759,␉0x00000000,␉CHIP_FAMILY_TURKS,␉␉"AMD Radeon HD 6500 Series",␉␉kNull␉␉},␊ |
524 | ␊ |
525 | ␉{ 0x6770,␉0x00000000,␉CHIP_FAMILY_CAICOS,␉␉"AMD Radeon HD 6400 Series",␉␉kNull␉␉},␊ |
526 | ␉{ 0x6779,␉0x00000000,␉CHIP_FAMILY_CAICOS,␉␉"AMD Radeon HD 6450 Series",␉␉kNull␉␉},␊ |
527 | ␉␊ |
528 | ␉{ 0x68F9,␉0x00000000,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5400 Series",␉␉kNull␉␉},␊ |
529 | ␊ |
530 | ␉{ 0x0000,␉0x00000000,␉CHIP_FAMILY_UNKNOW,␉␉NULL,␉␉␉␉␉␉␉␉kNull␉␉}␊ |
531 | };␊ |
532 | ␊ |
533 | ␊ |
534 | typedef struct {␊ |
535 | ␉struct DevPropDevice␉*device;␊ |
536 | ␉radeon_card_info_t␉␉*info;␊ |
537 | ␉pci_dt_t ␉␉␉␉*pci_dev;␊ |
538 | ␉uint8_t␉␉␉␉␉*fb;␊ |
539 | ␉uint8_t␉␉␉␉␉*mmio;␊ |
540 | ␉uint8_t␉␉␉␉␉*io;␊ |
541 | ␉uint8_t␉␉␉␉␉*rom;␊ |
542 | ␉uint32_t␉␉␉␉rom_size;␊ |
543 | ␉uint32_t␉␉␉␉vram_size;␊ |
544 | ␉const char␉␉␉␉*cfg_name;␊ |
545 | ␉uint8_t␉␉␉␉␉ports;␊ |
546 | ␉uint32_t␉␉␉␉flags;␊ |
547 | ␉bool␉␉␉␉␉posted;␊ |
548 | } card_t;␊ |
549 | card_t *card;␊ |
550 | ␊ |
551 | /* Flags */␊ |
552 | #define MKFLAG(n)␉␉(1 << n)␊ |
553 | #define FLAGTRUE␉␉MKFLAG(0)␊ |
554 | #define EVERGREEN␉␉MKFLAG(1)␊ |
555 | ␊ |
556 | static uint8_t atN = 0;␊ |
557 | ␊ |
558 | typedef struct {␊ |
559 | ␉type_t␉␉type;␊ |
560 | ␉uint32_t␉size;␊ |
561 | ␉uint8_t␉␉*data;␊ |
562 | } value_t;␊ |
563 | ␊ |
564 | static value_t aty_name;␊ |
565 | static value_t aty_nameparent;␊ |
566 | //static value_t aty_model;␊ |
567 | ␊ |
568 | #define DATVAL(x)␉␉{kPtr, sizeof(x), (uint8_t *)x}␊ |
569 | #define STRVAL(x)␉␉{kStr, sizeof(x), (uint8_t *)x}␊ |
570 | #define BYTVAL(x)␉␉{kCst, 1, (uint8_t *)x}␊ |
571 | #define WRDVAL(x)␉␉{kCst, 2, (uint8_t *)x}␊ |
572 | #define DWRVAL(x)␉␉{kCst, 4, (uint8_t *)x}␊ |
573 | #define QWRVAL(x)␉␉{kCst, 8, (uint8_t *)x}␊ |
574 | #define NULVAL␉␉␉{kNul, 0, (uint8_t *)NULL}␊ |
575 | ␊ |
576 | bool get_bootdisplay_val(value_t *val);␊ |
577 | bool get_vrammemory_val(value_t *val);␊ |
578 | bool get_name_val(value_t *val);␊ |
579 | bool get_nameparent_val(value_t *val);␊ |
580 | bool get_model_val(value_t *val);␊ |
581 | bool get_conntype_val(value_t *val);␊ |
582 | bool get_vrammemsize_val(value_t *val);␊ |
583 | bool get_binimage_val(value_t *val);␊ |
584 | bool get_romrevision_val(value_t *val);␊ |
585 | bool get_deviceid_val(value_t *val);␊ |
586 | bool get_mclk_val(value_t *val);␊ |
587 | bool get_sclk_val(value_t *val);␊ |
588 | bool get_refclk_val(value_t *val);␊ |
589 | bool get_platforminfo_val(value_t *val);␊ |
590 | bool get_vramtotalsize_val(value_t *val);␊ |
591 | ␊ |
592 | typedef struct {␊ |
593 | ␉uint32_t␉flags;␊ |
594 | ␉bool␉␉all_ports;␊ |
595 | ␉char␉␉*name;␊ |
596 | ␉bool␉␉(*get_value)(value_t *val);␊ |
597 | ␉value_t␉␉default_val;␊ |
598 | } dev_prop_t;␊ |
599 | ␊ |
600 | dev_prop_t ati_devprop_list[] = {␊ |
601 | ␉{FLAGTRUE,␉false,␉"@0,AAPL,boot-display",␉␉get_bootdisplay_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
602 | //␉{FLAGTRUE,␉false,␉"@0,ATY,EFIDisplay",␉␉NULL,␉␉␉␉␉STRVAL("TMDSA")␉␉␉␉␉},␊ |
603 | ␊ |
604 | //␉{FLAGTRUE,␉true,␉"@0,AAPL,vram-memory",␉␉get_vrammemory_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
605 | //␉{FLAGTRUE,␉true,␉"@0,compatible",␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
606 | //␉{FLAGTRUE,␉true,␉"@0,connector-type",␉␉get_conntype_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
607 | //␉{FLAGTRUE,␉true,␉"@0,device_type",␉␉␉NULL,␉␉␉␉␉STRVAL("display")␉␉␉␉},␊ |
608 | //␉{FLAGTRUE,␉false,␉"@0,display-connect-flags",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
609 | //␉{FLAGTRUE,␉true,␉"@0,display-type",␉␉␉NULL,␉␉␉␉␉STRVAL("NONE")␉␉␉␉␉},␊ |
610 | ␉{FLAGTRUE,␉true,␉"@0,name",␉␉␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
611 | //␉{FLAGTRUE,␉true,␉"@0,VRAM,memsize",␉␉␉get_vrammemsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
612 | ␊ |
613 | //␉{FLAGTRUE,␉false,␉"AAPL,aux-power-connected",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)1)␉␉␉␉},␊ |
614 | //␉{FLAGTRUE,␉false,␉"AAPL,backlight-control",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
615 | ␉{FLAGTRUE,␉false,␉"ATY,bin_image",␉␉␉get_binimage_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
616 | ␉{FLAGTRUE,␉false,␉"ATY,Copyright",␉␉␉NULL,␉STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010")␉},␊ |
617 | ␉{FLAGTRUE,␉false,␉"ATY,Card#",␉␉␉␉get_romrevision_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
618 | ␉{FLAGTRUE,␉false,␉"ATY,VendorID",␉␉␉␉NULL,␉␉␉␉␉WRDVAL((uint16_t)0x1002)␉␉},␊ |
619 | ␉{FLAGTRUE,␉false,␉"ATY,DeviceID",␉␉␉␉get_deviceid_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
620 | ␊ |
621 | //␉{FLAGTRUE,␉false,␉"ATY,MCLK",␉␉␉␉␉get_mclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
622 | //␉{FLAGTRUE,␉false,␉"ATY,SCLK",␉␉␉␉␉get_sclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
623 | //␉{FLAGTRUE,␉false,␉"ATY,RefCLK",␉␉␉␉get_refclk_val,␉␉␉DWRVAL((uint32_t)0x0a8c)␉␉},␊ |
624 | ␊ |
625 | //␉{FLAGTRUE,␉false,␉"ATY,PlatformInfo",␉␉␉get_platforminfo_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
626 | ␊ |
627 | ␉{FLAGTRUE,␉false,␉"name",␉␉␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
628 | ␉{FLAGTRUE,␉false,␉"device_type",␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
629 | ␉{FLAGTRUE,␉false,␉"model",␉␉␉␉␉get_model_val,␉␉␉STRVAL("ATI Radeon")␉␉␉},␊ |
630 | //␉{FLAGTRUE,␉false,␉"VRAM,totalsize",␉␉␉get_vramtotalsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
631 | ␊ |
632 | ␉{FLAGTRUE,␉false,␉NULL,␉␉␉␉␉␉NULL,␉␉␉␉␉NULVAL␉␉␉␉␉␉␉}␊ |
633 | };␊ |
634 | ␊ |
635 | bool get_bootdisplay_val(value_t *val)␊ |
636 | {␊ |
637 | ␉static uint32_t v = 0;␊ |
638 | ␊ |
639 | ␉if (v)␊ |
640 | ␉␉return false;␊ |
641 | ␊ |
642 | ␉if (!card->posted)␊ |
643 | ␉␉return false;␊ |
644 | ␊ |
645 | ␉v = 1;␊ |
646 | ␉val->type = kCst;␊ |
647 | ␉val->size = 4;␊ |
648 | ␉val->data = (uint8_t *)&v;␊ |
649 | ␊ |
650 | ␉return true;␊ |
651 | }␊ |
652 | ␊ |
653 | bool get_vrammemory_val(value_t *val)␊ |
654 | {␊ |
655 | ␉return false;␊ |
656 | }␊ |
657 | ␊ |
658 | bool get_name_val(value_t *val)␊ |
659 | {␊ |
660 | ␉val->type = aty_name.type;␊ |
661 | ␉val->size = aty_name.size;␊ |
662 | ␉val->data = aty_name.data;␊ |
663 | ␊ |
664 | ␉return true;␊ |
665 | }␊ |
666 | ␊ |
667 | bool get_nameparent_val(value_t *val)␊ |
668 | {␊ |
669 | ␉val->type = aty_nameparent.type;␊ |
670 | ␉val->size = aty_nameparent.size;␊ |
671 | ␉val->data = aty_nameparent.data;␊ |
672 | ␊ |
673 | ␉return true;␊ |
674 | }␊ |
675 | ␊ |
676 | bool get_model_val(value_t *val)␊ |
677 | {␊ |
678 | ␉if (!card->info->model_name)␊ |
679 | ␉␉return false;␊ |
680 | ␊ |
681 | ␉val->type = kStr;␊ |
682 | ␉val->size = strlen(card->info->model_name) + 1;␊ |
683 | ␉val->data = (uint8_t *)card->info->model_name;␊ |
684 | ␊ |
685 | ␉return true;␊ |
686 | }␊ |
687 | ␊ |
688 | bool get_conntype_val(value_t *val)␊ |
689 | {␊ |
690 | /*␊ |
691 | Connector types:␊ |
692 | 0x4 : DisplayPort␊ |
693 | 0x400: DL DVI-I␊ |
694 | 0x800: HDMI␊ |
695 | */␊ |
696 | ␉return false;␊ |
697 | }␊ |
698 | ␊ |
699 | bool get_vrammemsize_val(value_t *val)␊ |
700 | {␊ |
701 | ␉static int idx = -1;␊ |
702 | ␉static uint64_t memsize;␊ |
703 | ␊ |
704 | ␉idx++;␊ |
705 | ␉memsize = ((uint64_t)card->vram_size << 32);␊ |
706 | ␉if (idx == 0)␊ |
707 | ␉␉memsize = memsize | (uint64_t)card->vram_size;␊ |
708 | ␊ |
709 | ␉val->type = kCst;␊ |
710 | ␉val->size = 8;␊ |
711 | ␉val->data = (uint8_t *)&memsize;␊ |
712 | ␊ |
713 | ␉return true;␊ |
714 | }␊ |
715 | ␊ |
716 | bool get_binimage_val(value_t *val)␊ |
717 | {␊ |
718 | ␉if (!card->rom)␊ |
719 | ␉␉return false;␊ |
720 | ␊ |
721 | ␉val->type = kPtr;␊ |
722 | ␉val->size = card->rom_size;␊ |
723 | ␉val->data = card->rom;␊ |
724 | ␊ |
725 | ␉return true;␊ |
726 | }␊ |
727 | ␊ |
728 | bool get_romrevision_val(value_t *val)␊ |
729 | {␊ |
730 | ␉uint8_t *rev;␊ |
731 | ␉if (!card->rom)␊ |
732 | ␉␉return false;␊ |
733 | ␊ |
734 | ␉rev = card->rom + *(uint8_t *)(card->rom + OFFSET_TO_GET_ATOMBIOS_STRINGS_START);␊ |
735 | ␊ |
736 | ␉val->type = kPtr;␊ |
737 | ␉val->size = strlen((char *)rev);␊ |
738 | ␉val->data = malloc(val->size);␊ |
739 | ␊ |
740 | ␉if (!val->data)␊ |
741 | ␉␉return false;␊ |
742 | ␉␊ |
743 | ␉memcpy(val->data, rev, val->size);␊ |
744 | ␊ |
745 | ␉return true;␊ |
746 | }␊ |
747 | ␊ |
748 | bool get_deviceid_val(value_t *val)␊ |
749 | {␊ |
750 | ␉val->type = kCst;␊ |
751 | ␉val->size = 2;␊ |
752 | ␉val->data = (uint8_t *)&card->pci_dev->device_id;␊ |
753 | ␊ |
754 | ␉return true;␊ |
755 | }␊ |
756 | ␊ |
757 | bool get_mclk_val(value_t *val)␊ |
758 | {␊ |
759 | ␉return false;␊ |
760 | }␊ |
761 | ␊ |
762 | bool get_sclk_val(value_t *val)␊ |
763 | {␊ |
764 | ␉return false;␊ |
765 | }␊ |
766 | ␊ |
767 | bool get_refclk_val(value_t *val)␊ |
768 | {␊ |
769 | ␉return false;␊ |
770 | }␊ |
771 | ␊ |
772 | bool get_platforminfo_val(value_t *val)␊ |
773 | {␊ |
774 | ␉val->data = malloc(0x80);␊ |
775 | ␉if (!val->data)␊ |
776 | ␉␉return false;␊ |
777 | ␊ |
778 | ␉bzero(val->data, 0x80);␊ |
779 | ␊ |
780 | ␉val->type␉␉= kPtr;␊ |
781 | ␉val->size␉␉= 0x80;␊ |
782 | ␉val->data[0]␉= 1;␊ |
783 | ␊ |
784 | ␉return true;␊ |
785 | }␊ |
786 | ␊ |
787 | bool get_vramtotalsize_val(value_t *val)␊ |
788 | {␊ |
789 | ␉val->type = kCst;␊ |
790 | ␉val->size = 4;␊ |
791 | ␉val->data = (uint8_t *)&card->vram_size;␊ |
792 | ␊ |
793 | ␉return true;␊ |
794 | }␊ |
795 | ␊ |
796 | void free_val(value_t *val)␊ |
797 | {␊ |
798 | ␉if (val->type == kPtr)␊ |
799 | ␉␉free(val->data);␊ |
800 | ␉bzero(val, sizeof(value_t));␊ |
801 | }␊ |
802 | ␊ |
803 | void devprop_add_list(dev_prop_t devprop_list[])␊ |
804 | {␊ |
805 | ␉value_t *val = malloc(sizeof(value_t));␊ |
806 | ␉int i, pnum;␊ |
807 | ␉for (i = 0; devprop_list[i].name != NULL; i++)␊ |
808 | ␉␉if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))␊ |
809 | ␉␉␉if (devprop_list[i].get_value && devprop_list[i].get_value(val))␊ |
810 | ␉␉␉{␊ |
811 | ␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
812 | ␉␉␉␉free_val(val);␊ |
813 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
814 | ␉␉␉␉{␊ |
815 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
816 | ␉␉␉␉␉{␊ |
817 | ␉␉␉␉␉␉if (devprop_list[i].get_value(val))␊ |
818 | ␉␉␉␉␉␉{␊ |
819 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
820 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
821 | ␉␉␉␉␉␉␉free_val(val);␊ |
822 | ␉␉␉␉␉␉}␊ |
823 | ␉␉␉␉␉}␊ |
824 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
825 | ␉␉␉␉}␊ |
826 | ␉␉␉}␊ |
827 | ␉␉␉else␊ |
828 | ␉␉␉{␊ |
829 | ␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
830 | ␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
831 | ␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
832 | ␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
833 | ␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
834 | ␊ |
835 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
836 | ␉␉␉␉{␊ |
837 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
838 | ␉␉␉␉␉{␊ |
839 | ␉␉␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
840 | ␉␉␉␉␉␉{␊ |
841 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
842 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
843 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
844 | ␉␉␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
845 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
846 | ␉␉␉␉␉␉}␊ |
847 | ␉␉␉␉␉}␊ |
848 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
849 | ␉␉␉␉}␊ |
850 | ␉␉␉}␊ |
851 | ␊ |
852 | ␉free(val);␊ |
853 | }␊ |
854 | ␊ |
855 | ␊ |
856 | bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)␊ |
857 | {␊ |
858 | ␉option_rom_pci_header_t *rom_pci_header;␊ |
859 | ␉␊ |
860 | ␉if (rom_header->signature != 0xaa55)␊ |
861 | ␉␉return false;␊ |
862 | ␊ |
863 | ␉rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);␊ |
864 | ␊ |
865 | ␉if (rom_pci_header->signature != 0x52494350)␊ |
866 | ␉␉return false;␊ |
867 | ␊ |
868 | ␉if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)␊ |
869 | ␉␉return false;␊ |
870 | ␊ |
871 | ␉return true;␊ |
872 | }␊ |
873 | ␊ |
874 | bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)␊ |
875 | {␊ |
876 | ␉int␉fd;␊ |
877 | ␉char file_name[24];␊ |
878 | ␉bool do_load = false;␊ |
879 | ␊ |
880 | ␉getBoolForKey(key, &do_load, &bootInfo->bootConfig);␊ |
881 | ␉if (!do_load)␊ |
882 | ␉␉return false;␊ |
883 | ␊ |
884 | ␉sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);␊ |
885 | ␉if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)␊ |
886 | ␉␉return false;␊ |
887 | ␊ |
888 | ␉card->rom_size = file_size(fd);␊ |
889 | ␉card->rom = malloc(card->rom_size);␊ |
890 | ␉if (!card->rom)␊ |
891 | ␉␉return false;␊ |
892 | ␊ |
893 | ␉read(fd, (char *)card->rom, card->rom_size);␊ |
894 | ␉␊ |
895 | ␉if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))␊ |
896 | ␉{␊ |
897 | ␉␉card->rom_size = 0;␊ |
898 | ␉␉card->rom = 0;␊ |
899 | ␉␉return false;␊ |
900 | ␉}␊ |
901 | ␊ |
902 | ␉card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;␊ |
903 | ␊ |
904 | ␉close(fd);␊ |
905 | ␊ |
906 | ␉return true;␊ |
907 | }␊ |
908 | ␊ |
909 | void get_vram_size(void)␊ |
910 | {␊ |
911 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
912 | ␊ |
913 | ␉card->vram_size = 0;␊ |
914 | ␊ |
915 | ␉if (chip_family >= CHIP_FAMILY_CEDAR)␊ |
916 | ␉␉/* size in MB on evergreen */␊ |
917 | ␉␉/* XXX watch for overflow!!! */␊ |
918 | ␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;␊ |
919 | ␉else␊ |
920 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
921 | ␉␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);␊ |
922 | }␊ |
923 | ␊ |
924 | bool read_vbios(bool from_pci)␊ |
925 | {␊ |
926 | ␉option_rom_header_t *rom_addr;␊ |
927 | ␊ |
928 | ␉if (from_pci)␊ |
929 | ␉{␊ |
930 | ␉␉rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);␊ |
931 | ␉␉verbose(" @0x%x", rom_addr);␊ |
932 | ␉}␊ |
933 | ␉else␊ |
934 | ␉␉rom_addr = (option_rom_header_t *)0xc0000;␊ |
935 | ␊ |
936 | ␉if (!validate_rom(rom_addr, card->pci_dev))␊ |
937 | ␉␉return false;␊ |
938 | ␊ |
939 | ␉card->rom_size = rom_addr->rom_size * 512;␊ |
940 | ␉if (!card->rom_size)␊ |
941 | ␉␉return false;␊ |
942 | ␊ |
943 | ␉card->rom = malloc(card->rom_size);␊ |
944 | ␉if (!card->rom)␊ |
945 | ␉␉return false;␊ |
946 | ␊ |
947 | ␉memcpy(card->rom, (void *)rom_addr, card->rom_size);␊ |
948 | ␊ |
949 | ␉return true;␊ |
950 | }␊ |
951 | ␊ |
952 | bool read_disabled_vbios(void)␊ |
953 | {␊ |
954 | ␉bool ret = false;␊ |
955 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
956 | ␊ |
957 | ␉if (chip_family >= CHIP_FAMILY_RV770)␊ |
958 | ␉{␊ |
959 | ␉␉uint32_t viph_control␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
960 | ␉␉uint32_t bus_cntl␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
961 | ␉␉uint32_t d1vga_control␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
962 | ␉␉uint32_t d2vga_control␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
963 | ␉␉uint32_t vga_render_control␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
964 | ␉␉uint32_t rom_cntl␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
965 | ␉␉uint32_t cg_spll_func_cntl␉= 0;␊ |
966 | ␉␉uint32_t cg_spll_status;␊ |
967 | ␊ |
968 | ␉␉/* disable VIP */␊ |
969 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
970 | ␊ |
971 | ␉␉/* enable the rom */␊ |
972 | ␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
973 | ␊ |
974 | ␉␉/* Disable VGA mode */␊ |
975 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
976 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
977 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
978 | ␊ |
979 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
980 | ␉␉{␊ |
981 | ␉␉␉cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);␊ |
982 | ␊ |
983 | ␉␉␉/* enable bypass mode */␊ |
984 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));␊ |
985 | ␊ |
986 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
987 | ␉␉␉cg_spll_status = 0;␊ |
988 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
989 | ␉␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
990 | ␊ |
991 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));␊ |
992 | ␉␉}␊ |
993 | ␉␉else␊ |
994 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));␊ |
995 | ␊ |
996 | ␉␉ret = read_vbios(true);␊ |
997 | ␊ |
998 | ␉␉/* restore regs */␊ |
999 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
1000 | ␉␉{␊ |
1001 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);␊ |
1002 | ␊ |
1003 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
1004 | ␉␉␉cg_spll_status = 0;␊ |
1005 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
1006 | ␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
1007 | ␉␉}␊ |
1008 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
1009 | ␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
1010 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
1011 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
1012 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
1013 | ␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
1014 | ␉}␊ |
1015 | ␉else␊ |
1016 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
1017 | ␉␉{␊ |
1018 | ␉␉␉uint32_t viph_control␉␉␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
1019 | ␉␉␉uint32_t bus_cntl␉␉␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
1020 | ␉␉␉uint32_t d1vga_control␉␉␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
1021 | ␉␉␉uint32_t d2vga_control ␉␉␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
1022 | ␉␉␉uint32_t vga_render_control␉␉␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
1023 | ␉␉␉uint32_t rom_cntl␉␉␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
1024 | ␉␉␉uint32_t general_pwrmgt␉␉␉␉= RegRead32(R600_GENERAL_PWRMGT);␊ |
1025 | ␉␉␉uint32_t low_vid_lower_gpio_cntl␉= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);␊ |
1026 | ␉␉␉uint32_t medium_vid_lower_gpio_cntl␉= RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);␊ |
1027 | ␉␉␉uint32_t high_vid_lower_gpio_cntl␉= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);␊ |
1028 | ␉␉␉uint32_t ctxsw_vid_lower_gpio_cntl␉= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);␊ |
1029 | ␉␉␉uint32_t lower_gpio_enable␉␉␉= RegRead32(R600_LOWER_GPIO_ENABLE);␊ |
1030 | ␊ |
1031 | ␉␉␉/* disable VIP */␊ |
1032 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
1033 | ␊ |
1034 | ␉␉␉/* enable the rom */␊ |
1035 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
1036 | ␊ |
1037 | ␉␉␉/* Disable VGA mode */␊ |
1038 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
1039 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
1040 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
1041 | ␉␉␉RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));␊ |
1042 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));␊ |
1043 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));␊ |
1044 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));␊ |
1045 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));␊ |
1046 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));␊ |
1047 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));␊ |
1048 | ␊ |
1049 | ␉␉␉ret = read_vbios(true);␊ |
1050 | ␊ |
1051 | ␉␉␉/* restore regs */␊ |
1052 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
1053 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
1054 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
1055 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
1056 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
1057 | ␉␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
1058 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);␊ |
1059 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);␊ |
1060 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);␊ |
1061 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);␊ |
1062 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);␊ |
1063 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);␊ |
1064 | ␊ |
1065 | ␉␉}␊ |
1066 | ␊ |
1067 | ␉return ret;␊ |
1068 | }␊ |
1069 | ␊ |
1070 | bool radeon_card_posted(void)␊ |
1071 | {␊ |
1072 | ␉uint32_t reg;␊ |
1073 | ␊ |
1074 | ␉/* first check CRTCs */␊ |
1075 | ␉reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);␊ |
1076 | ␉if (reg & RADEON_CRTC_EN)␊ |
1077 | ␉␉return true;␊ |
1078 | ␊ |
1079 | ␉/* then check MEM_SIZE, in case something turned the crtcs off */␊ |
1080 | ␉reg = RegRead32(R600_CONFIG_MEMSIZE);␊ |
1081 | ␉if (reg)␊ |
1082 | ␉␉return true;␊ |
1083 | ␊ |
1084 | ␉return false;␊ |
1085 | }␊ |
1086 | #if 0␊ |
1087 | bool devprop_add_pci_config_space(void)␊ |
1088 | {␊ |
1089 | ␉int offset;␊ |
1090 | ␊ |
1091 | ␉uint8_t *config_space = malloc(0x100);␊ |
1092 | ␉if (!config_space)␊ |
1093 | ␉␉return false;␊ |
1094 | ␊ |
1095 | ␉for (offset = 0; offset < 0x100; offset += 4)␊ |
1096 | ␉␉config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);␊ |
1097 | ␊ |
1098 | ␉devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);␊ |
1099 | ␉free(config_space);␊ |
1100 | ␉return true;␊ |
1101 | }␊ |
1102 | #endif␊ |
1103 | ␊ |
1104 | static bool init_card(pci_dt_t *pci_dev)␊ |
1105 | {␊ |
1106 | ␉char name[24];␊ |
1107 | ␉char name_parent[24];␊ |
1108 | ␉int i;␊ |
1109 | ␉bool add_vbios = true;␊ |
1110 | ␊ |
1111 | ␉card = malloc(sizeof(card_t));␊ |
1112 | ␉if (!card)␊ |
1113 | ␉␉return false;␊ |
1114 | ␉bzero(card, sizeof(card_t));␊ |
1115 | ␊ |
1116 | ␉card->pci_dev = pci_dev;␊ |
1117 | ␊ |
1118 | ␉for (i = 0; radeon_cards[i].device_id ; i++)␊ |
1119 | ␉␉if (radeon_cards[i].device_id == pci_dev->device_id)␊ |
1120 | ␉␉{␊ |
1121 | ␉␉␉card->info = &radeon_cards[i];␊ |
1122 | ␉␉␉if ((radeon_cards[i].subsys_id == 0x00000000) || ␊ |
1123 | ␉␉␉␉(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))␊ |
1124 | ␉␉␉␉break;␊ |
1125 | ␉␉}␊ |
1126 | ␊ |
1127 | ␉if (!card->info->device_id || !card->info->cfg_name)␊ |
1128 | ␉{␊ |
1129 | ␉␉printf("Unsupported card!\n");␊ |
1130 | ␉␉return false;␊ |
1131 | ␉}␊ |
1132 | ␊ |
1133 | ␊ |
1134 | ␉card->fb␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);␊ |
1135 | ␉card->mmio␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);␊ |
1136 | ␉card->io␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);␊ |
1137 | ␊ |
1138 | ␉verbose("Framebuffer @0x%08X MMIO @0x%08X I/O Port @0x%08X ROM Addr @0x%08X\n", ␊ |
1139 | ␉␉card->fb, card->mmio, card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS));␊ |
1140 | ␊ |
1141 | ␉card->posted␉= radeon_card_posted();␊ |
1142 | ␉verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");␊ |
1143 | ␉␊ |
1144 | ␉get_vram_size();␊ |
1145 | ␊ |
1146 | ␉getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->bootConfig);␊ |
1147 | ␊ |
1148 | ␉if (add_vbios)␊ |
1149 | ␉␉if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))␊ |
1150 | ␉␉{␊ |
1151 | ␉␉␉verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");␊ |
1152 | ␉␉␉if (card->posted)␊ |
1153 | ␉␉␉␉read_vbios(false);␊ |
1154 | ␉␉␉else␊ |
1155 | ␉␉␉␉read_disabled_vbios();␊ |
1156 | ␉␉␉verbose("\n");␊ |
1157 | ␉␉}␊ |
1158 | ␊ |
1159 | ␉card->ports = 2; // default␊ |
1160 | ␊ |
1161 | ␉if (card->info->chip_family >= CHIP_FAMILY_CEDAR)␊ |
1162 | ␉{␊ |
1163 | ␉␉card->flags |= EVERGREEN;␊ |
1164 | ␉␉card->ports = 3;␊ |
1165 | ␉}␊ |
1166 | ␊ |
1167 | ␉atN = 0;␊ |
1168 | ␊ |
1169 | ␉card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->bootConfig);␊ |
1170 | ␉if (!card->cfg_name)␊ |
1171 | ␉{␊ |
1172 | ␉␉card->cfg_name = card_configs[card->info->cfg_name].name;␊ |
1173 | ␉␉card->ports = card_configs[card->info->cfg_name].ports;␊ |
1174 | ␉}␊ |
1175 | ␉else␊ |
1176 | ␉{␊ |
1177 | ␉␉for (i = 0; i < kCfgEnd; i++)␊ |
1178 | ␉␉␉if (strcmp(card->cfg_name, card_configs[i].name) == 0)␊ |
1179 | ␉␉␉␉card->ports = card_configs[i].ports;␊ |
1180 | ␉}␊ |
1181 | ␊ |
1182 | ␉sprintf(name, "ATY,%s", card->cfg_name);␊ |
1183 | ␉aty_name.type = kStr;␊ |
1184 | ␉aty_name.size = strlen(name) + 1;␊ |
1185 | ␉aty_name.data = (uint8_t *)name;␊ |
1186 | ␊ |
1187 | ␉sprintf(name_parent, "ATY,%sParent", card->cfg_name);␊ |
1188 | ␉aty_nameparent.type = kStr;␊ |
1189 | ␉aty_nameparent.size = strlen(name_parent) + 1;␊ |
1190 | ␉aty_nameparent.data = (uint8_t *)name_parent;␊ |
1191 | ␊ |
1192 | ␉return true;␊ |
1193 | }␊ |
1194 | ␊ |
1195 | bool setup_ati_devprop(pci_dt_t *ati_dev)␊ |
1196 | {␊ |
1197 | ␉char *devicepath;␊ |
1198 | ␊ |
1199 | ␉if (!init_card(ati_dev))␊ |
1200 | ␉␉return false;␊ |
1201 | ␊ |
1202 | ␉/* ------------------------------------------------- */␊ |
1203 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
1204 | ␉if (!string)␊ |
1205 | ␉␉string = devprop_create_string();␊ |
1206 | ␊ |
1207 | ␉devicepath = get_pci_dev_path(ati_dev);␊ |
1208 | ␉card->device = devprop_add_device(string, devicepath);␊ |
1209 | ␉if (!card->device)␊ |
1210 | ␉␉return false;␊ |
1211 | ␉/* ------------------------------------------------- */␊ |
1212 | ␊ |
1213 | #if 0␊ |
1214 | ␉uint64_t fb␉␉= (uint32_t)card->fb;␊ |
1215 | ␉uint64_t mmio␉= (uint32_t)card->mmio;␊ |
1216 | ␉uint64_t io␉␉= (uint32_t)card->io;␊ |
1217 | ␉devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);␊ |
1218 | ␉devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);␊ |
1219 | ␉devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);␊ |
1220 | #endif␊ |
1221 | ␊ |
1222 | ␉devprop_add_list(ati_devprop_list);␊ |
1223 | ␊ |
1224 | ␉/* ------------------------------------------------- */␊ |
1225 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
1226 | ␉//Azi: tried to fix a malloc error in vain; this is related to XCode 4 compilation!␊ |
1227 | ␉stringdata = malloc(sizeof(uint8_t) * string->length);␊ |
1228 | ␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊ |
1229 | ␉stringlength = string->length;␊ |
1230 | ␉/* ------------------------------------------------- */␊ |
1231 | ␊ |
1232 | ␉verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n", ␊ |
1233 | ␉␉␉chip_family_name[card->info->chip_family], card->info->model_name, ␊ |
1234 | ␉␉␉(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name, ␊ |
1235 | ␉␉␉ati_dev->vendor_id, ati_dev->device_id,␊ |
1236 | ␉␉␉ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id, ␊ |
1237 | ␉␉␉devicepath);␊ |
1238 | ␊ |
1239 | ␉free(card);␊ |
1240 | ␊ |
1241 | ␉return true;␊ |
1242 | }␊ |
1243 | ␊ |
1244 |