Chameleon

Chameleon Commit Details

Date:2013-06-20 05:14:00 (7 years 3 months ago)
Author:ErmaC
Commit:2248
Parents: 2247
Message:- Fix issue 342 booting x86 after rev.2175 (Credits to Mario, Alex and Leon). - Add new CPU Model IDs. - General code cleanup.
Changes:
M/trunk/package/po/es.po
M/trunk/i386/libsaio/acpi_patcher.c
M/trunk/i386/libsaio/gma.c
M/trunk/i386/libsaio/cpu.c
M/trunk/i386/libsaio/fake_efi.c
M/trunk/i386/libsaio/platform.h
M/trunk/i386/libsaio/smbios_getters.c
M/trunk/i386/modules/AcpiCodec/acpi_codec.c
M/trunk/i386/libsaio/nvidia.c
M/trunk/CHANGES
M/trunk/i386/libsaio/cpu.h
M/trunk/i386/libsaio/smbios.c

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trunk/i386/libsaio/acpi_patcher.c
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{
int fd = 0;
char dirSpec[512];
// Try finding 'filename' in the usual places
// Start searching any potential location for ACPI Table
sprintf(dirSpec, "%s", filename);
return fd;
}
void *loadACPITable (const char * filename)
{
void *tableAddr;
const char * dirspec=NULL;
int fd = search_and_get_acpi_fd(filename, &dirspec);
if (fd>=0)
{
tableAddr=(void*)AllocateKernelMemory(file_size (fd));
close (fd);
return NULL;
}
DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
close (fd);
return tableAddr;
void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
{
uint32_t i;
DBG("start finding cpu names. length %d\n", length);
DBG("start finding cpu names. length %d\n", length);
for (i=0; i<length-7; i++)
{
if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
{
DBG("dsdt: %x%x\n", dsdt[i], dsdt[i+1]);
DBG("dsdt: %x%x\n", dsdt[i], dsdt[i+1]);
uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
bool add_name = true;
uint8_t j;
for (j=0; j<4; j++)
{
char c = dsdt[offset+j];
if (!aml_isvalidchar(c))
if (!aml_isvalidchar(c))
{
add_name = false;
verbose("Invalid character found in ProcessorOP 0x%x!\n", c);
break;
}
}
if (add_name)
if (add_name)
{
acpi_cpu_name[acpi_cpu_count] = malloc(4);
memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
i = offset + 5;
if (acpi_cpu_count == 0)
acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
if (acpi_cpu_count == 0)
acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
if (++acpi_cpu_count == 32) return;
}
}
}
DBG("end finding cpu names: cpu names found: %d\n", acpi_cpu_count);
DBG("end finding cpu names: cpu names found: %d\n", acpi_cpu_count);
}
struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x01, 0x79, 0x00
};
char resource_template_register_systemio[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00,
};
if (Platform.CPU.Vendor != 0x756E6547) {
verbose ("Not an Intel platform: C-States will not be generated !!!\n");
return NULL;
}
if (fadt == NULL) {
verbose ("FACP not exists: C-States will not be generated !!!\n");
return NULL;
}
struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
if (dsdt == NULL) {
verbose ("DSDT not found: C-States will not be generated !!!\n");
return NULL;
}
if (acpi_cpu_count == 0)
get_acpi_cpu_names((void*)dsdt, dsdt->Length);
if (acpi_cpu_count > 0)
{
bool c2_enabled = false;
bool c3_enabled = false;
bool c4_enabled = false;
bool cst_using_systemio = false;
getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
struct aml_chunk* root = aml_create_node(NULL);
aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
struct aml_chunk* name = aml_add_name(scop, "CST_");
struct aml_chunk* pack = aml_add_package(name);
aml_add_byte(pack, cstates_count);
struct aml_chunk* tmpl = aml_add_package(pack);
if (cst_using_systemio)
{
aml_add_byte(tmpl, 0x01); // C1
aml_add_word(tmpl, 0x0001); // Latency
aml_add_dword(tmpl, 0x000003e8); // Power
uint8_t p_blk_lo, p_blk_hi;
if (c2_enabled) // C2
{
p_blk_lo = acpi_cpu_p_blk + 4;
p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C2
resource_template_register_systemio[12] = p_blk_hi; // C2
aml_add_word(tmpl, 0x0040); // Latency
aml_add_dword(tmpl, 0x000001f4); // Power
}
if (c4_enabled) // C4
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C4
resource_template_register_systemio[12] = p_blk_hi; // C4
{
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C3
resource_template_register_systemio[12] = p_blk_hi; // C3
aml_add_byte(tmpl, 0x01);// C1
aml_add_word(tmpl, 0x0001);// Latency
aml_add_dword(tmpl, 0x000003e8);// Power
resource_template_register_fixedhw[18] = 0x03;
if (c2_enabled) // C2
{
tmpl = aml_add_package(pack);
aml_add_word(tmpl, 0x0040);// Latency
aml_add_dword(tmpl, 0x000001f4);// Power
}
if (c4_enabled) // C4
{
tmpl = aml_add_package(pack);
aml_add_dword(tmpl, 0x0000015e);// Power
}
}
// Aliaces
int i;
for (i = 0; i < acpi_cpu_count; i++)
{
char name[9];
sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
scop = aml_add_scope(root, name);
aml_add_alias(scop, "CST_", "_CST");
}
aml_calculate_size(root);
struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
aml_write_node(root, (void*)ssdt, 0);
ssdt->Length = root->Size;
ssdt->Checksum = 0;
ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
aml_destroy_node(root);
// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
verbose ("SSDT with CPU C-States generated successfully\n");
return ssdt;
}
else
{
verbose ("ACPI CPUs not found: C-States not generated !!!\n");
}
return NULL;
}
struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
{
{
char ssdt_header[] =
{
0x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
0x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
0x31, 0x03, 0x10, 0x20,/* 1.._*/
};
if (Platform.CPU.Vendor != 0x756E6547) {
verbose ("Not an Intel platform: P-States will not be generated !!!\n");
return NULL;
}
if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
verbose ("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
return NULL;
}
if (acpi_cpu_count == 0)
if (acpi_cpu_count == 0)
get_acpi_cpu_names((void*)dsdt, dsdt->Length);
if (acpi_cpu_count > 0)
if (acpi_cpu_count > 0)
{
struct p_state initial, maximum, minimum, p_states[32];
uint8_t p_states_count = 0;
uint8_t p_states_count = 0;
// Retrieving P-States, ported from code by superhai (c)
switch (Platform.CPU.Family) {
case 0x06:
case 0x06:
{
switch (Platform.CPU.Model)
{
case CPU_MODEL_ATOM:// Intel Atom (45nm)
{
bool cpu_dynamic_fsb = false;
if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
{
wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
delay(1);
cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
}
bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
if (minimum.FID == 0)
{
uint64_t msr;
uint8_t i;
// Probe for lowest fid
for (i = maximum.FID; i >= 0x6; i--)
for (i = maximum.FID; i >= 0x6; i--)
{
msr = rdmsr64(MSR_IA32_PERF_CONTROL);
wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
delay(1);
}
msr = rdmsr64(MSR_IA32_PERF_CONTROL);
wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
intel_waitforsts();
}
if (minimum.VID == maximum.VID)
{
{
uint64_t msr;
uint8_t i;
// Probe for lowest vid
minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
delay(1);
}
msr = rdmsr64(MSR_IA32_PERF_CONTROL);
wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
intel_waitforsts();
}
minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
// Sanity check
if (maximum.CID < minimum.CID)
{
// Finalize P-States
// Find how many P-States machine supports
p_states_count = maximum.CID - minimum.CID + 1;
if (p_states_count > 32)
p_states_count = 32;
uint8_t vidstep;
uint8_t i = 0, u, invalid = 0;
vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
for (u = 0; u < p_states_count; u++)
{
i = u - invalid;
p_states[i].CID = maximum.CID - u;
p_states[i].FID = (p_states[i].CID >> 1);
if (p_states[i].FID < 0x6)
{
if (cpu_dynamic_fsb)
p_states[i].FID = (p_states[i].FID << 1) | 0x80;
}
}
else if (cpu_noninteger_bus_ratio)
{
p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
}
if (i && p_states[i].FID == p_states[i-1].FID)
invalid++;
p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
bool half = p_states[i].FID & 0x40;// = 0x01
bool dfsb = p_states[i].FID & 0x80;// = 0x00
uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
uint32_t halffsb = (fsb + 1) >> 1;// = 200
uint32_t frequency = (multiplier * fsb);// = 3200
p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
}
p_states_count -= invalid;
}
break;
}
}
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_CLARKDALE:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDYBRIDGE_XEON:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
{
if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) ||
(Platform.CPU.Model == CPU_MODEL_JAKETOWN))
{
maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
} else {
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
}
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) ||
(Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE_XEON))
{
maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
} else {
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
}
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
// Sanity check
if (maximum.Control < minimum.Control)
{
{
uint8_t i;
p_states_count = 0;
for (i = maximum.Control; i >= minimum.Control; i--)
{
p_states[p_states_count].Control = i;
}
break;
}
}
default:
verbose ("Unsupported CPU: P-States not generated !!! Unknown CPU Type\n");
break;
}
}
}
// Generating SSDT
if (p_states_count > 0)
{
if (p_states_count > 0)
{
int i;
struct aml_chunk* root = aml_create_node(NULL);
aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
struct aml_chunk* name = aml_add_name(scop, "PSS_");
struct aml_chunk* pack = aml_add_package(name);
for (i = 0; i < p_states_count; i++)
for (i = 0; i < p_states_count; i++)
{
struct aml_chunk* pstt = aml_add_package(pack);
aml_add_dword(pstt, p_states[i].Frequency);
aml_add_dword(pstt, 0x00000000); // Power
aml_add_dword(pstt, 0x0000000A); // Latency
aml_add_dword(pstt, p_states[i].Control);
aml_add_dword(pstt, i+1); // Status
}
// Add aliaces
for (i = 0; i < acpi_cpu_count; i++)
{
char name[9];
sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
scop = aml_add_scope(root, name);
aml_add_alias(scop, "PSS_", "_PSS");
}
aml_calculate_size(root);
struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
aml_write_node(root, (void*)ssdt, 0);
ssdt->Length = root->Size;
ssdt->Checksum = 0;
ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
aml_destroy_node(root);
//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
verbose ("SSDT with CPU P-States generated successfully\n");
return ssdt;
}
}
{
verbose ("ACPI CPUs not found: P-States not generated !!!\n");
}
return NULL;
}
struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
{
extern void setupSystemType();
struct acpi_2_fadt *fadt_mod;
bool fadt_rev2_needed = false;
bool fix_restart;
bool fix_restart_ps2;
const char * value;
// Restart Fix
if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
fix_restart = true;
fix_restart_ps2 = false;
if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2)
fix_restart = true;
else
else
getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
} else {
verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
fix_restart = false;
}
if (fix_restart) fadt_rev2_needed = true;
// Allocate new fadt table
if (fadt->Length < 0x84 && fadt_rev2_needed)
{
{
if(fadt_mod->PM_Profile<=6)
Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
else
else
Platform.Type = 1;/* Set a fixed value (Desktop) */
verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
}
// Set PM_Profile from System-type if only user wanted this value to be forced
if (fadt_mod->PM_Profile != Platform.Type)
{
if (value)
{ // user has overriden the SystemType so take care of it in FACP
if (value)
{
// user has overriden the SystemType so take care of it in FACP
verbose("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
fadt_mod->PM_Profile = Platform.Type;
}
else
{ // PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
}
else
{
// PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
}
}
}
// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
// because we need to take care of facp original content, if it is correct.
setupSystemType();
// Patch FADT to fix restart
if (fix_restart)
{
fadt_mod->Reset_BitWidth= 0x08; // 1 byte
fadt_mod->Reset_BitOffset= 0x00; // Offset 0
fadt_mod->Reset_AccessWidth= 0x01; // Byte access
fadt_mod->Reset_Address= 0x64; // Address of the register
fadt_mod->Reset_Address= 0x64; // Address of the register
fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
msglog("FADT: PS2 Restart Fix applied!\n");
}
}
}
// Patch DSDT Address if we have loaded DSDT.aml
if(new_dsdt)
{
DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
fadt_mod->DSDT=(uint32_t)new_dsdt;
if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
fadt_mod->X_DSDT=(uint32_t)new_dsdt;
DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
verbose("FADT: Using custom DSDT!\n");
}
// Correct the checksum
fadt_mod->Checksum=0;
fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
return fadt_mod;
}
int version;
void *new_dsdt;
const char *filename;
char dirSpec[128];
int len = 0;
// always reset cpu count to 0 when injecting new acpi
acpi_cpu_count = 0;
// always reset cpu count to 0 when injecting new acpi
acpi_cpu_count = 0;
// Try using the file specified with the DSDT option
if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
{
{
sprintf(dirSpec, "DSDT.aml");
}
// Load replacement DSDT
new_dsdt = loadACPITable(dirSpec);
// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
{
return setupAcpiNoMod();
}*/
// Mozodojo: Load additional SSDTs
struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
int ssdt_count=0;
// SSDT Options
bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
DBG("generating p-states config: %d\n", generate_pstates);
DBG("generating c-states config: %d\n", generate_cstates);
DBG("Generating P-States config: %d\n", generate_pstates);
DBG("Generating C-States config: %d\n", generate_cstates);
{
int i;
for (i=0; i<30; i++)
{
char filename[512];
sprintf(filename, i>0?"SSDT-%d.aml":"SSDT.aml", i);
if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) )
{
{
ssdt_count++;
}
else
else
{
break;
}
}
}
// Do the same procedure for both versions of ACPI
for (version=0; version<2; version++) {
struct acpi_2_rsdp *rsdp, *rsdp_mod;
struct acpi_2_rsdt *rsdt, *rsdt_mod;
int rsdplength;
// Find original rsdp
rsdp=(struct acpi_2_rsdp *)(version?getAddressOfAcpi20Table():getAddressOfAcpiTable());
if (!rsdp)
continue;
}
rsdplength=version?rsdp->Length:20;
DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
/* FIXME: no check that memory allocation succeeded
* Copy and patch RSDP,RSDT, XSDT and FADT
* For more info see ACPI Specification pages 110 and following
*/
rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
memcpy(rsdp_mod, rsdp, rsdplength);
memcpy(rsdp_mod, rsdp, rsdplength);
rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
uint32_t *rsdt_entries;
int rsdt_entries_num;
int dropoffset=0, i;
// mozo: using malloc cos I didn't found how to free already allocated kernel memory
rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
memcpy (rsdt_mod, rsdt, rsdt->Length);
char *table=(char *)(rsdt_entries[i]);
if (!table)
continue;
DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
rsdt_entries[i-dropoffset]=rsdt_entries[i];
if (drop_ssdt && tableSign(table, "SSDT"))
{
dropoffset++;
if (tableSign(table, "DSDT"))
{
DBG("DSDT found\n");
if(new_dsdt)
rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
continue;
}
if (tableSign(table, "FACP"))
{
struct acpi_2_fadt *fadt, *fadt_mod;
fadt=(struct acpi_2_fadt *)rsdt_entries[i];
DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
{
printf("FADT incorrect. Not modified\n");
// Generate _CST SSDT
if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
{
DBG("c-states generated\n");
DBG("C-States generated\n");
generate_cstates = false; // Generate SSDT only once!
ssdt_count++;
}
// Generating _PSS SSDT
if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
{
DBG("p-states generated\n");
DBG("P-States generated\n");
generate_pstates = false; // Generate SSDT only once!
ssdt_count++;
}
continue;
}
}
DBG("\n");
// Allocate rsdt in Kernel memory area
rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
rsdt_entries=(uint32_t *)(rsdt_mod+1);
// Mozodojo: Insert additional SSDTs into RSDT
if(ssdt_count>0)
{
int j;
for (j=0; j<ssdt_count; j++)
rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
}
// Correct the checksum of RSDT
DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
rsdt_mod->Checksum=0;
rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
}
else
rsdp_mod->RsdtAddress=0;
printf("RSDT not found or RSDT incorrect\n");
}
if (version)
{
struct acpi_2_xsdt *xsdt, *xsdt_mod;
// FIXME: handle 64-bit address correctly
xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress,
xsdt->Length);
DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
{
uint64_t *xsdt_entries;
int xsdt_entries_num, i;
int dropoffset=0;
// mozo: using malloc cos I didn't found how to free already allocated kernel memory
xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
memcpy(xsdt_mod, xsdt, xsdt->Length);
rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
xsdt_entries=(uint64_t *)(xsdt_mod+1);
char *table=(char *)((uint32_t)(xsdt_entries[i]));
if (!table)
continue;
xsdt_entries[i-dropoffset]=xsdt_entries[i];
if (drop_ssdt && tableSign(table, "SSDT"))
{
dropoffset++;
continue;
}
}
if (tableSign(table, "DSDT"))
{
DBG("DSDT found\n");
if (new_dsdt)
if (new_dsdt)
xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
continue;
{
struct acpi_2_fadt *fadt, *fadt_mod;
fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
fadt->Length);
if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
{
verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
goto drop_xsdt;
}
fadt_mod = patch_fadt(fadt, new_dsdt);
xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
// Generate _CST SSDT
if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
{
generate_cstates = false; // Generate SSDT only once!
ssdt_count++;
}
// Generating _PSS SSDT
if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
{
generate_pstates = false; // Generate SSDT only once!
ssdt_count++;
}
continue;
}
DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
}
// Allocate xsdt in Kernel memory area
xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
xsdt_entries=(uint64_t *)(xsdt_mod+1);
// Mozodojo: Insert additional SSDTs into XSDT
if(ssdt_count>0)
{
int j;
for (j=0; j<ssdt_count; j++)
xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
}
// Correct the checksum of XSDT
else
{
drop_xsdt:
DBG("About to drop XSDT\n");
/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
* A Better strategy would be to generate
*/
rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
verbose("XSDT not found or XSDT incorrect\n");
}
}
// Correct the checksum of RSDP
DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
rsdp_mod->Checksum=0;
rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
DBG("New checksum %d\n", rsdp_mod->Checksum);
if (version)
{
DBG("RSDP: Original extended checksum %d", rsdp_mod->ExtendedChecksum);
rsdp_mod->ExtendedChecksum=0;
rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
}
//verbose("Patched ACPI version %d DSDT\n", version+1);
if (version)
{
trunk/i386/libsaio/gma.c
161161
162162
163163
164
164
165165
166166
167167
......
188188
189189
190190
191
191
192192
193193
194194
......
233233
234234
235235
236
236
237237
238238
239239
......
254254
255255
256256
257
257
258258
259259
260260
......
277277
278278
279279
280
280
281281
282282
283283
......
304304
305305
306306
307
307
308308
309309
310310
311311
312
312
313313
314314
315315
......
325325
326326
327327
328
329
328
329
330330
331331
332332
char*model;
uint8_t BuiltIn =0x00;
uint8_t ClassFix[4] ={ 0x00, 0x00, 0x03, 0x00 };
unsigned intdevice_id;
unsigned intdevice_id;
devicepath = get_pci_dev_path(gma_dev);
}
devprop_add_value(device, "model", (uint8_t*)model, (strlen(model) + 1));
devprop_add_value(device, "device_type", (uint8_t*)"display", 8);
devprop_add_value(device, "device_type", (uint8_t*)"display", 8);
if ((model == (char *)&"Mobile GMA950")
|| (model == (char *)&"Mobile GMA3150"))
else if (model == (char *)&"HD Graphics 2000 Mobile")
{
devprop_add_value(device, "class-code", ClassFix, 4);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
devprop_add_value(device, "AAPL00,PixelFormat", HD2000_vals[0], 4);
devprop_add_value(device, "AAPL00,T1", HD2000_vals[1], 4);
devprop_add_value(device, "AAPL00,T2", HD2000_vals[2], 4);
else if (model == (char *)&"HD Graphics 3000 Mobile")
{
devprop_add_value(device, "class-code", ClassFix, 4);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
devprop_add_value(device, "AAPL00,PixelFormat", HD3000_vals[0], 4);
devprop_add_value(device, "AAPL00,T1", HD3000_vals[1], 4);
devprop_add_value(device, "AAPL00,T2", HD3000_vals[2], 4);
devprop_add_value(device, "built-in", &BuiltIn, 1);
devprop_add_value(device, "class-code", ClassFix, 4);
devprop_add_value(device, "device-id", (uint8_t*)&device_id, sizeof(device_id));
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
devprop_add_value(device, "AAPL,tbl-info", HD2000_tbl_info, 18);
devprop_add_value(device, "AAPL,os-info", HD2000_os_info, 20);
}
case 96:
ig_platform_id = 0x01660000; // 96mb
break;
case 64:
ig_platform_id = 0x01660009; // 64mb
break;
case 32:
case 32:
ig_platform_id = 0x01620005; // 32mb
break;
default:
devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
devprop_add_value(device, "AAPL,ig-platform-id", (uint8_t*)&ig_platform_id, 4);
}
stringdata = malloc(sizeof(uint8_t) * string->length);
stringdata = malloc(sizeof(uint8_t) * string->length);
if (!stringdata)
{
printf("No stringdata.\n");
trunk/i386/libsaio/nvidia.c
15781578
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15811584
15821585
15831586
......
17691772
17701773
17711774
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17751778
......
19551958
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19611964
entries[i+1].type = TYPE_GROUPED;
}
break;
default:
break;
}
break;
}
unsigned long long mem_detect(volatile uint8_t *regs, uint8_t nvCardType, pci_dt_t *nvda_dev, uint32_t device_id, uint32_t subsys_id)
{
unsigned long long vram_size = 0;
// First check if any value exist in the plist
cardList_t * nvcard = FindCardWithIds(device_id, subsys_id);
if (nvcard)
}
else
{
DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
}//end PRAM check
}//end PROM check
trunk/i386/libsaio/cpu.c
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......
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......
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......
491498
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496503
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......
507514
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526533
527534
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......
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571578
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*/
uint64_t timeRDTSC(void)
{
intattempts = 0;
uint64_t latchTime;
uint64_tsaveTime,intermediate;
unsigned int timerValue, lastValue;
//boolean_tint_enabled;
/*
* Table of correction factors to account for
* - timer counter quantization errors, and
* - undercounts 0..5
*/
intattempts = 0;
uint64_t latchTime;
uint64_tsaveTime,intermediate;
unsigned int timerValue, lastValue;
//boolean_tint_enabled;
/*
* Table of correction factors to account for
* - timer counter quantization errors, and
* - undercounts 0..5
*/
#define SAMPLE_CLKS_EXACT(((double) CLKNUM) / 20.0)
#define SAMPLE_CLKS_INT((int) CLKNUM / 20)
#define SAMPLE_NSECS(2000000000LL)
#define SAMPLE_MULTIPLIER(((double)SAMPLE_NSECS)*SAMPLE_CLKS_EXACT)
#define ROUND64(x)((uint64_t)((x) + 0.5))
uint64_tscale[6] = {
uint64_tscale[6] = {
ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-0)),
ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-1)),
ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-2)),
ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-3)),
ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-4)),
ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-5))
};
};
restart:
if (attempts >= 9) // increase to up to 9 attempts.
// This will flash-reboot. TODO: Use tscPanic instead.
* Hz so we need to convert our milliseconds to seconds. Since we're
* dividing by the milliseconds, we simply multiply by 1000.
*/
/* Unlike linux, we're not limited to 32-bit, but we do need to take care
* that we're going to multiply by 1000 first so we do need at least some
* arithmetic headroom. For now, 32-bit should be enough.
intlen, myfsb;
uint8_tbus_ratio_min;
uint32_tmax_ratio, min_ratio;
max_ratio = min_ratio = myfsb = bus_ratio_min = 0;
maxcoef = maxdiv = bus_ratio_max = currcoef = currdiv = 0;
/* get cpuid values */
do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);
do_cpuid(0x00000001, p->CPU.CPUID[CPUID_1]);
do_cpuid(0x00000003, p->CPU.CPUID[CPUID_3]);
do_cpuid2(0x00000004, 0, p->CPU.CPUID[CPUID_4]);
do_cpuid(0x80000000, p->CPU.CPUID[CPUID_80]);
if (p->CPU.CPUID[CPUID_0][0] >= 0x5) {
do_cpuid(5, p->CPU.CPUID[CPUID_5]);
}
if (p->CPU.CPUID[CPUID_0][0] >= 0x5) {
do_cpuid(5, p->CPU.CPUID[CPUID_5]);
}
if (p->CPU.CPUID[CPUID_0][0] >= 6) {
do_cpuid(6, p->CPU.CPUID[CPUID_6]);
do_cpuid(6, p->CPU.CPUID[CPUID_6]);
}
if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 8) {
do_cpuid(0x80000008, p->CPU.CPUID[CPUID_88]);
else if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 1) {
do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);
}
#if DEBUG_CPU
{
inti;
}
}
#endif
p->CPU.Vendor= p->CPU.CPUID[CPUID_0][1];
p->CPU.Signature= p->CPU.CPUID[CPUID_1][0];
p->CPU.Stepping= bitfield(p->CPU.CPUID[CPUID_1][0], 3, 0);
p->CPU.Family= bitfield(p->CPU.CPUID[CPUID_1][0], 11, 8);
p->CPU.ExtModel= bitfield(p->CPU.CPUID[CPUID_1][0], 19, 16);
p->CPU.ExtFamily= bitfield(p->CPU.CPUID[CPUID_1][0], 27, 20);
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&
p->CPU.Family == 0x06 &&
p->CPU.Model >= CPUID_MODEL_NEHALEM &&
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
}
/* get brand string (if supported) */
/* Copyright: from Apple's XNU cpuid.c */
if (p->CPU.CPUID[CPUID_80][0] > 0x80000004) {
if (p->CPU.NoThreads > p->CPU.NoCores) {
p->CPU.Features |= CPU_FEATURE_HTT;
}
tscFrequency = measure_tsc_frequency();
/* if usual method failed */
if ( tscFrequency < 1000 )
}
fsbFrequency = 0;
cpuFrequency = 0;
if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f))) {
int intelCPU = p->CPU.Model;
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)) {
/* Nehalem CPU model */
if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM ||
p->CPU.Model == CPU_MODEL_FIELDS ||
p->CPU.Model == CPU_MODEL_DALES ||
p->CPU.Model == CPU_MODEL_DALES_32NM ||
p->CPU.Model == CPU_MODEL_WESTMERE ||
p->CPU.Model == CPU_MODEL_NEHALEM_EX ||
if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM||
p->CPU.Model == CPU_MODEL_FIELDS||
p->CPU.Model == CPU_MODEL_DALES||
p->CPU.Model == CPU_MODEL_CLARKDALE||
p->CPU.Model == CPU_MODEL_WESTMERE||
p->CPU.Model == CPU_MODEL_NEHALEM_EX||
p->CPU.Model == CPU_MODEL_WESTMERE_EX ||
p->CPU.Model == CPU_MODEL_SANDYBRIDGE ||
p->CPU.Model == CPU_MODEL_JAKETOWN ||
p->CPU.Model == CPU_MODEL_IVYBRIDGE)) {
p->CPU.Model == CPU_MODEL_SANDYBRIDGE_XEON ||
p->CPU.Model == CPU_MODEL_IVYBRIDGE_XEON||
p->CPU.Model == CPU_MODEL_IVYBRIDGE ||
p->CPU.Model == CPU_MODEL_HASWELL_DT ||
p->CPU.Model == CPU_MODEL_HASWELL_MB ||
//p->CPU.Model == CPU_MODEL_HASWELL_H ||
p->CPU.Model == CPU_MODEL_HASWELL_ULT ||
p->CPU.Model == CPU_MODEL_HASWELL_ULX ))
{
msr = rdmsr64(MSR_PLATFORM_INFO);
DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));
bus_ratio_max = bitfield(msr, 14, 8);
}
}
}
if (bus_ratio_max) {
fsbFrequency = (tscFrequency / bus_ratio_max);
}
max_ratio = atoi(newratio);
max_ratio = (max_ratio * 10);
if (len >= 3) max_ratio = (max_ratio + 5);
verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);
// extreme overclockers may love 320 ;)
if ((max_ratio >= min_ratio) && (max_ratio <= 320)) {
cpuFrequency = (fsbFrequency * max_ratio) / 10;
/*if (bus_ratio_max > 0) bus_ratio = flex_ratio;*/
p->CPU.MaxRatio = max_ratio;
p->CPU.MinRatio = min_ratio;
myfsb = fsbFrequency / 1000000;
verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);
currcoef = bus_ratio_max;
maxdiv = bitfield(msr, 46, 46);
/* Non-integer bus ratio for the current-multi (undocumented)*/
currdiv = bitfield(msr, 14, 14);
// This will always be model >= 3
if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0e) || (p->CPU.Family == 0x0f))
{
/* XXX */
maxcoef = currcoef;
}
if (maxcoef) {
if (maxdiv) {
fsbFrequency = ((tscFrequency * 2) / ((maxcoef * 2) + 1));
maxcoef = bitfield(msr, 21, 16) / 2 + 4;
currcoef = bitfield(msr, 5, 0) / 2 + 4;
break;
case 0x01: /* K10 */
msr = rdmsr64(K10_COFVID_STATUS);
do_cpuid2(0x00000006, 0, p->CPU.CPUID[CPUID_6]);
maxcoef = bitfield(msr, 54, 49) / 2 + 4;
currcoef = bitfield(msr, 5, 0) + 0x10;
currdiv = 2 << bitfield(msr, 8, 6);
break;
case 0x05: /* K14 */
msr = rdmsr64(K10_COFVID_STATUS);
currcoef = (bitfield(msr, 54, 49) + 0x10) << 2;
currdiv = (bitfield(msr, 8, 4) + 1) << 2;
currdiv += bitfield(msr, 3, 0);
break;
case 0x02: /* K11 */
// not implimented
break;
}
if (maxcoef)
{
if (currdiv)
DBG("0 ! using the default value for FSB !\n");
}
#endif
p->CPU.MaxCoef = maxcoef;
p->CPU.MaxDiv = maxdiv;
p->CPU.CurrCoef = currcoef;
p->CPU.TSCFrequency = tscFrequency;
p->CPU.FSBFrequency = fsbFrequency;
p->CPU.CPUFrequency = cpuFrequency;
// keep formatted with spaces instead of tabs
DBG("CPU: Brand String: %s\n", p->CPU.BrandString);
DBG("CPU: Vendor/Family/ExtFamily: 0x%x/0x%x/0x%x\n", p->CPU.Vendor, p->CPU.Family, p->CPU.ExtFamily);
trunk/i386/libsaio/platform.h
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......
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#define CPUID_889
#define CPUID_MAX10
#define CPU_MODEL_PRESCOTT0x03// Celeron D, Pentium 4 (90nm)
#define CPU_MODEL_NOCONA0x04// Xeon Nocona, Irwindale (90nm)
#define CPU_MODEL_PRESLER0x06// Pentium 4, Pentium D (65nm)
#define CPU_MODEL_PENTIUM_M0x09// Banias
#define CPU_MODEL_DOTHAN0x0D// Dothan
#define CPU_MODEL_YONAH0x0E// Sossaman, Yonah
#define CPU_MODEL_MEROM0x0F// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom
#define CPU_MODEL_CONROE0x0F//
#define CPU_MODEL_CELERON0x16//
#define CPU_MODEL_PENRYN0x17// Wolfdale, Yorkfield, Harpertown, Penryn
#define CPU_MODEL_WOLFDALE0x17//
#define CPU_MODEL_NEHALEM0x1A// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown
#define CPU_MODEL_ATOM0x1C// Atom
#define CPU_MODEL_ATOM0x1C// Pineview
#define CPU_MODEL_XEON_MP0x1D// MP 7400
#define CPU_MODEL_FIELDS0x1E// Lynnfield, Clarksfield, Jasper Forest
#define CPU_MODEL_DALES0x1F// Havendale, Auburndale
#define CPU_MODEL_DALES_32NM0x25// Clarkdale, Arrandale
#define CPU_MODEL_SANDYBRIDGE0x2A// Sandy Bridge
#define CPU_MODEL_CLARKDALE0x25// Clarkdale, Arrandale
#define CPU_MODEL_ATOM_SAN0x26// Lincroft
#define CPU_MODEL_LINCROFT0x27//
#define CPU_MODEL_SANDYBRIDGE0x2A// Sandy Bridge
#define CPU_MODEL_WESTMERE0x2C// Gulftown, Westmere-EP, Westmere-WS
#define CPU_MODEL_JAKETOWN0x2D// Sandy Bridge-E, Sandy Bridge-EP
#define CPU_MODEL_NEHALEM_EX0x2E// Beckton
#define CPU_MODEL_WESTMERE_EX0x2F
#define CPU_MODEL_SANDYBRIDGE_XEON0x2D// Sandy Bridge-E, Sandy Bridge-EP
#define CPU_MODEL_NEHALEM_EX0x2E// Beckton
#define CPU_MODEL_WESTMERE_EX0x2F// Westmere-EX
#define CPU_MODEL_ATOM_20000x36// Cedarview
#define CPU_MODEL_IVYBRIDGE0x3A// Ivy Bridge
#define CPU_MODEL_HASWELL_DT0x3C// Haswell DT
#define CPU_MODEL_IVYBRIDGE_XEON0x3E// Ivy Bridge Xeon
#define CPU_MODEL_HASWELL_MB0x3F// Haswell MB
//#define CPU_MODEL_HASWELL_H0x??// Haswell H
#define CPU_MODEL_HASWELL_ULT0x45// Haswell ULT
#define CPU_MODEL_HASWELL_ULX0x46// Haswell ULX
/* CPU Features */
#define CPU_FEATURE_MMX0x00000001// MMX Instruction Set
#define SMB_MEM_TYPE_DDR18
#define SMB_MEM_TYPE_DDR219
#define SMB_MEM_TYPE_FBDIMM20
#define SMB_MEM_TYPE_DDR324// Supported in 10.5.6+ AppleSMBIOS
#define SMB_MEM_TYPE_DDR324// Supported in 10.5.6+ AppleSMBIOS
/* Memory Configuration Types */
#define SMB_MEM_CHANNEL_UNKNOWN0
trunk/i386/libsaio/cpu.h
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......
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#define CALIBRATE_LATCH((CLKNUM * CALIBRATE_TIME_MSEC + 1000/2)/1000)
// CPUID Values
#define CPUID_MODEL_YONAH14// Intel Mobile Core Solo, Duo
#define CPUID_MODEL_MEROM15// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
#define CPUID_MODEL_PENRYN23// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
#define CPUID_MODEL_NEHALEM26// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
#define CPUID_MODEL_ATOM28// Intel Atom (45nm)
#define CPUID_MODEL_FIELDS30// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
#define CPUID_MODEL_DALES31// Havendale, Auburndale
#define CPUID_MODEL_DALES_32NM37// Intel Core i3, i5 LGA1156 (32nm)
#define CPUID_MODEL_SANDYBRIDGE42// Intel Core i3, i5, i7 LGA1155 (32nm)
#define CPUID_MODEL_WESTMERE44// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
#define CPUID_MODEL_JAKETOWN45// Intel Xeon E5 LGA2011 (22nm)
#define CPUID_MODEL_NEHALEM_EX46// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
#define CPUID_MODEL_WESTMERE_EX47// Intel Xeon E7
#define CPUID_MODEL_IVYBRIDGE58// Intel Core i5, i7 LGA1155 (22nm)
#define CPUID_MODEL_PRESCOTT3 // 0x03 Celeron D, Pentium 4 (90nm)
#define CPUID_MODEL_NOCONA4 // 0x04 Xeon Nocona, Irwindale (90nm)
#define CPUID_MODEL_PRESLER6 // 0x06 Pentium 4, Pentium D (65nm)
#define CPUID_MODEL_PENTIUM_M9 // 0x09
#define CPUID_MODEL_DOTHAN13 // 0x0D Dothan
#define CPUID_MODEL_YONAH14 // 0x0E Intel Mobile Core Solo, Duo
#define CPUID_MODEL_MEROM15 // 0x0F Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
#define CPUID_MODEL_CONROE15 // 0x0F
#define CPUID_MODEL_CELERON22 // 0x16
#define CPUID_MODEL_PENRYN23 // 0x17 Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
#define CPUID_MODEL_WOLFDALE23 // 0x17
#define CPUID_MODEL_NEHALEM26 // 0x1A Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
#define CPUID_MODEL_ATOM28 // 0x1C Intel Atom (45nm) Pineview, Silverthorne
#define CPUID_MODEL_XEON_MP29 // 0x1D MP 7400
#define CPUID_MODEL_FIELDS30 // 0x1E Intel Core i5, i7, Xeon X34xx LGA1156 (45nm),(Clarksfiled, Lynnfield, Jasper Forest)
#define CPUID_MODEL_DALES31 // 0x1F Havendale, Auburndale
#define CPUID_MODEL_CLARKDALE37 // 0x25 Intel Core i3, i5 LGA1156 (32nm), (Arrandale, Clarksdale)
#define CPUID_MODEL_ATOM_SAN38 // 0x26
#define CPUID_MODEL_LINCROFT39 // 0x27 Intel Atom (45nm) Z6xx (single core)
#define CPUID_MODEL_SANDYBRIDGE42 // 0x2A Intel Core i3, i5, i7 LGA1155 (32nm)
#define CPUID_MODEL_WESTMERE44 // 0x2C Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
#define CPUID_MODEL_SANDYBRIDGE_XEON45 // 0x2D Intel Xeon E5 LGA2011 (32nm), SandyBridge-E, SandyBridge-EN, SandyBridge-EP
#define CPUID_MODEL_NEHALEM_EX46 // 0x2E Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
#define CPUID_MODEL_WESTMERE_EX47 // 0x2F Intel Xeon E7
#define CPUID_MODEL_ATOM_200054 // 0x36 Intel Atom (32nm) Cedarview
#define CPUID_MODEL_IVYBRIDGE58 // 0x3A Intel Core i5, i7 LGA1155 (22nm)
#define CPUID_MODEL_HASWELL_DT60 // 0x3C
#define CPUID_MODEL_IVYBRIDGE_XEON62 // 0x3E
#define CPUID_MODEL_HASWELL_MB63 // 0x3F
//#define CPUID_MODEL_HASWELL_H?? // 0x??
#define CPUID_MODEL_HASWELL_ULT69 // 0x45
#define CPUID_MODEL_HASWELL_ULX70 // 0x46
/* HASWELL-DT HASWELL-MB HASWELL-H HASWELL-ULT HASWELL ULX*/
static inline uint64_t rdtsc64(void)
{
uint64_t ret;
return count;
}
inline static void
set_PIT2(int value)
{
trunk/i386/libsaio/smbios.c
327327
328328
329329
330
330
331331
332332
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335335
336336
337
337
338338
339339
340340
......
571571
572572
573573
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574
575575
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581
582
579583
580584
581585
......
649653
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653657
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655659
{
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_CLARKDALE:// Intel Core i3, i5 LGA1156 (32nm)
defaultBIOSInfo.version= kDefaultiMacNehalemBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacNehalem;
defaultSystemInfo.family= kDefaultiMacFamily;
break;
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_SANDYBRIDGE_XEON:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
defaultBIOSInfo.version= kDefaultiMacSandyBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacSandy;
{
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_CLARKDALE:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPU_MODEL_IVYBRIDGE_XEON:
case CPU_MODEL_SANDYBRIDGE_XEON:// Intel Core i7, Xeon E5 LGA2011 (32nm)
break;
default:
if (((uint16_t *)ptr)[0] == 0)
ptr += 2;
structSize = ptr - (uint8_t *)structPtr->orig;
memcpy((void *)structPtr->new, structPtr->orig, structSize);
}
trunk/i386/libsaio/fake_efi.c
8585
8686
8787
88
88
89
8990
9091
9192
......
9495
9596
9697
97
98
9899
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100101
......
105106
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109110
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......
168169
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......
278279
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......
300301
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......
338339
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......
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......
494495
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......
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......
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......
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static uint8_t const VOIDRET_INSTRUCTIONS[] = {0xc3};
/* movl $0x80000003,%eax; ret */
static uint8_t const UNSUPPORTEDRET_INSTRUCTIONS[] = {0x48, 0xb8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc3};
static uint8_t const UNSUPPORTEDRET_INSTRUCTIONS_32[] = {0xb8, 0x03, 0x00, 0x00, 0x80, 0xc3};
static uint8_t const UNSUPPORTEDRET_INSTRUCTIONS_64[] = {0x48, 0xb8, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc3};
EFI_SYSTEM_TABLE_32 *gST32 = NULL;
EFI_SYSTEM_TABLE_64 *gST64 = NULL;
extern EFI_STATUS addConfigurationTable(EFI_GUID const *pGuid, void *table, char const *alias)
{
EFI_UINTN i = 0;
//Azi: as is, cpu's with em64t will use EFI64 on pre 10.6 systems,
// wich seems to cause no problem. In case it does, force i386 arch.
if (archCpuType == CPU_TYPE_I386)
{
i = gST64->NumberOfTableEntries;
}
// We only do adds, not modifications and deletes like InstallConfigurationTable
if (i >= MAX_CONFIGURATION_TABLE_ENTRIES)
stop("Ran out of space for configuration tables. Increase the reserved size in the code.\n");
if (pGuid == NULL)
return EFI_INVALID_PARAMETER;
if (table != NULL)
{
// FIXME
//((EFI_CONFIGURATION_TABLE_64 *)gST->ConfigurationTable)[i].VendorGuid = *pGuid;
//((EFI_CONFIGURATION_TABLE_64 *)gST->ConfigurationTable)[i].VendorTable = (EFI_PTR64)table;
//++gST->NumberOfTableEntries;
Node *tableNode = DT__AddChild(gEfiConfigurationTableNode, mallocStringForGuid(pGuid));
// Use the pointer to the GUID we just stuffed into the system table
DT__AddProperty(tableNode, "guid", sizeof(EFI_GUID), (void*)pGuid);
// The "table" property is the 32-bit (in our implementation) physical address of the table
DT__AddProperty(tableNode, "table", sizeof(void*) * 2, table);
// Assume the alias pointer is a global or static piece of data
if (alias != NULL)
DT__AddProperty(tableNode, "alias", strlen(alias)+1, (char*)alias);
return EFI_SUCCESS;
}
return EFI_UNSUPPORTED;
EFI_CONFIGURATION_TABLE_32 efiConfigurationTable[MAX_CONFIGURATION_TABLE_ENTRIES];
EFI_CHAR16 firmwareVendor[sizeof(FIRMWARE_VENDOR)/sizeof(EFI_CHAR16)];
uint8_t voidret_instructions[sizeof(VOIDRET_INSTRUCTIONS)/sizeof(uint8_t)];
uint8_t unsupportedret_instructions[sizeof(UNSUPPORTEDRET_INSTRUCTIONS)/sizeof(uint8_t)];
uint8_t unsupportedret_instructions[sizeof(UNSUPPORTEDRET_INSTRUCTIONS_32)/sizeof(uint8_t)];
};
struct fake_efi_pages *fakeEfiPages = (struct fake_efi_pages*)AllocateKernelMemory(sizeof(struct fake_efi_pages));
// Initialize some machine code that will return EFI_UNSUPPORTED for
// functions returning int and simply return for void functions.
memcpy(fakeEfiPages->voidret_instructions, VOIDRET_INSTRUCTIONS, sizeof(VOIDRET_INSTRUCTIONS));
memcpy(fakeEfiPages->unsupportedret_instructions, UNSUPPORTEDRET_INSTRUCTIONS, sizeof(UNSUPPORTEDRET_INSTRUCTIONS));
memcpy(fakeEfiPages->unsupportedret_instructions, UNSUPPORTEDRET_INSTRUCTIONS_32, sizeof(UNSUPPORTEDRET_INSTRUCTIONS_32));
// --------------------------------------------------------------------
// System table
// exited so we can probably get by with leaving the handles as zero.
efiSystemTable->ConsoleInHandle = 0;
efiSystemTable->ConIn = 0;
efiSystemTable->ConsoleOutHandle = 0;
efiSystemTable->ConOut = 0;
efiSystemTable->StandardErrorHandle = 0;
efiSystemTable->StdErr = 0;
efiSystemTable->RuntimeServices = (EFI_PTR32)&fakeEfiPages->efiRuntimeServices;
// According to the EFI spec, BootServices aren't valid after the
// boot process is exited so we can probably do without it.
// Apple didn't provide a definition for it in pexpert/i386/efi.h
// so I'm guessing they don't use it.
efiSystemTable->BootServices = 0;
efiSystemTable->NumberOfTableEntries = 0;
efiSystemTable->ConfigurationTable = (EFI_PTR32)fakeEfiPages->efiConfigurationTable;
// We're done. Now CRC32 the thing so the kernel will accept it.
// Must be initialized to zero before CRC32, done above.
gST32->Hdr.CRC32 = crc32(0L, gST32, gST32->Hdr.HeaderSize);
// --------------------------------------------------------------------
// Runtime services
EFI_RUNTIME_SERVICES_32 *efiRuntimeServices = &fakeEfiPages->efiRuntimeServices;
efiRuntimeServices->Hdr.HeaderSize = sizeof(EFI_RUNTIME_SERVICES_32);
efiRuntimeServices->Hdr.CRC32 = 0;
efiRuntimeServices->Hdr.Reserved = 0;
// There are a number of function pointers in the efiRuntimeServices table.
// These are the Foundation (e.g. core) services and are expected to be present on
// all EFI-compliant machines.Some kernel extensions (notably AppleEFIRuntime)
efiRuntimeServices->SetVariable = (EFI_PTR32)unsupportedret_fp;
efiRuntimeServices->GetNextHighMonotonicCount = (EFI_PTR32)unsupportedret_fp;
efiRuntimeServices->ResetSystem = (EFI_PTR32)voidret_fp;
// We're done.Now CRC32 the thing so the kernel will accept it
efiRuntimeServices->Hdr.CRC32 = crc32(0L, efiRuntimeServices, efiRuntimeServices->Hdr.HeaderSize);
// --------------------------------------------------------------------
// Finish filling in the rest of the boot args that we need.
bootArgs->efiSystemTable = (uint32_t)efiSystemTable;
bootArgs->efiMode = kBootArgsEfiMode32;
// The bootArgs structure as a whole is bzero'd so we don't need to fill in
// things like efiRuntimeServices* and what not.
//
EFI_CONFIGURATION_TABLE_64 efiConfigurationTable[MAX_CONFIGURATION_TABLE_ENTRIES];
EFI_CHAR16 firmwareVendor[sizeof(FIRMWARE_VENDOR)/sizeof(EFI_CHAR16)];
uint8_t voidret_instructions[sizeof(VOIDRET_INSTRUCTIONS)/sizeof(uint8_t)];
uint8_t unsupportedret_instructions[sizeof(UNSUPPORTEDRET_INSTRUCTIONS)/sizeof(uint8_t)];
uint8_t unsupportedret_instructions[sizeof(UNSUPPORTEDRET_INSTRUCTIONS_64)/sizeof(uint8_t)];
};
struct fake_efi_pages *fakeEfiPages = (struct fake_efi_pages*)AllocateKernelMemory(sizeof(struct fake_efi_pages));
// Zero out all the tables in case fields are added later
//bzero(fakeEfiPages, sizeof(struct fake_efi_pages));
// --------------------------------------------------------------------
// Initialize some machine code that will return EFI_UNSUPPORTED for
// functions returning int and simply return for void functions.
memcpy(fakeEfiPages->voidret_instructions, VOIDRET_INSTRUCTIONS, sizeof(VOIDRET_INSTRUCTIONS));
memcpy(fakeEfiPages->unsupportedret_instructions, UNSUPPORTEDRET_INSTRUCTIONS, sizeof(UNSUPPORTEDRET_INSTRUCTIONS));
memcpy(fakeEfiPages->unsupportedret_instructions, UNSUPPORTEDRET_INSTRUCTIONS_64, sizeof(UNSUPPORTEDRET_INSTRUCTIONS_64));
// --------------------------------------------------------------------
// System table
EFI_SYSTEM_TABLE_64 *efiSystemTable = gST64 = &fakeEfiPages->efiSystemTable;
efiSystemTable->Hdr.HeaderSize = sizeof(EFI_SYSTEM_TABLE_64);
efiSystemTable->Hdr.CRC32 = 0; // Initialize to zero and then do CRC32
efiSystemTable->Hdr.Reserved = 0;
efiSystemTable->FirmwareVendor = ptov64((EFI_PTR32)&fakeEfiPages->firmwareVendor);
memcpy(fakeEfiPages->firmwareVendor, FIRMWARE_VENDOR, sizeof(FIRMWARE_VENDOR));
efiSystemTable->FirmwareRevision = FIRMWARE_REVISION;
// XXX: We may need to have basic implementations of ConIn/ConOut/StdErr
// The EFI spec states that all handles are invalid after boot services have been
// exited so we can probably get by with leaving the handles as zero.
efiSystemTable->ConsoleInHandle = 0;
efiSystemTable->ConIn = 0;
efiSystemTable->ConsoleOutHandle = 0;
efiSystemTable->ConOut = 0;
efiSystemTable->StandardErrorHandle = 0;
efiSystemTable->StdErr = 0;
efiSystemTable->RuntimeServices = ptov64((EFI_PTR32)&fakeEfiPages->efiRuntimeServices);
// According to the EFI spec, BootServices aren't valid after the
// boot process is exited so we can probably do without it.
// Apple didn't provide a definition for it in pexpert/i386/efi.h
// so I'm guessing they don't use it.
efiSystemTable->BootServices = 0;
efiSystemTable->NumberOfTableEntries = 0;
efiSystemTable->ConfigurationTable = ptov64((EFI_PTR32)fakeEfiPages->efiConfigurationTable);
// We're done.Now CRC32 the thing so the kernel will accept it
gST64->Hdr.CRC32 = crc32(0L, gST64, gST64->Hdr.HeaderSize);
// --------------------------------------------------------------------
// Runtime services
EFI_RUNTIME_SERVICES_64 *efiRuntimeServices = &fakeEfiPages->efiRuntimeServices;
efiRuntimeServices->Hdr.HeaderSize = sizeof(EFI_RUNTIME_SERVICES_64);
efiRuntimeServices->Hdr.CRC32 = 0;
efiRuntimeServices->Hdr.Reserved = 0;
// There are a number of function pointers in the efiRuntimeServices table.
// These are the Foundation (e.g. core) services and are expected to be present on
// all EFI-compliant machines.Some kernel extensions (notably AppleEFIRuntime)
// but it is nice if we can at least prevent a complete crash by
// at least providing some sort of implementation until one can be provided
// nicely in a kext.
void (*voidret_fp)() = (void*)fakeEfiPages->voidret_instructions;
void (*unsupportedret_fp)() = (void*)fakeEfiPages->unsupportedret_instructions;
efiRuntimeServices->GetTime = ptov64((EFI_PTR32)unsupportedret_fp);
efiRuntimeServices->SetVariable = ptov64((EFI_PTR32)unsupportedret_fp);
efiRuntimeServices->GetNextHighMonotonicCount = ptov64((EFI_PTR32)unsupportedret_fp);
efiRuntimeServices->ResetSystem = ptov64((EFI_PTR32)voidret_fp);
// We're done.Now CRC32 the thing so the kernel will accept it
efiRuntimeServices->Hdr.CRC32 = crc32(0L, efiRuntimeServices, efiRuntimeServices->Hdr.HeaderSize);
// --------------------------------------------------------------------
// Finish filling in the rest of the boot args that we need.
bootArgs->efiSystemTable = (uint32_t)efiSystemTable;
bootArgs->efiMode = kBootArgsEfiMode64;
// The bootArgs structure as a whole is bzero'd so we don't need to fill in
// things like efiRuntimeServices* and what not.
//
const char*src = getStringForKey(key, &bootInfo->smbiosConfig);
EFI_CHAR16* dst = 0;
size_t i = 0;
if (!key || !(*key) || !len || !src) return 0;
*len = strlen(src);
static EFI_CHAR8 uuid[UUID_LEN];
int i, isZero, isOnes;
SMBByte*p;
p = (SMBByte*)Platform.UUID;
for (i=0, isZero=1, isOnes=1; i<UUID_LEN; i++)
{
if (p[i] != 0x00) isZero = 0;
if (p[i] != 0xff) isOnes = 0;
}
if (isZero || isOnes) // empty or setable means: no uuid present
{
verbose("No UUID present in SMBIOS System Information Table\n");
return 0;
}
memcpy(uuid, p, UUID_LEN);
return uuid;
}
// belong to smbios config only ...
const char *sysId = getStringForKey(kSystemID, &bootInfo->chameleonConfig);
EFI_CHAR8*ret = getUUIDFromString(sysId);
if (!sysId || !ret) // try bios dmi info UUID extraction
{
ret = getSmbiosUUID();
sysId = 0;
}
if (!ret) // no bios dmi UUID available, set a fixed value for system-id
ret=getUUIDFromString((sysId = (const char*) SYSTEM_ID));
verbose("Customizing SystemID with : %s\n", getStringFromUUID(ret)); // apply a nice formatting to the displayed output
return ret;
}
EFI_CHAR16* ret16 = 0;
size_t len = 0;
Node*node;
node = DT__FindNode("/", false);
if (node == 0) stop("Couldn't get root node");
// We could also just do DT__FindNode("/efi/platform", true)
// But I think eventually we want to fill stuff in the efi node
// too so we might as well create it so we have a pointer for it too.
node = DT__AddChild(node, "efi");
if (archCpuType == CPU_TYPE_I386)
{
DT__AddProperty(node, FIRMWARE_ABI_PROP, sizeof(FIRMWARE_ABI_32_PROP_VALUE), (char*)FIRMWARE_ABI_32_PROP_VALUE);
{
DT__AddProperty(node, FIRMWARE_ABI_PROP, sizeof(FIRMWARE_ABI_64_PROP_VALUE), (char*)FIRMWARE_ABI_64_PROP_VALUE);
}
DT__AddProperty(node, FIRMWARE_REVISION_PROP, sizeof(FIRMWARE_REVISION), (EFI_UINT32*)&FIRMWARE_REVISION);
DT__AddProperty(node, FIRMWARE_VENDOR_PROP, sizeof(FIRMWARE_VENDOR), (EFI_CHAR16*)FIRMWARE_VENDOR);
// TODO: Fill in other efi properties if necessary
// Set up the /efi/runtime-services table node similar to the way a child node of configuration-table
// is set up. That is, name and table properties
Node *runtimeServicesNode = DT__AddChild(node, "runtime-services");
if (archCpuType == CPU_TYPE_I386)
{
// The value of the table property is the 32-bit physical address for the RuntimeServices table.
// Since the EFI system table already has a pointer to it, we simply use the address of that pointer
// for the pointer to the property data. Warning.. DT finalization calls free on that but we're not
// the only thing to use a non-malloc'd pointer for something in the DT
DT__AddProperty(runtimeServicesNode, "table", sizeof(uint64_t), &gST32->RuntimeServices);
}
else
{
DT__AddProperty(runtimeServicesNode, "table", sizeof(uint64_t), &gST64->RuntimeServices);
}
// Set up the /efi/configuration-table node which will eventually have several child nodes for
// all of the configuration tables needed by various kernel extensions.
gEfiConfigurationTableNode = DT__AddChild(node, "configuration-table");
// Now fill in the /efi/platform Node
Node *efiPlatformNode = DT__AddChild(node, "platform");
// NOTE WELL: If you do add FSB Frequency detection, make sure to store
// the value in the fsbFrequency global and not an malloc'd pointer
// because the DT_AddProperty function does not copy its args.
if (Platform.CPU.FSBFrequency != 0)
DT__AddProperty(efiPlatformNode, FSB_Frequency_prop, sizeof(uint64_t), &Platform.CPU.FSBFrequency);
// Export TSC and CPU frequencies for use by the kernel or KEXTs
if (Platform.CPU.TSCFrequency != 0)
DT__AddProperty(efiPlatformNode, TSC_Frequency_prop, sizeof(uint64_t), &Platform.CPU.TSCFrequency);
if (Platform.CPU.CPUFrequency != 0)
DT__AddProperty(efiPlatformNode, CPU_Frequency_prop, sizeof(uint64_t), &Platform.CPU.CPUFrequency);
// Export system-id. Can be disabled with SystemId=No in com.apple.Boot.plist
if ((ret=getSystemID()))
DT__AddProperty(efiPlatformNode, SYSTEM_ID_PROP, UUID_LEN, (EFI_UINT32*) ret);
// Export SystemSerialNumber if present
if ((ret16=getSmbiosChar16("SMserial", &len)))
DT__AddProperty(efiPlatformNode, SYSTEM_SERIAL_PROP, len, ret16);
// Export Model if present
if ((ret16=getSmbiosChar16("SMproductname", &len)))
DT__AddProperty(efiPlatformNode, MODEL_PROP, len, ret16);
// Fill /efi/device-properties node.
setupDeviceProperties(node);
}
const char *boardid = getStringForKey("SMboardproduct", &bootInfo->smbiosConfig);
if (boardid)
DT__AddProperty(node, BOARDID_PROP, strlen(boardid)+1, (EFI_CHAR16*)boardid);
}
}
/*
* Populate the chosen node
*/
void setupChosenNode()
{
Node *chosenNode;
const char *override_pathname = NULL;
intlen = 0, err = 0;
extern void scan_mem();
// Take in account user overriding
if (getValueForKey(kSMBIOSKey, &override_pathname, &len, &bootInfo->chameleonConfig) && len > 0)
{
err = loadConfigFile(dirSpecSMBIOS, &bootInfo->smbiosConfig);
}
}
if (err)
{
verbose("No SMBIOS replacement found.\n");
}
// get a chance to scan mem dynamically if user asks for it while having the config options
// loaded as well, as opposed to when it was in scan_platform(); also load the orig. smbios
// so that we can access dmi info, without patching the smbios yet.
{
smbios_p = (EFI_PTR32)getSmbios(SMBIOS_PATCHED);
addConfigurationTable(&gEfiSmbiosTableGuid, &smbios_p, NULL);
setupBoardId(); //need to be called after getSmbios
// Setup ACPI with DSDT overrides (mackerintel's patch)
setupAcpi();
// We've obviously changed the count.. so fix up the CRC32
if (archCpuType == CPU_TYPE_I386)
{
Node *node;
SMBEntryPoint *origeps;
void *tableAddress;
node = DT__FindNode("/efi/platform", false);
if (!node)
{
verbose("/efi/platform node not found\n");
return;
}
origeps = getSmbios(SMBIOS_ORIGINAL);
if (!origeps)
{
return;
}
tableAddress = (void *)AllocateKernelMemory(origeps->dmi.tableLength);
if (!tableAddress)
{
return;
}
memcpy(tableAddress, (void *)origeps->dmi.tableAddress, origeps->dmi.tableLength);
DT__AddProperty(node, "SMBIOS", origeps->dmi.tableLength, tableAddress);
}
{
// Generate efi device strings
setup_pci_devs(root_pci_dev);
readSMBIOSInfo(getSmbios(SMBIOS_ORIGINAL));
// load smbios.plist file if any
setupSmbiosConfigFile("smbios.plist");
setupSMBIOSTable();
// Initialize the base table
if (archCpuType == CPU_TYPE_I386)
{
{
setupEfiTables64();
}
// Initialize the device tree
setupEfiDeviceTree();
saveOriginalSMBIOS();
// Add configuration table entries to both the services table and the device tree
setupEfiConfigurationTable();
}
trunk/i386/libsaio/smbios_getters.c
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bool getProcessorInformationExternalClock(returnType *value)
{
if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) // Intel
{
{
switch (Platform.CPU.Family)
{
case 0x06:
{
// set external clock to 0 for SANDY
// removes FSB info from system profiler as on real mac's.
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_IVYBRIDGE_XEON:
case CPU_MODEL_IVYBRIDGE:
value->word = 0;
break;
}
}
break;
default:
value->word = Platform.CPU.FSBFrequency/1000000;
}
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_CLARKDALE:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
if(vid == 0x8086 && did >= 0x2C00)
nhm_bus = possible_nhm_bus[i];
}
unsigned long qpimult, qpibusspeed;
qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50);
qpimult &= 0x7F;
bool getSMBOemProcessorType(returnType *value)
{
static bool done = false;
value->word = simpleGetSMBOemProcessorType();
if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) // Intel
verbose("CPU is %s, family 0x%x, model 0x%x\n", Platform.CPU.BrandString, Platform.CPU.Family, Platform.CPU.Model);
done = true;
}
switch (Platform.CPU.Family)
{
case 0x06:
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
case CPU_MODEL_SANDYBRIDGE_XEON:// Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)
if (strstr(Platform.CPU.BrandString, "Xeon(R)"))
value->word = 0x0501;// Xeon
else
case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_CLARKDALE:// Intel Core i3, i5 LGA1156 (32nm)
if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))
value->word = 0x0901;// Core i3
else
trunk/i386/modules/AcpiCodec/acpi_codec.c
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static bool is_jaketown(void)
{
return Platform.CPU.Model == CPU_MODEL_JAKETOWN;
return Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE_XEON;
}
static U32 get_bclk(void)
}
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_CLARKDALE:
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_JAKETOWN:
case CPU_MODEL_SANDYBRIDGE_XEON:
{
cpu->core_c1_supported = ((sub_Cstates >> 4) & 0xf) ? 1 : 0;
}
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_CLARKDALE:
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDYBRIDGE:
case CPU_MODEL_JAKETOWN:
case CPU_MODEL_SANDYBRIDGE_XEON:
{
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
trunk/package/po/es.po
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......
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"Project-Id-Version: Chameleon 2.2\n"
"Report-Msgid-Bugs-To: \n"
"POT-Creation-Date: 2013-05-26 23:38+0200\n"
"PO-Revision-Date: 2013-05-26 23:31-0000\n"
"PO-Revision-Date: 2013-06-17 12:02+0000\n"
"Last-Translator: Maniac <emafrias@gmail.com>\n"
"Language-Team: es <es@li.org>\n"
"Language: es\n"
"MIME-Version: 1.0\n"
"Content-Type: text/plain; charset=UTF-8\n"
"Content-Transfer-Encoding: 8bit\n"
"Plural-Forms: nplurals=2; plural=(n != 1);\n"
"X-Generator: Pootle 2.5.0-rc1\n"
"X-POOTLE-MTIME: 1368281268.0\n"
"X-POOTLE-MTIME: 1371470563.0\n"
#. type: Content of: <html><body><div><p>
#: Resources/templates/Welcome.html:22
"This module provides a substitute for the internal acpi patcher.\n"
"Dependencies: none"
msgstr ""
"Este módulo sustituye el parcheador ACPI interno.\n"
"Dependencias: ninguna"
#. type: "HDAEnabler_title"
#: Resources/templates/Localizable.strings:47
"HDAEnabler module, this module provides a substitute for the Hight Definition Audio DSDT Edits.\n"
"Dependencies: none"
msgstr ""
"Módulo HDAEnabler, este módulo provee un sustituto a la edición DSDT para "
"Audio de Alta Definición.\n"
"Dependencias: ninguna"
#. type: "FileNVRAM_title"
#: Resources/templates/Localizable.strings:51
"FileNVRAM module for preloading NVRAM values.\n"
"Dependencies: none"
msgstr ""
"Módulo para el pre-cargado de valores NVRAM.\n"
"Dependencias: ninguna"
#. type: "Sata_title"
#: Resources/templates/Localizable.strings:55
"Useful to fix yellow icon issue (can also fix an issue with the Apple's dvd player application in Mountain lion).\n"
"Dependencies: none"
msgstr ""
"Módulo sata, conocido como YellowIconFixer en la rama de cparm.\n"
"Útil para solucionar el problema con iconos amarillos (puede también "
"solucionar un problema con el reproductor de DVD de Apple en Mountain Lion).\n"
"Dependencias: ninguna"
#. type: "Resolution_title"
#: Resources/templates/Localizable.strings:60
#. type: "HDEFLayoutIDx32_description"
#: Resources/templates/Localizable.strings:263
#, fuzzy, no-wrap
#, no-wrap
#| msgid ""
#| "Set HDEF layout-it to 20:\n"
#| "020 (0x20, 0x00, 0x00, 0x00)."
"Set HDEF layout-it to 32:\n"
"020 (0x20, 0x00, 0x00, 0x00)."
msgstr ""
"Establecer el Modo de HDEF layout-it en 20:\n"
"Establecer el Modo de HDEF layout-it en 32:\n"
"020 (0x20, 0x00, 0x00, 0x00)."
#. type: "HDAULayoutIDx40_title"
#. type: "HDAULayoutIDx32_description"
#: Resources/templates/Localizable.strings:361
#, fuzzy, no-wrap
#, no-wrap
#| msgid ""
#| "Set HDAU layout-it to 20:\n"
#| "020 (0x20, 0x00, 0x00, 0x00)."
"Set HDAU layout-it to 32:\n"
"020 (0x20, 0x00, 0x00, 0x00)."
msgstr ""
"Establecer el Modo de HDAU layout-it en 20:\n"
"Establecer el Modo de HDAU layout-it en 32:\n"
"020 (0x20, 0x00, 0x00, 0x00)."
#. type: "HDAULayoutIDx40_description"
trunk/CHANGES
1
2
3
4
5
6
17
28
39
- Fix issue booting x86 after rev.2175 (Credits to Mario, Alex and Leon).
- ErmaC : Add new CPU Model IDs
- Add boot support to 10.9 (thx old napalm)
- ErmaC : Update gui Icons OS detection
- Update default theme Icon set (thx BlackOsx)
- Add Linux GPT Partition Label
- Fix menuBVR initialization problem
- Implement ErmaC's HDAEnabler.dylib module
- Fix Bug in the loop that look for an ATI card. Credits to Jief Luce

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Revision: 2248