Chameleon

Chameleon Commit Details

Date:2013-12-01 05:04:21 (10 years 7 months ago)
Author:ErmaC
Commit:2269
Parents: 2268
Message:Updated IDs for nvidia and intel graphics card. http://forge.voodooprojects.org/p/chameleon/issues/353/ http://forge.voodooprojects.org/p/chameleon/issues/355/
Changes:
M/trunk/i386/libsaio/acpi_patcher.c
M/trunk/i386/libsaio/gma.c
M/trunk/i386/libsaio/acpi_patcher.h
M/trunk/i386/libsaio/cpu.c
M/trunk/i386/libsaio/fake_efi.c
M/trunk/i386/libsaio/platform.h
M/trunk/i386/libsaio/smbios_getters.c
M/trunk/i386/libsaio/nvidia.c
M/trunk/i386/libsaio/cpu.h
M/trunk/i386/libsaio/saio_internal.h
M/trunk/i386/libsaio/smbios.c
M/trunk/i386/libsaio/smbios_getters.h

File differences

trunk/i386/libsaio/smbios_getters.h
1212
1313
1414
15
15
16
1617
1718
1819
......
2021
2122
2223
23
24
25
2426
2527
2628
␊
#define NOT_AVAILABLE␉␉␉"N/A"␊
␊
typedef enum {␊
typedef enum␊
{␊
␉kSMBString,␊
␉kSMBByte,␊
␉kSMBWord,␊
//␉kSMBQWord␊
} SMBValueType;␊
␊
typedef union {␊
typedef union␊
{␊
␉const char␉*string;␊
␉uint8_t␉␉byte;␊
␉uint16_t␉word;␊
trunk/i386/libsaio/acpi_patcher.c
11
22
3
34
45
56
......
2930
3031
3132
32
33
33
34
35
36
3437
3538
3639
......
4043
4144
4245
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
6063
6164
6265
6366
6467
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
8893
89
94
95
9096
9197
9298
......
110116
111117
112118
113
119
114120
115121
116122
......
194200
195201
196202
197
203
204
205
206
198207
199208
200209
......
507516
508517
509518
510
519
511520
512521
513522
......
576585
577586
578587
579
588
580589
581590
582591
583592
584593
585
594
586595
587596
588597
......
696705
697706
698707
699
708
709
700710
701711
702712
713
703714
715
704716
717
705718
706
707
719
720
721
722
708723
709724
710725
711726
712
727
728
729
730
713731
714732
715733
......
730748
731749
732750
751
733752
753
734754
755
735756
757
736758
737759
738760
761
739762
763
740764
741765
742766
......
760784
761785
762786
763
787
788
764789
765790
766791
......
770795
771796
772797
773
798
799
774800
775801
776802
......
790816
791817
792818
819
793820
821
794822
795823
796824
......
807835
808836
809837
810
811
838
839
812840
813841
814842
......
831859
832860
833861
834
862
835863
836864
837865
......
854882
855883
856884
857
885
858886
859887
860888
......
895923
896924
897925
926
898927
928
899929
930
900931
932
901933
902934
903935
......
932964
933965
934966
967
935968
969
936970
937971
938972
......
948982
949983
950984
985
951986
987
952988
953989
954990
991
955992
956993
957994
......
10211058
10221059
10231060
1024
1061
10251062
10261063
10271064
......
10501087
10511088
10521089
1090
10531091
1054
1092
10551093
10561094
10571095
......
10641102
10651103
10661104
1105
10671106
1107
10681108
10691109
10701110
......
11461186
11471187
11481188
1149
1189
11501190
11511191
11521192
/*␊
* Copyright 2008 mackerintel␊
* 2010 mojodojo, 2012 slice␊
*/␊
␊
#include "libsaio.h"␊
boolean_t tableSign(char *table, const char *sgn)␊
{␊
␉int i;␊
␉for (i=0; i<4; i++) {␊
␉␉if ((table[i] &~0x20) != (sgn[i] &~0x20)) {␊
␉for (i=0; i<4; i++)␊
␉{␊
␉␉if ((table[i] &~0x20) != (sgn[i] &~0x20))␊
␉␉{␊
␉␉␉return false;␊
␉␉}␊
␉}␊
/* Gets the ACPI 1.0 RSDP address */␊
static struct acpi_2_rsdp* getAddressOfAcpiTable()␊
{␊
/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */␊
␉␊
void *acpi_addr = (void*)ACPI_RANGE_START;␊
for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)␊
{␊
if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)␊
{␊
uint8_t csum = checksum8(acpi_addr, 20);␊
if(csum == 0)␊
{␊
// Only return the table if it is a true version 1.0 table (Revision 0)␊
if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)␊
return acpi_addr;␊
}␊
}␊
}␊
return NULL;␊
␉/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */␊
␊
␉void *acpi_addr = (void*)ACPI_RANGE_START;␊
␉for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)␊
␉{␊
␉␉if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)␊
␉␉{␊
␉␉␉uint8_t csum = checksum8(acpi_addr, 20);␊
␉␉␉if(csum == 0)␊
␉␉␉{␊
␉␉␉// Only return the table if it is a true version 1.0 table (Revision 0)␊
␉␉␉␉if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)␊
␉␉␉␉return acpi_addr;␊
␉␉␉}␊
␉␉}␊
␉}␊
␉return NULL;␊
}␊
␊
/* Gets the ACPI 2.0 RSDP address */␊
static struct acpi_2_rsdp* getAddressOfAcpi20Table()␊
{␊
/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */␊
␉␊
void *acpi_addr = (void*)ACPI_RANGE_START;␊
for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)␊
{␊
if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)␊
{␊
uint8_t csum = checksum8(acpi_addr, 20);␊
␉␉␉␊
/* Only assume this is a 2.0 or better table if the revision is greater than 0␊
* NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1␊
* and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.␊
*/␊
␉␉␉␊
if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))␊
{␊
uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));␊
if(csum2 == 0)␊
return acpi_addr;␊
}␊
}␊
}␊
return NULL;␊
␉/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */␊
␊
␉void *acpi_addr = (void*)ACPI_RANGE_START;␊
␉for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)␊
␉{␊
␉␉if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)␊
␉␉{␊
␉␉␉uint8_t csum = checksum8(acpi_addr, 20);␊
␊
␉␉␉/* Only assume this is a 2.0 or better table if the revision is greater than 0␊
␉␉␉ * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1␊
␉␉␉ * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.␊
␉␉␉ */␊
␊
␉␉␉if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))␊
␉␉␉{␊
␉␉␉␉uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));␊
␉␉␉␉if(csum2 == 0)␊
␉␉␉␉{␊
␉␉␉␉␉return acpi_addr;␊
␉␉␉␉}␊
␉␉␉}␊
␉␉}␊
␉}␊
␉return NULL;␊
}␊
/** The folowing ACPI Table search algo. should be reused anywhere needed:*/␊
␊
/* The folowing ACPI Table search algo. should be reused anywhere needed:*/␊
int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)␊
{␊
␉int fd = 0;␊
␉if (fd < 0)␊
␉{␊
␉␉// NOT FOUND:␊
␉␉verbose("ACPI table not found: %s\n", filename);␊
␉␉verbose("ACPI Table not found: %s\n", filename);␊
␉␉*dirSpec = '\0';␊
␉}␊
␊
␊
␉␉␉␉verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);␊
␊
␉␉␉␉if (++acpi_cpu_count == 32) return;␊
␉␉␉␉if (++acpi_cpu_count == 32)␊
␉␉␉␉{␊
␉␉␉␉␉return;␊
␉␉␉␉}␊
␉␉␉}␊
␉␉}␊
␉}␊
␉␉␉␉␉␉// Sanity check␊
␉␉␉␉␉␉if (maximum.CID < minimum.CID) ␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉DBG("Insane FID values!");␊
␉␉␉␉␉␉␉DBG("P-States: Insane FID values!");␊
␉␉␉␉␉␉␉p_states_count = 0;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉else␊
␉␉␉␉␉//case CPU_MODEL_HASWELL_H:␉//␊
␉␉␉␉␉case CPU_MODEL_HASWELL_MB:␉//␊
␉␉␉␉␉case CPU_MODEL_HASWELL_ULT:␉//␊
␉␉␉␉␉case CPU_MODEL_HASWELL_ULX:␉//␊
␉␉␉␉␉case CPU_MODEL_CRYSTALWELL:␉//␊
␊
␉␉␉␉␉{␊
␉␉␉␉␉if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||␊
␉␉␉␉␉␉(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||␊
␉␉␉␉␉␉(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_MB) ||␊
␉␉␉␉␉␉(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_HASWELL_ULX))␊
␉␉␉␉␉␉(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_CRYSTALWELL))␊
␉␉␉␉␉{␊
␉␉␉␉␉␉maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;␊
␉␉␉␉␉}␊
␉const char * value;␊
␊
␉// Restart Fix␊
␉if (Platform.CPU.Vendor == 0x756E6547) {␉/* Intel */␊
␉if (Platform.CPU.Vendor == 0x756E6547)␊
␉{␉/* Intel */␊
␉␉fix_restart = true;␊
␉␉fix_restart_ps2 = false;␊
␉␉if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2)␊
␉␉{␊
␉␉␉fix_restart = true;␊
␉␉}␊
␉␉else␊
␉␉{␊
␉␉␉getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);␊
␉␉␊
␉} else {␊
␉␉}␊
␉}␊
␉else␊
␉{␊
␉␉verbose ("Not an Intel platform: Restart Fix not applied !!!\n");␊
␉␉fix_restart = false;␊
␉}␊
␊
␉if (fix_restart) fadt_rev2_needed = true;␊
␉if (fix_restart)␊
␉{␊
␉␉fadt_rev2_needed = true;␊
␉}␊
␊
␉// Allocate new fadt table␊
␉if (fadt->Length < 0x84 && fadt_rev2_needed)␊
␉␉if (Platform.Type > 6) ␊
␉␉{␊
␉␉␉if(fadt_mod->PM_Profile<=6)␊
␉␉␉{␊
␉␉␉␉Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊
␉␉␉␉Platform.Type = 1;␉␉/* Set a fixed value (Desktop) */␊
␉␉␉}␊
␉␉␉verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);␊
␉␉}␊
␉␉else␊
␉␉{␊
␉␉␉Platform.Type = (unsigned char) strtoul(value, NULL, 10);␊
␉␉}␊
␉}␊
␉// Set PM_Profile from System-type if only user wanted this value to be forced␊
␉if (fadt_mod->PM_Profile != Platform.Type) ␊
␉// Patch FADT to fix restart␊
␉if (fix_restart)␊
␉{␊
␉␉if (fix_restart_ps2) {␊
␉␉if (fix_restart_ps2)␊
␉␉{␊
␉␉␉fadt_mod->Flags|= 0x400;␊
␉␉␉fadt_mod->Reset_SpaceID␉␉= 0x01; // System I/O␊
␉␉␉fadt_mod->Reset_BitWidth␉= 0x08; // 1 byte␊
␉␉␉fadt_mod->Reset_Value␉␉= 0xfe; // Value to write to reset the system␊
␉␉␉msglog("FADT: PS2 Restart Fix applied!\n");␊
␉␉}␊
␉␉else {␊
␉␉else␊
␉␉{␊
␉␉␉fadt_mod->Flags|= 0x400;␊
␉␉␉fadt_mod->Reset_SpaceID␉␉= 0x01; // System I/O␊
␉␉␉fadt_mod->Reset_BitWidth␉= 0x08; // 1 byte␊
␊
␉␉fadt_mod->DSDT=(uint32_t)new_dsdt;␊
␉␉if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)␊
␉␉{␊
␉␉␉fadt_mod->X_DSDT=(uint32_t)new_dsdt;␊
␉␉}␊
␊
␉␉DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);␊
␊
/* Setup ACPI without replacing DSDT. */␊
int setupAcpiNoMod()␊
{␊
␉//␉addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");␊
␉//␉addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");␊
//␉addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");␊
//␉addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");␊
␉/* XXX aserebln why uint32 cast if pointer is uint64 ? */␊
␉acpi10_p = (uint32_t)getAddressOfAcpiTable();␊
␉acpi20_p = (uint32_t)getAddressOfAcpi20Table();␊
␉// always reset cpu count to 0 when injecting new acpi␊
␉acpi_cpu_count = 0;␊
␊
␉// Try using the file specified with the DSDT option␊
␉/* Try using the file specified with the DSDT option */␊
␉if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))␊
␉{␊
␉␉sprintf(dirSpec, filename);␊
␉int ssdt_count=0;␊
␊
␉// SSDT Options␊
␉bool drop_ssdt=false, generate_pstates=false, generate_cstates=false; ␊
␉bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;␊
␊
␉getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);␊
␉getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);␊
␉␉{␊
␉␉␉DBG("No ACPI version %d found. Ignoring\n", version+1);␊
␉␉␉if (version)␊
␉␉␉{␊
␉␉␉␉addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊
␉␉␉␉addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");␊
␉␉␉}␊
␉␉␉continue;␊
␉␉}␊
␉␉rsdplength=version?rsdp->Length:20;␊
␉␉␉{␊
␉␉␉␉char *table=(char *)(rsdt_entries[i]);␊
␉␉␉␉if (!table)␊
␉␉␉␉{␊
␉␉␉␉␉continue;␊
␉␉␉␉}␊
␊
␉␉␉␉DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);␊
␊
␉␉␉␉␉DBG("DSDT found\n");␊
␊
␉␉␉␉␉if(new_dsdt)␊
␉␉␉␉␉{␊
␉␉␉␉␉␉rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;␊
␉␉␉␉␉}␊
␊
␉␉␉␉␉continue;␊
␉␉␉␉}␊
␊
␉␉␉␉if (tableSign(table, "FACP"))␊
␉␉␉␉{␊
␉␉␉␉␉struct acpi_2_fadt *fadt, *fadt_mod;␊
␉␉else␊
␉␉{␊
␉␉␉rsdp_mod->RsdtAddress=0;␊
␉␉␉printf("RSDT not found or RSDT incorrect\n");␊
␉␉␉printf("RSDT not found or incorrect\n");␊
␉␉}␊
␊
␉␉if (version)␊
␉␉␉␉{␊
␉␉␉␉␉char *table=(char *)((uint32_t)(xsdt_entries[i]));␊
␉␉␉␉␉if (!table)␊
␉␉␉␉␉{␊
␉␉␉␉␉␉continue;␊
␊
␉␉␉␉␉}␊
␉␉␉␉␉xsdt_entries[i-dropoffset]=xsdt_entries[i];␊
␊
␉␉␉␉␉if (drop_ssdt && tableSign(table, "SSDT"))␊
␉␉␉␉␉␉DBG("DSDT found\n");␊
␊
␉␉␉␉␉␉if (new_dsdt)␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;␊
␉␉␉␉␉␉}␊
␊
␉␉␉␉␉␉DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);␊
␉␉␉␉␉␉␊
␉␉␉␉ */␊
␊
␉␉␉␉rsdp_mod->XsdtAddress=0xffffffffffffffffLL;␊
␉␉␉␉verbose("XSDT not found or XSDT incorrect\n");␊
␉␉␉␉verbose("XSDT not found or incorrect\n");␊
␉␉␉}␊
␉␉}␊
␊
trunk/i386/libsaio/acpi_patcher.h
11
22
3
34
45
56
/*␊
* Copyright 2008 mackerintel␊
* 2010 mojodojo␊
*/␊
␊
#ifndef __LIBSAIO_ACPI_PATCHER_H␊
trunk/i386/libsaio/gma.c
620620
621621
622622
623
624
625
623626
624627
625628
case GMA_HASWELL_D_GT2: // 0412␊
case GMA_HASWELL_M_GT2: // 0416␊
case GMA_HASWELL_S_GT2: // 041a␊
case GMA_HASWELL_E_GT1: // 040e␊
case GMA_HASWELL_E_GT2: // 041e␊
case GMA_HASWELL_E_GT3: // 042e␊
case GMA_HASWELL_D_GT3: // 0422␊
case GMA_HASWELL_M_GT3: // 0426␊
case GMA_HASWELL_S_GT3: // 042a␊
trunk/i386/libsaio/nvidia.c
10101010
10111011
10121012
1013
10131014
10141015
10151016
......
10391040
10401041
10411042
1043
10421044
10431045
10441046
......
11291131
11301132
11311133
1134
11321135
11331136
1137
1138
1139
11341140
11351141
11361142
......
12011207
12021208
12031209
1210
12041211
12051212
12061213
......
13891396
13901397
13911398
1399
1400
13921401
13931402
13941403
......
16721681
16731682
16741683
1675
1676
1684
16771685
16781686
16791687
......
18961904
18971905
18981906
1899
1900
1907
19011908
19021909
19031910
......
19191926
19201927
19211928
1922
19231929
19241930
19251931
␉{ 0x10DE0FC1,␉"GeForce GT 640" },␊
␉{ 0x10DE0FC2,␉"GeForce GT 630" },␊
␉{ 0x10DE0FC6,␉"GeForce GTX 650" },␊
␉{ 0x10DE0FCD,␉"GeForce GT 755M" },␊
␉// 0FD0 - 0FDF␊
␉{ 0x10DE0FD1,␉"GeForce GT 650M" },␊
␉{ 0x10DE0FD2,␉"GeForce GT 640M" },␊
␉{ 0x10DE1003,␉"GeForce GTX Titan LE" },␊
␉{ 0x10DE1004,␉"GeForce GTX 780" },␊
␉{ 0x10DE1005,␉"GeForce GTX Titan" },␊
␉{ 0x10DE100A,␉"GeForce GTX 780 Ti" },␊
␉// 1010 - 101F␊
␉{ 0x10DE101F,␉"Tesla K20" },␊
␉// 1020 - 102F␊
␉{ 0x10DE1183,␉"GeForce GTX 660 Ti" },␊
␉{ 0x10DE1184,␉"GeForce GTX 770" },␊
␉{ 0x10DE1185,␉"GeForce GTX 660" },␊
␉{ 0x10DE1187,␉"GeForce GTX 760" },␊
␉{ 0x10DE1188,␉"GeForce GTX 690" },␊
␉{ 0x10DE1189,␉"GeForce GTX 670" },␊
//␉{ 0x10DE118A,␉"GRID K520" },␊
//␉{ 0x10DE118B,␉"GRID K200" },␊
␉{ 0x10DE118E,␉"GeForce GTX 760 (192-bit)" },␊
␉{ 0x10DE118F,␉"Tesla K10" },␊
␉// 1190 - 119F␊
␉{ 0x10DE119F,␉"GeForce GTX 780M" },␊
␉{ 0x10DE1293,␉"GeForce GT 730M" },␊
␉{ 0x10DE1294,␉"GeForce GT 740M" },␊
␉{ 0x10DE1295,␉"GeForce GT 710M" },␊
␉{ 0x10DE1298,␉"GeForce GT 720M" },␊
␉// 12A0 - 12AF␊
␉//{ 0x10DE12A0,␉"GeForce GT ???" },␊
␉{ 0x10DE12AF,␉"GK208-INT" },␊
␉{ 0x10DE1180,␉0x38422682,␉"EVGA GTX 680 SC" },␊
␉{ 0x10DE1180,␉0x38422683,␉"EVGA GTX 680 SC" },␊
␊
␉{ 0x10DE1187,␉0x14583614,␉"GV-N760OC-4GD" },␊
␊
␉{ 0x10DE1189,␉0x10438405,␉"Asus GTX 670 Direct CU II TOP" },␊
␉{ 0x10DE1189,␉0x15691189,␉"Palit GTX 670 JetStream" },␊
␉{ 0x10DE1189,␉0x19DA1255,␉"Zotac GTX 670 AMP! Edition" },␊
␉{␊
␉␉for (i = 0; i < (sizeof(nvidia_card_exceptions) / sizeof(nvidia_card_exceptions[0])); i++)␊
␉␉{␊
␉␉␉if ((nvidia_card_exceptions[i].device == device_id) &&␊
␉␉␉ (nvidia_card_exceptions[i].subdev == subsys_id))␊
␉␉␉if ((nvidia_card_exceptions[i].device == device_id) && (nvidia_card_exceptions[i].subdev == subsys_id))␊
␉␉␉{␊
␉␉␉␉return nvidia_card_exceptions[i].name;␊
␉␉␉}␊
␉// Amount of VRAM in kilobytes␊
␉videoRam = mem_detect(regs, nvCardType, nvda_dev,((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) );␊
␊
␉sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id,␊
␉␉␉(uint16_t)nvda_dev->device_id);␊
␉sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id, (uint16_t)nvda_dev->device_id);␊
␊
␉if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)␊
␉{␊
␉else␊
␉{␊
␉␉rom = malloc(NVIDIA_ROM_SIZE);␊
␊
␉␉// Otherwise read bios from card␊
␉␉nvBiosOveride = 0;␊
␊
trunk/i386/libsaio/cpu.c
5151
5252
5353
54
55
5456
5557
5658
......
8991
9092
9193
94
9295
9396
9497
......
288291
289292
290293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
291308
292309
293310
......
397414
398415
399416
400
417
401418
402
419
403420
404421
405422
......
425442
426443
427444
428
445
429446
430447
431448
......
510527
511528
512529
513
530
514531
515532
516533
517534
518535
519536
520
537
521538
522539
523540
␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-5))␊
␉};␊
␊
␉//int_enabled = ml_set_interrupts_enabled(FALSE);␊
␊
restart:␊
␉if (attempts >= 9) // increase to up to 9 attempts.␊
␉{␊
␉set_PIT2(0);␉␉␉// reset timer 2 to be zero␊
␉disable_PIT2();␉␉␉// turn off PIT 2␊
␉␊
␉//ml_set_interrupts_enabled(int_enabled);␊
␉return intermediate;␊
}␊
␊
␉}␊
#endif␊
␊
/*␊
EAX (Intel):␊
31 28 27 20 19 16 1514 1312 11 8 7 4 3 0␊
+--------+----------------+--------+----+----+--------+--------+--------+␊
|########|Extended family |Extmodel|####|type|familyid| model |stepping|␊
+--------+----------------+--------+----+----+--------+--------+--------+␊
␊
EAX (AMD):␊
31 28 27 20 19 16 1514 1312 11 8 7 4 3 0␊
+--------+----------------+--------+----+----+--------+--------+--------+␊
|########|Extended family |Extmodel|####|####|familyid| model |stepping|␊
+--------+----------------+--------+----+----+--------+--------+--------+␊
*/␊
␊
␉p->CPU.Vendor␉␉= p->CPU.CPUID[CPUID_0][1];␊
␉p->CPU.Signature␉= p->CPU.CPUID[CPUID_1][0];␊
␉p->CPU.Stepping␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 3, 0);␊
␊
␉tscFrequency = measure_tsc_frequency();␊
␉/* if usual method failed */␊
␉if ( tscFrequency < 1000 )␊
␉if ( tscFrequency < 1000 )//TEST␊
␉{␊
␉tscFrequency = timeRDTSC() * 20;␊
␉␉tscFrequency = timeRDTSC() * 20;␊
␉}␊
␉fsbFrequency = 0;␊
␉cpuFrequency = 0;␊
␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_HASWELL_MB ||␊
␉␉␉␉␉␉␉␉␉␉ //p->CPU.Model == CPU_MODEL_HASWELL_H ||␊
␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_HASWELL_ULT ||␊
␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_HASWELL_ULX ))␊
␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_CRYSTALWELL ))␊
␉␉␉{␊
␉␉␉␉msr = rdmsr64(MSR_PLATFORM_INFO);␊
␉␉␉␉DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));␊
␉␉␉␉p->CPU.MinRatio = min_ratio;␊
␊
␉␉␉␉myfsb = fsbFrequency / 1000000;␊
␉␉␉␉verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);␊
␉␉␉␉verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio/10);␊
␉␉␉␉currcoef = bus_ratio_max;␊
␉␉␉}␊
␉␉␉else␊
␉␉␉{␊
␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊
␉␉␉␉DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, bitfield(msr, 31, 0));␊
␉␉␉␉currcoef = bitfield(msr, 15, 8);␊
␉␉␉␉currcoef = bitfield(msr, 12, 8);␊
␉␉␉␉/* Non-integer bus ratio for the max-multi*/␊
␉␉␉␉maxdiv = bitfield(msr, 46, 46);␊
␉␉␉␉/* Non-integer bus ratio for the current-multi (undocumented)*/␊
trunk/i386/libsaio/platform.h
6161
6262
6363
64
64
6565
6666
6767
......
115115
116116
117117
118
119
120
121
122
123
124
125
126
127
128
118
119
120
121
122
123
124
125
126
127
128
129
129130
130131
131132
#define CPU_MODEL_HASWELL_MB␉␉0x3F␉␉␉// Haswell MB␊
//#define CPU_MODEL_HASWELL_H␉␉0x??␉␉␉// Haswell H␊
#define CPU_MODEL_HASWELL_ULT␉␉0x45␉␉␉// Haswell ULT␊
#define CPU_MODEL_HASWELL_ULX␉␉0x46␉␉␉// Haswell ULX␊
#define CPU_MODEL_CRYSTALWELL␉␉0x46␉␉␉// Haswell ULX␊
␊
/* CPU Features */␊
#define CPU_FEATURE_MMX␉␉␉0x00000001␉␉// MMX Instruction Set␊
/* Size of SMBIOS UUID in bytes */␊
#define UUID_LEN␉␉␉16␊
␊
typedef struct _RamSlotInfo_t {␊
uint32_t␉␉ModuleSize;␉␉␉␉␉// Size of Module in MB␊
uint32_t␉␉Frequency;␉␉␉␉␉// in Mhz␊
const char*␉␉Vendor;␊
const char*␉␉PartNo;␊
const char*␉␉SerialNo;␊
char*␉␉␉spd;␉␉␉␉␉␉// SPD Dump␊
bool␉␉␉InUse;␊
uint8_t␉␉␉Type;␊
uint8_t␉␉␉BankConnections;␉␉␉// table type 6, see (3.3.7)␊
uint8_t␉␉␉BankConnCnt;␊
typedef struct _RamSlotInfo_t␊
{␊
␉uint32_t␉␉ModuleSize;␉␉␉␉␉// Size of Module in MB␊
␉uint32_t␉␉Frequency;␉␉␉␉␉// in Mhz␊
␉const char*␉␉Vendor;␊
␉const char*␉␉PartNo;␊
␉const char*␉␉SerialNo;␊
␉char*␉␉␉spd;␉␉␉␉␉␉// SPD Dump␊
␉bool␉␉␉InUse;␊
␉uint8_t␉␉␉Type;␊
␉uint8_t␉␉␉BankConnections;␉␉␉// table type 6, see (3.3.7)␊
␉uint8_t␉␉␉BankConnCnt;␊
} RamSlotInfo_t;␊
␊
typedef struct _PlatformInfo_t {␊
trunk/i386/libsaio/cpu.h
4141
4242
4343
44
44
4545
4646
4747
......
7373
7474
7575
76
77
76
77
7878
7979
80
81
8082
8183
8284
#define CALIBRATE_LATCH␉␉((CLKNUM * CALIBRATE_TIME_MSEC + 1000/2)/1000)␊
␊
// CPUID Values␊
␊
/*␊
#define CPUID_MODEL_PRESCOTT␉␉3 // 0x03 Celeron D, Pentium 4 (90nm)␊
#define CPUID_MODEL_NOCONA␉␉4 // 0x04 Xeon Nocona, Irwindale (90nm)␊
#define CPUID_MODEL_PRESLER␉␉6 // 0x06 Pentium 4, Pentium D (65nm)␊
#define CPUID_MODEL_HASWELL_MB␉␉63 // 0x3F Mobile/Laptop version␊
//#define CPUID_MODEL_HASWELL_H␉␉?? // 0x??␊
#define CPUID_MODEL_HASWELL_ULT␉␉69 // 0x45␊
#define CPUID_MODEL_HASWELL_ULX␉␉70 // 0x46␊
␊
#define CPUID_MODEL_CRYSTALWELL␉␉70 // 0x46␊
*/␊
/* HASWELL-DT HASWELL-MB HASWELL-H HASWELL-ULT HASWELL ULX*/␊
␊
//BROADWELL-ROCKWELL␊
␊
static inline uint64_t rdtsc64(void)␊
{␊
␉uint64_t ret;␊
trunk/i386/libsaio/smbios.c
571571
572572
573573
574
574575
575576
576577
......
585586
586587
587588
588
589
589590
590591
591592
␉␉{␊
␉␉␉switch (Platform.CPU.Model)␊
␉␉␉{␊
␉␉␉␉case 0x19:␉␉␉// Intel Core i5 650 @3.20 Ghz␊
␉␉␉␉case CPU_MODEL_FIELDS:␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
␉␉␉␉case CPU_MODEL_DALES:␊
␉␉␉␉case CPU_MODEL_DALES_32NM:␉// Intel Core i3, i5 LGA1156 (32nm)␊
␉␉␉␉case CPU_MODEL_HASWELL:␊
␉␉␉␉case CPU_MODEL_HASWELL_MB:␊
␉␉␉␉case CPU_MODEL_HASWELL_ULT:␊
␉␉␉␉case CPU_MODEL_HASWELL_ULX:␊
␉␉␉␉case CPU_MODEL_CRYSTALWELL:␊
␊
␉␉␉␉␉break;␊
␊
trunk/i386/libsaio/fake_efi.c
1818
1919
2020
21
22
2321
2422
2523
......
109107
110108
111109
110
112111
112
113113
114114
115
115116
117
116118
117119
118120
......
132134
133135
134136
137
135138
139
136140
137141
138142
......
447451
448452
449453
450
454
455
456
457
451458
452459
453460
454
461
462
463
464
455465
456466
457467
......
470480
471481
472482
473
474
483
484
485
486
487
488
489
490
491
475492
476493
477494
......
502519
503520
504521
505
522
523
524
506525
507
526
508527
509528
510529
......
516535
517536
518537
519
538
539
540
541
520542
521543
522544
......
531553
532554
533555
534
556
557
558
559
535560
536561
537562
......
582607
583608
584609
610
585611
612
586613
587614
588615
616
589617
618
590619
591620
621
592622
623
593624
594625
595626
627
596628
629
597630
598631
599632
633
600634
635
601636
602637
603638
639
604640
641
605642
606643
607644
......
614651
615652
616653
617
654
655
618656
619657
620658
621659
660
622661
662
623663
624664
625665
......
631671
632672
633673
674
634675
676
635677
636678
637679
680
638681
682
639683
640684
641685
......
644688
645689
646690
647
648
691
692
649693
650694
651695
#include "pci.h"␊
#include "sl.h"␊
␊
␊
␊
extern void setup_pci_devs(pci_dt_t *pci_dt);␊
␊
/*␊
␊
␉// We only do adds, not modifications and deletes like InstallConfigurationTable␊
␉if (i >= MAX_CONFIGURATION_TABLE_ENTRIES)␊
␉{␊
␉␉stop("Ran out of space for configuration tables. Increase the reserved size in the code.\n");␊
␉}␊
␊
␉if (pGuid == NULL)␊
␉{␊
␉␉return EFI_INVALID_PARAMETER;␊
␉}␊
␊
␉if (table != NULL)␊
␉{␊
␊
␉␉// Assume the alias pointer is a global or static piece of data␊
␉␉if (alias != NULL)␊
␉␉{␊
␉␉␉DT__AddProperty(tableNode, "alias", strlen(alias)+1, (char*)alias);␊
␉␉}␊
␊
␉␉return EFI_SUCCESS;␊
␉}␊
␉EFI_CHAR16*␉ dst = 0;␊
␉size_t␉␉ i = 0;␊
␊
␉if (!key || !(*key) || !len || !src) return 0;␊
␉if (!key || !(*key) || !len || !src)␊
␉{␊
␉␉return 0;␊
␉}␊
␉␊
␉*len = strlen(src);␊
␉dst = (EFI_CHAR16*) malloc( ((*len)+1) * 2 );␊
␉for (; i < (*len); i++)␉ dst[i] = src[i];␊
␉for (; i < (*len); i++)␊
␉{␊
␉␉dst[i] = src[i];␊
␉}␊
␉dst[(*len)] = '\0';␊
␉*len = ((*len)+1)*2; // return the CHAR16 bufsize in cluding zero terminated CHAR16␊
␉return dst;␊
␊
␉for (i=0, isZero=1, isOnes=1; i<UUID_LEN; i++)␊
␉{␊
␉␉if (p[i] != 0x00) isZero = 0;␊
␉␉if (p[i] != 0xff) isOnes = 0;␊
␉␉if (p[i] != 0x00)␊
␉␉{␊
␉␉␉isZero = 0;␊
␉␉}␊
␊
␉␉if (p[i] != 0xff)␊
␉␉{␊
␉␉␉isOnes = 0;␊
␉␉}␊
␉}␊
␊
␉if (isZero || isOnes) // empty or setable means: no uuid present␊
␉␉sysId = 0;␊
␉}␊
␊
␉if (!ret) // no bios dmi UUID available, set a fixed value for system-id␊
␉if (!ret)␊
␉{␊
␉␉// no bios dmi UUID available, set a fixed value for system-id␊
␉␉ret=getUUIDFromString((sysId = (const char*) SYSTEM_ID));␊
␊
␉}␊
␉verbose("Customizing SystemID with : %s\n", getStringFromUUID(ret)); // apply a nice formatting to the displayed output␊
␉return ret;␊
}␊
void setupSystemType()␊
{␊
␉Node *node = DT__FindNode("/", false);␊
␉if (node == 0) stop("Couldn't get root node");␊
␉if (node == 0)␊
␉{␊
␉␉stop("Couldn't get root node");␊
␉}␊
␉// we need to write this property after facp parsing␊
␉// Export system-type only if it has been overrriden by the SystemType option␊
␉DT__AddProperty(node, SYSTEM_TYPE_PROP, sizeof(Platform.Type), &Platform.Type);␊
␊
␉node = DT__FindNode("/", false);␊
␊
␉if (node == 0) stop("Couldn't get root node");␊
␉if (node == 0)␊
␉{␊
␉␉stop("Couldn't get root node");␊
␉}␊
␊
␉// We could also just do DT__FindNode("/efi/platform", true)␊
␉// But I think eventually we want to fill stuff in the efi node␊
␉// because the DT_AddProperty function does not copy its args.␊
␊
␉if (Platform.CPU.FSBFrequency != 0)␊
␉{␊
␉␉DT__AddProperty(efiPlatformNode, FSB_Frequency_prop, sizeof(uint64_t), &Platform.CPU.FSBFrequency);␊
␉}␊
␊
␉// Export TSC and CPU frequencies for use by the kernel or KEXTs␊
␉if (Platform.CPU.TSCFrequency != 0)␊
␉{␊
␉␉DT__AddProperty(efiPlatformNode, TSC_Frequency_prop, sizeof(uint64_t), &Platform.CPU.TSCFrequency);␊
␉}␊
␊
␉if (Platform.CPU.CPUFrequency != 0)␊
␉{␊
␉␉DT__AddProperty(efiPlatformNode, CPU_Frequency_prop, sizeof(uint64_t), &Platform.CPU.CPUFrequency);␊
␉}␊
␊
␉// Export system-id. Can be disabled with SystemId=No in com.apple.Boot.plist␊
␉if ((ret=getSystemID()))␊
␉{␊
␉␉DT__AddProperty(efiPlatformNode, SYSTEM_ID_PROP, UUID_LEN, (EFI_UINT32*) ret);␊
␉}␊
␊
␉// Export SystemSerialNumber if present␊
␉if ((ret16=getSmbiosChar16("SMserial", &len)))␊
␉{␊
␉␉DT__AddProperty(efiPlatformNode, SYSTEM_SERIAL_PROP, len, ret16);␊
␉}␊
␊
␉// Export Model if present␊
␉if ((ret16=getSmbiosChar16("SMproductname", &len)))␊
␉{␊
␉␉DT__AddProperty(efiPlatformNode, MODEL_PROP, len, ret16);␊
␉}␊
␊
␉// Fill /efi/device-properties node.␊
␉setupDeviceProperties(node);␊
{␊
␉Node *node;␊
␉node = DT__FindNode("/", false);␊
␉if (node == 0) {␊
␉if (node == 0)␊
␉{␊
␉␉stop("Couldn't get root node");␊
␉}␊
␉const char *boardid = getStringForKey("SMboardproduct", &bootInfo->smbiosConfig);␊
␉if (boardid)␊
␉{␊
␉␉DT__AddProperty(node, BOARDID_PROP, strlen(boardid)+1, (EFI_CHAR16*)boardid);␊
␉}␊
}␊
␊
/*␊
␉Node *chosenNode;␊
␉chosenNode = DT__FindNode("/chosen", false);␊
␉if (chosenNode == 0)␊
␉{␊
␉␉stop("Couldn't get chosen node");␊
␉}␊
␊
␉int bootUUIDLength = strlen(gBootUUIDString);␊
␉if (bootUUIDLength)␊
␉{␊
␉␉DT__AddProperty(chosenNode, "boot-uuid", bootUUIDLength + 1, gBootUUIDString);␊
␉}␊
}␊
␊
/*␊
static void setupSmbiosConfigFile(const char *filename)␊
{␊
␉char␉␉dirSpecSMBIOS[128];␊
␉const char *override_pathname = NULL;␊
␉int␉␉␉len = 0, err = 0;␊
␉const char␉*override_pathname = NULL;␊
␉int␉␉len = 0, err = 0;␊
␉extern void scan_mem();␊
␊
␉// Take in account user overriding␊
trunk/i386/libsaio/smbios_getters.c
3737
3838
3939
40
40
4141
4242
4343
......
7575
7676
7777
78
7879
7980
8081
......
8283
8384
8485
86
8587
8688
8789
......
8991
9092
9193
94
95
9296
9397
9498
9599
96100
97
101
98102
99103
100104
......
115119
116120
117121
118
122
123
124
125
119126
120127
121128
......
161168
162169
163170
171
164172
165173
166174
......
169177
170178
171179
172
173
174
175180
181
176182
177
183
184
185
178186
187
179188
180189
181190
182191
183
184
185
186
187
188
192
193
194
195
196
197
198
199
200
201
202
203
189204
190205
191206
192207
193
208
209
210
194211
212
195213
214
196215
197216
198217
199218
219
200220
201221
202222
203223
204
224
225
226
227
228
205229
206
207
208
209
210
211
230
231
232
233
234
235
236
237
238
239
240
212241
242
243
244
245
246
247
248
249
250
251
252
253
213254
214255
256
257
215258
216259
217260
......
292335
293336
294337
295
338
296339
297340
298341
......
300343
301344
302345
303
346
304347
305348
306349
␉␉␉␉␉case CPU_MODEL_HASWELL:␊
␉␉␉␉␉case CPU_MODEL_HASWELL_MB:␊
␉␉␉␉␉case CPU_MODEL_HASWELL_ULT:␊
␉␉␉␉␉case CPU_MODEL_HASWELL_ULX:␊
␉␉␉␉␉case CPU_MODEL_CRYSTALWELL:␊
␊
␉␉␉␉␉␉value->word = 0;␊
␉␉␉␉␉␉break;␊
␉␉␉{␊
␉␉␉␉switch (Platform.CPU.Model)␊
␉␉␉␉{␊
␉␉␉␉␉case CPU_MODEL_PENTIUM_M:␊
␉␉␉␉␉case CPU_MODEL_DOTHAN:␉␉// Intel Pentium M␊
␉␉␉␉␉case CPU_MODEL_YONAH:␉␉// Intel Mobile Core Solo, Duo␊
␉␉␉␉␉case CPU_MODEL_MEROM:␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
␉␉␉␉␉case CPU_MODEL_ATOM:␉␉// Intel Atom (45nm)␊
␉␉␉␉␉␉return false;␊
␊
␉␉␉␉␉case 0x19:␊
␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
␉␉␉␉␉case CPU_MODEL_DALES:␊
␉␉␉␉␉case CPU_MODEL_WESTMERE:␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
␉␉␉␉␉case CPU_MODEL_NEHALEM_EX:␉// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x␊
␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉// Intel Xeon E7␊
␉␉␉␉␉case CPU_MODEL_SANDYBRIDGE:␊
␉␉␉␉␉case CPU_MODEL_JAKETOWN:␊
␉␉␉␉␉{␊
␉␉␉␉␉␉// thanks to dgobe for i3/i5/i7 bus speed detection␊
␉␉␉␉␉␉int nhm_bus = 0x3F;␊
␉␉␉␉␉␉static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};␊
␉␉␉␉␉␉unsigned long did, vid;␊
␉␉␉␉␉␉int i;␊
␉␉␉␉␉␉unsigned int i;␊
␉␉␉␉␉␉␊
␉␉␉␉␉␉// Nehalem supports Scrubbing␊
␉␉␉␉␉␉// First, locate the PCI bus where the MCH is located␊
␉␉␉␉␉␉DBG("qpimult %d\n", qpimult);␊
␉␉␉␉␉␉qpibusspeed = (qpimult * 2 * (Platform.CPU.FSBFrequency/1000000));␊
␉␉␉␉␉␉// Rek: rounding decimals to match original mac profile info␊
␉␉␉␉␉␉if (qpibusspeed%100 != 0)qpibusspeed = ((qpibusspeed+50)/100)*100;␊
␉␉␉␉␉␉if (qpibusspeed%100 != 0)␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉qpibusspeed = ((qpibusspeed+50)/100)*100;␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉DBG("qpibusspeed %d\n", qpibusspeed);␊
␉␉␉␉␉␉value->word = qpibusspeed;␊
␉␉␉␉␉␉return true;␊
␉␉␉{␊
␉␉␉␉switch (Platform.CPU.Model)␊
␉␉␉␉{␊
␉␉␉␉␉case CPU_MODEL_PENTIUM_M:␊
␉␉␉␉␉case CPU_MODEL_DOTHAN:␉␉␉␉// Intel Pentium M␊
␉␉␉␉␉case CPU_MODEL_YONAH:␉␉␉␉// Intel Mobile Core Solo, Duo␊
␉␉␉␉␉case CPU_MODEL_MEROM:␉␉␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
␉␉␉␉␉case CPU_MODEL_WESTMERE:␉␉␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉␉␉// Intel Xeon E7␊
␉␉␉␉␉case CPU_MODEL_JAKETOWN:␉␉␉// Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Xeon ␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7"))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
␉␉␉␉␉␉␉value->word = 0x0501;// Xeon␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉␉␉value->word = 0x0601;␉␉␉// Core i5␊
␉␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x501;// Xeon␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7"))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x701;␉␉␉// Core i7␊
␉␉␉␉␉␉}␊
␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_DALES:␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉␉value->word = 0x0601;␉␉␉// Core i5␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_SANDYBRIDGE:␉␉␉// Intel Core i3, i5, i7 LGA1155 (32nm)␊
␉␉␉␉␉case CPU_MODEL_IVYBRIDGE:␉␉␉// Intel Core i3, i5, i7 LGA1155 (22nm)␊
␉␉␉␉␉case CPU_MODEL_IVYBRIDGE_XEON:␊
␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉␉␉// Intel Core i3, i5 LGA1156 (32nm)␊
␉␉␉␉␉case CPU_MODEL_HASWELL:␊
␉␉␉␉␉case CPU_MODEL_HASWELL_MB:␊
␉␉␉␉␉case CPU_MODEL_HASWELL_ULT:␊
␉␉␉␉␉case CPU_MODEL_HASWELL_ULX:␊
␉␉␉␉␉case CPU_MODEL_CRYSTALWELL:␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x0501;␉␉// Xeon␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))␊
␉␉␉␉␉␉␉value->word = 0x0901;␉␉␉// Core i3␊
␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉␉␉value->word = 0x0601;␉␉// Core i5␊
␉␉␉␉␉␉␉else␊
␉␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x901;␉␉// Core i3␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x601;␉␉// Core i5␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i7"))␊
␉␉␉␉␉␉{␊
␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
␉␉␉␉␉␉}␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case CPU_MODEL_JAKETOWN:␉␉␉// Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)␊
␉␉␉␉␉case CPU_MODEL_WESTMERE:␉␉␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉␉␉// Intel Xeon E7␊
␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Core i7␊
␉␉␉␉␉␉return true;␊
␊
␉␉␉␉␉case 0x19:␉␉␉␉␉// Intel Core i5 650 @3.20 Ghz␊
␉␉␉␉␉␉value->word = 0x601;␉␉␉// Core i5␊
␉␉␉␉␉␉return true;␊
␉␉␉␉␉default:␊
␉␉␉␉␉␉break; //Unsupported CPU type␊
␉␉␉␉}␊
␉␉␉}␊
␉␉␉default:␊
␉␉␉␉break; ␊
␉␉}␊
␉}␊
␉␊
␉value->string = NOT_AVAILABLE;␊
␉return true;␊
}␊
␉␊
␊
bool getSMBMemoryDeviceSerialNumber(returnType *value)␊
{␊
␉static int idx = -1;␊
␊
␉idx++;␊
␊
DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);␊
␉DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);␊
␊
␉if (idx < MAX_RAM_SLOTS)␊
␉{␊
trunk/i386/libsaio/saio_internal.h
218218
219219
220220
221
221
222222
223223
224224
unsigned int byteoff,␊
unsigned int byteCount, void * buffer );␊
␊
// Base64-decode.c␊
/* Base64-decode.c */␊
char *BASE64Decode(const char* src, int in_len, int* out_len);␊
␊
#endif /* !__LIBSAIO_SAIO_INTERNAL_H */␊

Archive Download the corresponding diff file

Revision: 2269