Chameleon

Chameleon Commit Details

Date:2011-06-06 16:49:40 (12 years 10 months ago)
Author:Azimutz
Commit:980
Parents: 979
Message:Checked till r911...
Changes:
A/branches/azimutz/Chazi/i386/util/fdisk/user.h
A/branches/azimutz/Chazi/i386/util/fdisk/getrawpartition.c
A/branches/azimutz/Chazi/i386/util/fdisk/Cconfig
A/branches/azimutz/Chazi/i386/util/fdisk/disk.c
A/branches/azimutz/Chazi/i386/util/fdisk/Makefile
A/branches/azimutz/Chazi/i386/util/fdisk/disk.h
A/branches/azimutz/Chazi/i386/util/fdisk/fdisk.c
A/branches/azimutz/Chazi/i386/util/openUp.c
A/branches/azimutz/Chazi/i386/util/fdisk/auto.c
A/branches/azimutz/Chazi/i386/util/fdisk/auto.h
A/branches/azimutz/Chazi/i386/util/fdisk/mbr.c
A/branches/azimutz/Chazi/i386/util/fdisk/mbrcode.h
A/branches/azimutz/Chazi/i386/util/fdisk/mbr.h
A/branches/azimutz/Chazi/i386/util/fdisk/fdisk.8
A/branches/azimutz/Chazi/i386/util/fdisk/misc.c
A/branches/azimutz/Chazi/i386/util/fdisk/misc.h
A/branches/azimutz/Chazi/i386/util/fdisk/opendev.c
A/branches/azimutz/Chazi/i386/util/fdisk/cmd.c
A/branches/azimutz/Chazi/i386/util/fdisk/part.c
A/branches/azimutz/Chazi/i386/util/fdisk/cmd.h
A/branches/azimutz/Chazi/i386/util/fdisk/part.h
A/branches/azimutz/Chazi/i386/util/fdisk/user.c
A/branches/azimutz/Chazi/i386/util/fdisk
A/branches/azimutz/Chazi/i386/util/fdisk/util.h
M/branches/azimutz/Chazi/i386/boot2/modules.h
M/branches/azimutz/Chazi/i386/libsaio/pci.h
M/branches/azimutz/Chazi/i386/util/Cconfig
M/branches/azimutz/Chazi/coding_standards.txt
M/branches/azimutz/Chazi/i386/libsaio/bootstruct.c
M/branches/azimutz/Chazi/i386/libsaio/bootstruct.h
M/branches/azimutz/Chazi/i386/libsaio/cpu.c
M/branches/azimutz/Chazi/i386/util/bdmesg.c
M/branches/azimutz/Chazi/i386/libsaio/cpu.h
M/branches/azimutz/Chazi/i386/modules/HelloWorld/Makefile
M/branches/azimutz/Chazi/i386/util/dyldsymboltool.c
M/branches/azimutz/Chazi/i386/modules/HelloWorld/HelloWorld.cpp

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branches/azimutz/Chazi/coding_standards.txt
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having seen most indentation styles going from 2 to 8 spaces, I would suggest a indentation of 4 spaces.
2. Comments
I see here two main different cases:
I see here two main differents cases:
function description comments and one-line code quite comments
For functions documentation, I suggest to use this syntax
int my_variable_is_ok;
Functions should follow the same conventions except for standard c lib related functions.
Types should share the same convention but start with a Capital letter instead of lower case.
Types should share the same convention but start with a Captial letter instead of lower case.
11. Please make sure you extensively initialize variables:
avoid as much as possible:
branches/azimutz/Chazi/i386/libsaio/bootstruct.c
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* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* Source License Version 2.0 (the "License").You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
boot_args_pre_lion*bootArgsPreLion;
PrivateBootInfo_t*bootInfo;
Node*gMemoryMapNode;
//Node *efiPlatformNode; //Azi: test
//Node*efiPlatformNode; //Azi: test
//static Azi: modules ?? doesn't seem so.
static char platformName[64];
//Azi: bootargs - we can't retrive OS version at this point...
void initKernBootStruct( void )
{
Node *node;
int nameLen;
static int init_done = 0;
if ( !init_done )
{
bootArgs = (boot_args *)malloc(sizeof(boot_args));
Node *node;
int nameLen;
static int init_done = 0;
if ( !init_done )
{
bootArgs = (boot_args *)malloc(sizeof(boot_args));
bootArgsPreLion = (boot_args_pre_lion *)malloc(sizeof(boot_args_pre_lion));
bootInfo = (PrivateBootInfo_t *)malloc(sizeof(PrivateBootInfo_t));
if (bootArgs == 0 || bootInfo == 0)
stop("Couldn't allocate boot info\n");
bzero(bootArgs, sizeof(boot_args));
bootInfo = (PrivateBootInfo_t *)malloc(sizeof(PrivateBootInfo_t));
if (bootArgs == 0 || bootInfo == 0)
stop("Couldn't allocate boot info\n");
bzero(bootArgs, sizeof(boot_args));
bzero(bootArgsPreLion, sizeof(boot_args_pre_lion));
bzero(bootInfo, sizeof(PrivateBootInfo_t));
// Get system memory map. Also update the size of the
// conventional/extended memory for backwards compatibility.
bootInfo->memoryMapCount =
getMemoryMap( bootInfo->memoryMap, kMemoryMapCountMax,
(unsigned long *) &bootInfo->convmem,
(unsigned long *) &bootInfo->extmem );
if ( bootInfo->memoryMapCount == 0 )
{
// BIOS did not provide a memory map, systems with
// discontiguous memory or unusual memory hole locations
// may have problems.
bootInfo->convmem = getConventionalMemorySize();
bootInfo->extmem = getExtendedMemorySize();
}
bootInfo->configEnd = bootInfo->config;
bootArgs->Video.v_display = VGA_TEXT_MODE;
DT__Initialize();
node = DT__FindNode("/", true);
if (node == 0) {
stop("Couldn't create root node");
}
getPlatformName(platformName);
nameLen = strlen(platformName) + 1;
DT__AddProperty(node, "compatible", nameLen, platformName);
DT__AddProperty(node, "model", nameLen, platformName);
gMemoryMapNode = DT__FindNode("/chosen/memory-map", true);
bzero(bootInfo, sizeof(PrivateBootInfo_t));
// Get system memory map. Also update the size of the
// conventional/extended memory for backwards compatibility.
bootInfo->memoryMapCount =
getMemoryMap( bootInfo->memoryMap, kMemoryMapCountMax,
(unsigned long *) &bootInfo->convmem,
(unsigned long *) &bootInfo->extmem );
if ( bootInfo->memoryMapCount == 0 )
{
// BIOS did not provide a memory map, systems with
// discontiguous memory or unusual memory hole locations
// may have problems.
bootInfo->convmem = getConventionalMemorySize();
bootInfo->extmem = getExtendedMemorySize();
}
bootInfo->configEnd = bootInfo->config;
bootArgs->Video.v_display = VGA_TEXT_MODE;
DT__Initialize();
node = DT__FindNode("/", true);
if (node == 0) {
stop("Couldn't create root node");
}
getPlatformName(platformName);
nameLen = strlen(platformName) + 1;
DT__AddProperty(node, "compatible", nameLen, platformName);
DT__AddProperty(node, "model", nameLen, platformName);
gMemoryMapNode = DT__FindNode("/chosen/memory-map", true);
//efiPlatformNode = DT__FindNode("/efi/platform", true); //Azi: test
bootArgs->Version = kBootArgsVersion;
bootArgs->Revision = kBootArgsRevision;
bootArgs->Version = kBootArgsVersion;
bootArgs->Revision = kBootArgsRevision;
bootArgsPreLion->Version = kBootArgsPreLionVersion;
bootArgsPreLion->Revision = kBootArgsPreLionRevision;
bootArgsPreLion->Revision = kBootArgsPreLionRevision;
init_done = 1;
}
init_done = 1;
}
}
//Azi: ... but here we can... (done)
/** Copy boot args after kernel and record address. */
/* Copy boot args after kernel and record address. */
void
reserveKernBootStruct(void)
{
if (gMacOSVersion[3] <= '6')
{
{
void *oldAddr = bootArgsPreLion;
bootArgsPreLion = (boot_args_pre_lion *)AllocateKernelMemory(sizeof(boot_args_pre_lion));
bcopy(oldAddr, bootArgsPreLion, sizeof(boot_args_pre_lion));
}
else {
else
{
void *oldAddr = bootArgs;
bootArgs = (boot_args *)AllocateKernelMemory(sizeof(boot_args));
bcopy(oldAddr, bootArgs, sizeof(boot_args));
}
}
//Azi: ... and here too.
void
finalizeBootStruct(void)
{
uint32_t size;
void *addr;
int i;
EfiMemoryRange *memoryMap;
MemoryRange *range;
int memoryMapCount = bootInfo->memoryMapCount;
if (memoryMapCount == 0) {
// XXX could make a two-part map here
stop("Unable to convert memory map into proper format\n");
}
// convert memory map to boot_args memory map
memoryMap = (EfiMemoryRange *)AllocateKernelMemory(sizeof(EfiMemoryRange) * memoryMapCount);
bootArgs->MemoryMap = (uint32_t)memoryMap;
bootArgs->MemoryMapSize = sizeof(EfiMemoryRange) * memoryMapCount;
bootArgs->MemoryMapDescriptorSize = sizeof(EfiMemoryRange);
bootArgs->MemoryMapDescriptorVersion = 0;
for (i=0; i<memoryMapCount; i++, memoryMap++) {
range = &bootInfo->memoryMap[i];
switch(range->type) {
uint32_t size;
void *addr;
int i;
EfiMemoryRange *memoryMap;
MemoryRange *range;
int memoryMapCount = bootInfo->memoryMapCount;
if (memoryMapCount == 0) {
// XXX could make a two-part map here
stop("Unable to convert memory map into proper format\n");
}
// convert memory map to boot_args memory map
memoryMap = (EfiMemoryRange *)AllocateKernelMemory(sizeof(EfiMemoryRange) * memoryMapCount);
bootArgs->MemoryMap = (uint32_t)memoryMap;
bootArgs->MemoryMapSize = sizeof(EfiMemoryRange) * memoryMapCount;
bootArgs->MemoryMapDescriptorSize = sizeof(EfiMemoryRange);
bootArgs->MemoryMapDescriptorVersion = 0;
for (i=0; i<memoryMapCount; i++, memoryMap++) {
range = &bootInfo->memoryMap[i];
switch(range->type) {
case kMemoryRangeACPI:
memoryMap->Type = kEfiACPIReclaimMemory;
break;
default:
memoryMap->Type = kEfiReservedMemoryType;
break;
}
memoryMap->PhysicalStart = range->base;
memoryMap->VirtualStart = range->base;
memoryMap->NumberOfPages = range->length >> I386_PGSHIFT;
memoryMap->Attribute = 0;
}
// copy bootFile into device tree
// XXX
// add PCI info somehow into device tree
// XXX
// Flatten device tree
DT__FlattenDeviceTree(0, &size);
addr = (void *)AllocateKernelMemory(size);
if (addr == 0) {
stop("Couldn't allocate device tree\n");
}
DT__FlattenDeviceTree((void **)&addr, &size);
bootArgs->deviceTreeP = (uint32_t)addr;
bootArgs->deviceTreeLength = size;
}
memoryMap->PhysicalStart = range->base;
memoryMap->VirtualStart = range->base;
memoryMap->NumberOfPages = range->length >> I386_PGSHIFT;
memoryMap->Attribute = 0;
}
// copy bootFile into device tree
// XXX
// add PCI info somehow into device tree
// XXX
// Flatten device tree
DT__FlattenDeviceTree(0, &size);
addr = (void *)AllocateKernelMemory(size);
if (addr == 0) {
stop("Couldn't allocate device tree\n");
}
DT__FlattenDeviceTree((void **)&addr, &size);
bootArgs->deviceTreeP = (uint32_t)addr;
bootArgs->deviceTreeLength = size;
// Copy BootArgs values to older structure
//Azi: Ok, stuff that uses same naming for both bootargs versions... neat ;)
memcpy(&bootArgsPreLion->CommandLine, &bootArgs->CommandLine, BOOT_LINE_LENGTH);
bootArgsPreLion->MemoryMapDescriptorSize = bootArgs->MemoryMapDescriptorSize;
bootArgsPreLion->MemoryMapDescriptorVersion = bootArgs->MemoryMapDescriptorVersion;
bootArgsPreLion->deviceTreeP = bootArgs->deviceTreeP;
bootArgsPreLion->deviceTreeP = bootArgs->deviceTreeP;
bootArgsPreLion->deviceTreeLength = bootArgs->deviceTreeLength;
bootArgsPreLion->kaddr = bootArgs->kaddr;
bootArgsPreLion->performanceDataStart = bootArgs->performanceDataStart;
bootArgsPreLion->performanceDataSize = bootArgs->performanceDataSize;
bootArgsPreLion->efiRuntimeServicesVirtualPageStart = bootArgs->efiRuntimeServicesVirtualPageStart;
}
branches/azimutz/Chazi/i386/libsaio/bootstruct.h
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/*!
PrivateBootInfo has fields used by the booter that used to be part of
KernelBootArgs_t *bootArgs. When the switch was made to EFI the structure
completely changed to boot_args *bootArgs. This (new to boot-132) structure
KernelBootArgs_t *bootArgs. When the switch was made to EFI the structure
completely changed to boot_args *bootArgs. This (new to boot-132) structure
contains the fields the kernel no longer cares about but the booter still
uses internally. Some fields (e.g. the video information) remain interesting
uses internally. Some fields (e.g. the video information) remain interesting
to the kernel and are thus located in bootArgs although with different field names.
*/
typedef struct PrivateBootInfo {
config_file_t ramdiskConfig; // RAMDisk.plist
} PrivateBootInfo_t;
extern PrivateBootInfo_t *bootInfo;
extern PrivateBootInfo_t *bootInfo;
#endif /* __BOOTSTRUCT_H */
branches/azimutz/Chazi/i386/libsaio/cpu.c
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p->CPU.ExtModel= bitfield(p->CPU.CPUID[CPUID_1][0], 19, 16);
p->CPU.ExtFamily= bitfield(p->CPU.CPUID[CPUID_1][0], 27, 20);
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == 0x756E6547 /* Intel */ && p->CPU.Family == 0x06 && p->CPU.Model >= 0x1a){
msr = rdmsr64(MSR_CORE_THREAD_COUNT);// Undocumented MSR in Nehalem and newer CPUs
p->CPU.NoCores= bitfield((uint32_t)msr, 31, 16);// Using undocumented MSR to get actual values
p->CPU.NoThreads= bitfield((uint32_t)msr, 15, 0);// Using undocumented MSR to get actual values
p->CPU.Model += (p->CPU.ExtModel << 4);
if (p->CPU.Vendor == 0x756E6547 /* Intel */ &&
p->CPU.Family == 0x06 &&
p->CPU.Model >= CPUID_MODEL_NEHALEM &&
p->CPU.Model != CPUID_MODEL_ATOM // MSR is *NOT* available on the Intel Atom CPU
){
msr = rdmsr64(MSR_CORE_THREAD_COUNT);// Undocumented MSR in Nehalem and newer CPUs
p->CPU.NoCores= bitfield((uint32_t)msr, 31, 16);// Using undocumented MSR to get actual values
p->CPU.NoThreads= bitfield((uint32_t)msr, 15, 0);// Using undocumented MSR to get actual values
} else {
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);// Use previous method for Cores and Threads
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
p->CPU.NoThreads= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);// Use previous method for Cores and Threads
p->CPU.NoCores= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;
}
/* get brand string (if supported) */
}
}
}
/* Mobile CPU ? */
if (rdmsr64(0x17) & (1<<28)) {
/* Mobile CPU */
if (rdmsr64(MSR_IA32_PLATFORM_ID) & (1<<28)) {
p->CPU.Features |= CPU_FEATURE_MOBILE;
}
}
p->CPU.TSCFrequency = tscFrequency;
p->CPU.FSBFrequency = fsbFrequency;
p->CPU.CPUFrequency = cpuFrequency;
DBG("CPU: Vendor/Model/ExtModel: 0x%x/0x%x/0x%x\n", p->CPU.Vendor, p->CPU.Model, p->CPU.ExtModel);
DBG("CPU: Family/ExtFamily: 0x%x/0x%x\n", p->CPU.Family, p->CPU.ExtFamily);
DBG("CPU: MaxCoef/CurrCoef: 0x%x/0x%x\n", p->CPU.MaxCoef, p->CPU.CurrCoef);
DBG("CPU: MaxDiv/CurrDiv: 0x%x/0x%x\n", p->CPU.MaxDiv, p->CPU.CurrDiv);
DBG("CPU: TSCFreq: %dMHz\n", p->CPU.TSCFrequency / 1000000);
DBG("CPU: FSBFreq: %dMHz\n", p->CPU.FSBFrequency / 1000000);
DBG("CPU: CPUFreq: %dMHz\n", p->CPU.CPUFrequency / 1000000);
DBG("CPU: NoCores/NoThreads: %d/%d\n", p->CPU.NoCores, p->CPU.NoThreads);
DBG("CPU: Features: 0x%08x\n", p->CPU.Features);
DBG("CPU: Brand String: %s\n",p->CPU.BrandString);
DBG("CPU: Vendor/Family/ExtFamily: 0x%x/0x%x/0x%x\n",p->CPU.Vendor, p->CPU.Family, p->CPU.ExtFamily);
DBG("CPU: Model/ExtModel/Stepping: 0x%x/0x%x/0x%x\n",p->CPU.Model, p->CPU.ExtModel, p->CPU.Stepping);
DBG("CPU: MaxCoef/CurrCoef: 0x%x/0x%x\n",p->CPU.MaxCoef, p->CPU.CurrCoef);
DBG("CPU: MaxDiv/CurrDiv: 0x%x/0x%x\n",p->CPU.MaxDiv, p->CPU.CurrDiv);
DBG("CPU: TSCFreq: %dMHz\n",p->CPU.TSCFrequency / 1000000);
DBG("CPU: FSBFreq: %dMHz\n",p->CPU.FSBFrequency / 1000000);
DBG("CPU: CPUFreq: %dMHz\n",p->CPU.CPUFrequency / 1000000);
DBG("CPU: NoCores/NoThreads: %d/%d\n",p->CPU.NoCores, p->CPU.NoThreads);
DBG("CPU: Features: 0x%08x\n",p->CPU.Features);
#if DEBUG_CPU
pause();
#endif
branches/azimutz/Chazi/i386/libsaio/cpu.h
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#ifndef __LIBSAIO_CPU_H
#define __LIBSAIO_CPU_H
//#include "libsaio.h"
//#include "libsaio.h" - enabled on trunk
extern void scan_cpu(PlatformInfo_t *);
#define MSR_FLEX_RATIO0x194
#define MSR_TURBO_RATIO_LIMIT0x1AD
#defineMSR_PLATFORM_INFO0xCE
#define MSR_CORE_THREAD_COUNT0x35// Undocumented
#define MSR_IA32_PLATFORM_ID0x17
#define K8_FIDVID_STATUS0xC0010042
#define K10_COFVID_STATUS0xC0010071
#define MSR_CORE_THREAD_COUNT0x35// Undocumented
//#define DEFAULT_FSB100000 // for now, hardcoding 100MHz for old CPUs - disabled
#define CALIBRATE_TIME_MSEC30/* 30 msecs */
#define CALIBRATE_LATCH((CLKNUM * CALIBRATE_TIME_MSEC + 1000/2)/1000)
// CPUID Values
#define CPUID_MODEL_YONAH14// Intel Mobile Core Solo, Duo
#define CPUID_MODEL_MEROM15// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
#define CPUID_MODEL_PENRYN23// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
#define CPUID_MODEL_NEHALEM26// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
#define CPUID_MODEL_ATOM28// Intel Atom (45nm)
#define CPUID_MODEL_FIELDS30// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
#define CPUID_MODEL_DALES31// Havendale, Auburndale
#define CPUID_MODEL_DALES_32NM37// Intel Core i3, i5 LGA1156 (32nm)
#define CPUID_MODEL_SANDY42// Intel Core i3, i5, i7 LGA1155 (32nm)
#define CPUID_MODEL_WESTMERE44// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
#define CPUID_MODEL_NEHALEM_EX46// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
#define CPUID_MODEL_WESTMERE_EX47// Intel Xeon E7
static inline uint64_t rdtsc64(void)
{
uint64_t ret;
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typedef struct {
uint32_t:2;
uint32_treg:6;
uint32_treg :6;
uint32_tfunc:3;
uint32_tdev:5;
uint32_tbus:8;
uint32_tdev :5;
uint32_tbus :8;
uint32_t:7;
uint32_teb:1;
} pci_addr_t;
struct {
uint16_tvendor_id;
uint16_tdevice_id;
}subsys;
} subsys;
uint32_tsubsys_id;
}subsys_id;
struct pci_dt_t*next;
} pci_dt_t;
#define PCIADDR(bus, dev, func)(1 << 31) | (bus << 16) | (dev << 11) | (func << 8)
#define PCIADDR(bus, dev, func) (1 << 31) | (bus << 16) | (dev << 11) | (func << 8)
#define PCI_ADDR_REG0xcf8
#define PCI_DATA_REG0xcfc
/* Option ROM header */
typedef struct {
uint16_tsignature;// 0xAA55
uint8_trom_size;
uint32_tentry_point;
uint8_treserved[15];
uint16_tpci_header_offset;
uint16_texpansion_header_offset;
uint16_tsignature;// 0xAA55
uint8_trom_size;
uint32_tentry_point;
uint8_treserved[15];
uint16_tpci_header_offset;
uint16_texpansion_header_offset;
} option_rom_header_t;
/* Option ROM PCI Data Structure */
typedef struct {
uint32_tsignature;// ati - 0x52494350, nvidia - 0x50434952'PCIR'
uint16_tvendor_id;
uint16_tdevice_id;
uint16_tvital_product_data_offset;
uint16_tstructure_length;
uint8_tstructure_revision;
uint8_tclass_code[3];
uint16_timage_length;
uint16_timage_revision;
uint8_tcode_type;
uint8_tindicator;
uint16_treserved;
uint32_tsignature;// ati - 0x52494350, nvidia - 0x50434952, 'PCIR'
uint16_tvendor_id;
uint16_tdevice_id;
uint16_tvital_product_data_offset;
uint16_tstructure_length;
uint8_tstructure_revision;
uint8_tclass_code[3];
uint16_timage_length;
uint16_timage_revision;
uint8_tcode_type;
uint8_tindicator;
uint16_treserved;
} option_rom_pci_header_t;
//-----------------------------------------------------------------------------
// added by iNDi
typedef struct {
uint32_tsignature;// 0x24506E50 '$PnP'
uint8_trevision;// 1
uint8_tlength;//
uint16_toffset;
uint8_tchecksum;
uint32_tidentifier;
uint16_tmanufacturer;
uint16_tproduct;
uint8_tclass[3];
uint8_tindicators;
uint16_tboot_vector;
uint16_tdisconnect_vector;
uint16_tbootstrap_vector;
uint16_treserved;
uint16_tresource_vector;
uint32_tsignature;// 0x24506E50 '$PnP'
uint8_trevision;//1
uint8_tlength;
uint16_toffset;
uint8_tchecksum;
uint32_tidentifier;
uint16_tmanufacturer;
uint16_tproduct;
uint8_tclass[3];
uint8_tindicators;
uint16_tboot_vector;
uint16_tdisconnect_vector;
uint16_tbootstrap_vector;
uint16_treserved;
uint16_tresource_vector;
} option_rom_pnp_header_t;
/*
* Under PCI, each device has 256 bytes of configuration address space,
* of which the first 64 bytes are standardized as follows:
*/
#define PCI_VENDOR_ID0x00/* 16 bits */
#define PCI_DEVICE_ID0x02/* 16 bits */
#define PCI_COMMAND0x04/* 16 bits */
#define PCI_COMMAND_IO0x1/* Enable response in I/O space */
#define PCI_COMMAND_MEMORY0x2/* Enable response in Memory space */
#define PCI_COMMAND_MASTER0x4/* Enable bus mastering */
#define PCI_COMMAND_SPECIAL0x8/* Enable response to special cycles */
#define PCI_COMMAND_INVALIDATE0x10/* Use memory write and invalidate */
#define PCI_COMMAND_VGA_PALETTE0x20/* Enable palette snooping */
#define PCI_COMMAND_PARITY0x40/* Enable parity checking */
#define PCI_COMMAND_WAIT0x80/* Enable address/data stepping */
#define PCI_COMMAND_SERR0x100/* Enable SERR */
#define PCI_COMMAND_FAST_BACK0x200/* Enable back-to-back writes */
#define PCI_COMMAND_DISABLE_INTx0x400/* PCIE: Disable INTx interrupts */
#define PCI_VENDOR_ID0x00/* 16 bits */
#define PCI_DEVICE_ID0x02/* 16 bits */
#define PCI_COMMAND0x04/* 16 bits */
#define PCI_COMMAND_IO0x1/* Enable response in I/O space */
#define PCI_COMMAND_MEMORY0x2/* Enable response in Memory space */
#define PCI_COMMAND_MASTER0x4/* Enable bus mastering */
#define PCI_COMMAND_SPECIAL0x8/* Enable response to special cycles */
#define PCI_COMMAND_INVALIDATE0x10/* Use memory write and invalidate */
#define PCI_COMMAND_VGA_PALETTE0x20/* Enable palette snooping */
#define PCI_COMMAND_PARITY0x40/* Enable parity checking */
#define PCI_COMMAND_WAIT0x80/* Enable address/data stepping */
#define PCI_COMMAND_SERR0x100/* Enable SERR */
#define PCI_COMMAND_FAST_BACK0x200/* Enable back-to-back writes */
#define PCI_COMMAND_DISABLE_INTx0x400/* PCIE: Disable INTx interrupts */
#define PCI_STATUS0x06/* 16 bits */
#define PCI_STATUS_INTx0x08/* PCIE: INTx interrupt pending */
#define PCI_STATUS_CAP_LIST0x10/* Support Capability List */
#define PCI_STATUS_66MHZ0x20/* Support 66 Mhz PCI 2.1 bus */
#define PCI_STATUS_UDF0x40/* Support User Definable Features [obsolete] */
#define PCI_STATUS_FAST_BACK0x80/* Accept fast-back to back */
#define PCI_STATUS_PARITY0x100/* Detected parity error */
#define PCI_STATUS_DEVSEL_MASK0x600/* DEVSEL timing */
#define PCI_STATUS_DEVSEL_FAST0x000
#define PCI_STATUS_DEVSEL_MEDIUM0x200
#define PCI_STATUS_DEVSEL_SLOW0x400
#define PCI_STATUS_SIG_TARGET_ABORT 0x800/* Set on target abort */
#define PCI_STATUS_REC_TARGET_ABORT 0x1000/* Master ack of " */
#define PCI_STATUS_REC_MASTER_ABORT 0x2000/* Set on master abort */
#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000/* Set when we drive SERR */
#define PCI_STATUS_DETECTED_PARITY0x8000/* Set on parity error */
#define PCI_STATUS0x06/* 16 bits */
#define PCI_STATUS_INTx0x08/* PCIE: INTx interrupt pending */
#define PCI_STATUS_CAP_LIST0x10/* Support Capability List */
#define PCI_STATUS_66MHZ0x20/* Support 66 Mhz PCI 2.1 bus */
#define PCI_STATUS_UDF0x40/* Support User Definable Features [obsolete] */
#define PCI_STATUS_FAST_BACK0x80/* Accept fast-back to back */
#define PCI_STATUS_PARITY0x100/* Detected parity error */
#define PCI_STATUS_DEVSEL_MASK0x600/* DEVSEL timing */
#define PCI_STATUS_DEVSEL_FAST0x000
#define PCI_STATUS_DEVSEL_MEDIUM0x200
#define PCI_STATUS_DEVSEL_SLOW0x400
#define PCI_STATUS_SIG_TARGET_ABORT 0x800/* Set on target abort */
#define PCI_STATUS_REC_TARGET_ABORT 0x1000/* Master ack of " */
#define PCI_STATUS_REC_MASTER_ABORT 0x2000/* Set on master abort */
#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000/* Set when we drive SERR */
#define PCI_STATUS_DETECTED_PARITY0x8000/* Set on parity error */
#define PCI_CLASS_REVISION0x08/* High 24 bits are class, low 8 revision */
#define PCI_REVISION_ID0x08/* Revision ID */
#define PCI_CLASS_PROG0x09/* Reg. Level Programming Interface */
#define PCI_CLASS_DEVICE0x0a/* Device class */
#define PCI_CLASS_REVISION0x08/* High 24 bits are class, low 8 revision */
#define PCI_REVISION_ID0x08 /* Revision ID */
#define PCI_CLASS_PROG0x09 /* Reg. Level Programming Interface */
#define PCI_CLASS_DEVICE0x0a /* Device class */
#define PCI_CACHE_LINE_SIZE0x0c/* 8 bits */
#define PCI_LATENCY_TIMER0x0d/* 8 bits */
#define PCI_HEADER_TYPE0x0e/* 8 bits */
#define PCI_HEADER_TYPE_NORMAL0
#define PCI_HEADER_TYPE_BRIDGE1
#define PCI_HEADER_TYPE_CARDBUS2
#define PCI_CACHE_LINE_SIZE0x0c/* 8 bits */
#define PCI_LATENCY_TIMER0x0d/* 8 bits */
#define PCI_HEADER_TYPE0x0e/* 8 bits */
#define PCI_HEADER_TYPE_NORMAL0
#define PCI_HEADER_TYPE_BRIDGE1
#define PCI_HEADER_TYPE_CARDBUS2
#define PCI_BIST0x0f/* 8 bits */
#define PCI_BIST_CODE_MASK0x0f/* Return result */
#define PCI_BIST_START0x40/* 1 to start BIST, 2 secs or less */
#define PCI_BIST_CAPABLE0x80/* 1 if BIST capable */
#define PCI_BIST0x0f/* 8 bits */
#define PCI_BIST_CODE_MASK0x0f/* Return result */
#define PCI_BIST_START0x40/* 1 to start BIST, 2 secs or less */
#define PCI_BIST_CAPABLE0x80/* 1 if BIST capable */
/*
* Base addresses specify locations in memory or I/O space.
* Decoded size can be determined by writing a value of
* 0xffffffff to the register, and reading it back. Only
* 0xffffffff to the register, and reading it back. Only
* 1 bits are decoded.
*/
#define PCI_BASE_ADDRESS_00x10/* 32 bits */
#define PCI_BASE_ADDRESS_10x14/* 32 bits [htype 0,1 only] */
#define PCI_BASE_ADDRESS_20x18/* 32 bits [htype 0 only] */
#define PCI_BASE_ADDRESS_30x1c/* 32 bits */
#define PCI_BASE_ADDRESS_40x20/* 32 bits */
#define PCI_BASE_ADDRESS_50x24/* 32 bits */
#define PCI_BASE_ADDRESS_SPACE0x01/* 0 = memory, 1 = I/O */
#define PCI_BASE_ADDRESS_SPACE_IO0x01
#define PCI_BASE_ADDRESS_SPACE_MEMORY0x00
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK0x06
#define PCI_BASE_ADDRESS_MEM_TYPE_320x00/* 32 bit address */
#define PCI_BASE_ADDRESS_MEM_TYPE_1M0x02/* Below 1M [obsolete] */
#define PCI_BASE_ADDRESS_MEM_TYPE_640x04/* 64 bit address */
#define PCI_BASE_ADDRESS_MEM_PREFETCH0x08/* prefetchable? */
#define PCI_BASE_ADDRESS_MEM_MASK(~(pciaddr_t)0x0f)
#define PCI_BASE_ADDRESS_IO_MASK(~(pciaddr_t)0x03)
#define PCI_BASE_ADDRESS_00x10/* 32 bits */
#define PCI_BASE_ADDRESS_10x14/* 32 bits [htype 0,1 only] */
#define PCI_BASE_ADDRESS_20x18/* 32 bits [htype 0 only] */
#define PCI_BASE_ADDRESS_30x1c/* 32 bits */
#define PCI_BASE_ADDRESS_40x20/* 32 bits */
#define PCI_BASE_ADDRESS_50x24/* 32 bits */
#define PCI_BASE_ADDRESS_SPACE0x01/* 0 = memory, 1 = I/O */
#define PCI_BASE_ADDRESS_SPACE_IO0x01
#define PCI_BASE_ADDRESS_SPACE_MEMORY0x00
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK0x06
#define PCI_BASE_ADDRESS_MEM_TYPE_320x00/* 32 bit address */
#define PCI_BASE_ADDRESS_MEM_TYPE_1M0x02/* Below 1M [obsolete] */
#define PCI_BASE_ADDRESS_MEM_TYPE_640x04/* 64 bit address */
#define PCI_BASE_ADDRESS_MEM_PREFETCH0x08/* prefetchable? */
#define PCI_BASE_ADDRESS_MEM_MASK(~(pciaddr_t)0x0f)
#define PCI_BASE_ADDRESS_IO_MASK(~(pciaddr_t)0x03)
/* bit 1 is reserved if address_space = 1 */
/* Header type 0 (normal devices) */
#define PCI_CARDBUS_CIS0x28
#define PCI_SUBSYSTEM_VENDOR_ID0x2c
#define PCI_SUBSYSTEM_ID0x2e
#define PCI_ROM_ADDRESS0x30/* Bits 31..11 are address, 10..1 reserved */
#define PCI_ROM_ADDRESS_ENABLE0x01
#define PCI_ROM_ADDRESS_MASK(~(pciaddr_t)0x7ff)
#define PCI_CARDBUS_CIS0x28
#define PCI_SUBSYSTEM_VENDOR_ID0x2c
#define PCI_SUBSYSTEM_ID0x2e
#define PCI_ROM_ADDRESS0x30/* Bits 31..11 are address, 10..1 reserved */
#define PCI_ROM_ADDRESS_ENABLE0x01
#define PCI_ROM_ADDRESS_MASK(~(pciaddr_t)0x7ff)
#define PCI_CAPABILITY_LIST0x34/* Offset of first capability list entry */
#define PCI_CAPABILITY_LIST0x34/* Offset of first capability list entry */
/* 0x35-0x3b are reserved */
#define PCI_INTERRUPT_LINE0x3c/* 8 bits */
#define PCI_INTERRUPT_PIN0x3d/* 8 bits */
#define PCI_MIN_GNT0x3e/* 8 bits */
#define PCI_MAX_LAT0x3f/* 8 bits */
#define PCI_INTERRUPT_LINE0x3c/* 8 bits */
#define PCI_INTERRUPT_PIN0x3d/* 8 bits */
#define PCI_MIN_GNT0x3e/* 8 bits */
#define PCI_MAX_LAT0x3f/* 8 bits */
/* Header type 1 (PCI-to-PCI bridges) */
#define PCI_PRIMARY_BUS0x18/* Primary bus number */
#define PCI_SECONDARY_BUS0x19/* Secondary bus number */
#define PCI_SUBORDINATE_BUS0x1a/* Highest bus number behind the bridge */
#define PCI_SEC_LATENCY_TIMER0x1b/* Latency timer for secondary interface */
#define PCI_IO_BASE0x1c/* I/O range behind the bridge */
#define PCI_IO_LIMIT0x1d
#define PCI_IO_RANGE_TYPE_MASK0x0f/* I/O bridging type */
#define PCI_IO_RANGE_TYPE_160x00
#define PCI_IO_RANGE_TYPE_320x01
#define PCI_IO_RANGE_MASK~0x0f
#define PCI_SEC_STATUS0x1e/* Secondary status register */
#define PCI_MEMORY_BASE0x20/* Memory range behind */
#define PCI_MEMORY_LIMIT0x22
#define PCI_MEMORY_RANGE_TYPE_MASK0x0f
#define PCI_MEMORY_RANGE_MASK~0x0f
#define PCI_PREF_MEMORY_BASE0x24/* Prefetchable memory range behind */
#define PCI_PREF_MEMORY_LIMIT0x26
#define PCI_PREF_RANGE_TYPE_MASK0x0f
#define PCI_PREF_RANGE_TYPE_320x00
#define PCI_PREF_RANGE_TYPE_640x01
#define PCI_PREF_RANGE_MASK~0x0f
#define PCI_PREF_BASE_UPPER320x28/* Upper half of prefetchable memory range */
#define PCI_PREF_LIMIT_UPPER320x2c
#define PCI_IO_BASE_UPPER160x30/* Upper half of I/O addresses */
#define PCI_IO_LIMIT_UPPER160x32
#define PCI_PRIMARY_BUS0x18/* Primary bus number */
#define PCI_SECONDARY_BUS0x19/* Secondary bus number */
#define PCI_SUBORDINATE_BUS0x1a/* Highest bus number behind the bridge */
#define PCI_SEC_LATENCY_TIMER0x1b/* Latency timer for secondary interface */
#define PCI_IO_BASE0x1c/* I/O range behind the bridge */
#define PCI_IO_LIMIT0x1d
#define PCI_IO_RANGE_TYPE_MASK0x0f/* I/O bridging type */
#define PCI_IO_RANGE_TYPE_160x00
#define PCI_IO_RANGE_TYPE_320x01
#define PCI_IO_RANGE_MASK~0x0f
#define PCI_SEC_STATUS0x1e/* Secondary status register */
#define PCI_MEMORY_BASE0x20/* Memory range behind */
#define PCI_MEMORY_LIMIT0x22
#define PCI_MEMORY_RANGE_TYPE_MASK0x0f
#define PCI_MEMORY_RANGE_MASK~0x0f
#define PCI_PREF_MEMORY_BASE0x24/* Prefetchable memory range behind */
#define PCI_PREF_MEMORY_LIMIT0x26
#define PCI_PREF_RANGE_TYPE_MASK0x0f
#define PCI_PREF_RANGE_TYPE_320x00
#define PCI_PREF_RANGE_TYPE_640x01
#define PCI_PREF_RANGE_MASK~0x0f
#define PCI_PREF_BASE_UPPER320x28/* Upper half of prefetchable memory range */
#define PCI_PREF_LIMIT_UPPER320x2c
#define PCI_IO_BASE_UPPER160x30/* Upper half of I/O addresses */
#define PCI_IO_LIMIT_UPPER160x32
/* 0x34 same as for htype 0 */
/* 0x35-0x3b is reserved */
#define PCI_ROM_ADDRESS10x38/* Same as PCI_ROM_ADDRESS, but for htype 1 */
#define PCI_ROM_ADDRESS10x38/* Same as PCI_ROM_ADDRESS, but for htype 1 */
/* 0x3c-0x3d are same as for htype 0 */
#define PCI_BRIDGE_CONTROL0x3e
#define PCI_BRIDGE_CTL_PARITY0x01/* Enable parity detection on secondary interface */
#define PCI_BRIDGE_CTL_SERR0x02/* The same for SERR forwarding */
#define PCI_BRIDGE_CTL_NO_ISA0x04/* Disable bridging of ISA ports */
#define PCI_BRIDGE_CTL_VGA0x08/* Forward VGA addresses */
#define PCI_BRIDGE_CTL_MASTER_ABORT0x20/* Report master aborts */
#define PCI_BRIDGE_CTL_BUS_RESET0x40/* Secondary bus reset */
#define PCI_BRIDGE_CTL_FAST_BACK0x80/* Fast Back2Back enabled on secondary interface */
#define PCI_BRIDGE_CTL_PRI_DISCARD_TIMER 0x100/* PCI-X? */
#define PCI_BRIDGE_CTL_SEC_DISCARD_TIMER 0x200/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS 0x400/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN 0x800/* PCI-X? */
#define PCI_BRIDGE_CONTROL0x3e
#define PCI_BRIDGE_CTL_PARITY0x01/* Enable parity detection on secondary interface */
#define PCI_BRIDGE_CTL_SERR0x02/* The same for SERR forwarding */
#define PCI_BRIDGE_CTL_NO_ISA0x04/* Disable bridging of ISA ports */
#define PCI_BRIDGE_CTL_VGA0x08/* Forward VGA addresses */
#define PCI_BRIDGE_CTL_MASTER_ABORT0x20/* Report master aborts */
#define PCI_BRIDGE_CTL_BUS_RESET0x40/* Secondary bus reset */
#define PCI_BRIDGE_CTL_FAST_BACK0x80/* Fast Back2Back enabled on secondary interface */
#define PCI_BRIDGE_CTL_PRI_DISCARD_TIMER 0x100/* PCI-X? */
#define PCI_BRIDGE_CTL_SEC_DISCARD_TIMER 0x200/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS 0x400/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN 0x800/* PCI-X? */
/* Header type 2 (CardBus bridges) */
/* 0x14-0x15 reserved */
#define PCI_CB_SEC_STATUS0x16/* Secondary status */
#define PCI_CB_PRIMARY_BUS0x18/* PCI bus number */
#define PCI_CB_CARD_BUS0x19/* CardBus bus number */
#define PCI_CB_SUBORDINATE_BUS0x1a/* Subordinate bus number */
#define PCI_CB_LATENCY_TIMER0x1b/* CardBus latency timer */
#define PCI_CB_MEMORY_BASE_00x1c
#define PCI_CB_MEMORY_LIMIT_00x20
#define PCI_CB_MEMORY_BASE_10x24
#define PCI_CB_MEMORY_LIMIT_10x28
#define PCI_CB_IO_BASE_00x2c
#define PCI_CB_IO_BASE_0_HI0x2e
#define PCI_CB_IO_LIMIT_00x30
#define PCI_CB_IO_LIMIT_0_HI0x32
#define PCI_CB_IO_BASE_10x34
#define PCI_CB_IO_BASE_1_HI0x36
#define PCI_CB_IO_LIMIT_10x38
#define PCI_CB_IO_LIMIT_1_HI0x3a
#define PCI_CB_IO_RANGE_MASK~0x03
#define PCI_CB_SEC_STATUS0x16/* Secondary status */
#define PCI_CB_PRIMARY_BUS0x18/* PCI bus number */
#define PCI_CB_CARD_BUS0x19/* CardBus bus number */
#define PCI_CB_SUBORDINATE_BUS0x1a/* Subordinate bus number */
#define PCI_CB_LATENCY_TIMER0x1b/* CardBus latency timer */
#define PCI_CB_MEMORY_BASE_00x1c
#define PCI_CB_MEMORY_LIMIT_00x20
#define PCI_CB_MEMORY_BASE_10x24
#define PCI_CB_MEMORY_LIMIT_10x28
#define PCI_CB_IO_BASE_00x2c
#define PCI_CB_IO_BASE_0_HI0x2e
#define PCI_CB_IO_LIMIT_00x30
#define PCI_CB_IO_LIMIT_0_HI0x32
#define PCI_CB_IO_BASE_10x34
#define PCI_CB_IO_BASE_1_HI0x36
#define PCI_CB_IO_LIMIT_10x38
#define PCI_CB_IO_LIMIT_1_HI0x3a
#define PCI_CB_IO_RANGE_MASK~0x03
/* 0x3c-0x3d are same as for htype 0 */
#define PCI_CB_BRIDGE_CONTROL0x3e
#define PCI_CB_BRIDGE_CTL_PARITY0x01/* Similar to standard bridge control register */
#define PCI_CB_BRIDGE_CTL_SERR0x02
#define PCI_CB_BRIDGE_CTL_ISA0x04
#define PCI_CB_BRIDGE_CTL_VGA0x08
#define PCI_CB_BRIDGE_CTL_MASTER_ABORT0x20
#define PCI_CB_BRIDGE_CTL_CB_RESET0x40/* CardBus reset */
#define PCI_CB_BRIDGE_CTL_16BIT_INT0x80/* Enable interrupt for 16-bit cards */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100/* Prefetch enable for both memory regions */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
#define PCI_CB_BRIDGE_CTL_POST_WRITES0x400
#define PCI_CB_SUBSYSTEM_VENDOR_ID0x40
#define PCI_CB_SUBSYSTEM_ID0x42
#define PCI_CB_LEGACY_MODE_BASE0x44/* 16-bit PC Card legacy mode base address (ExCa) */
#define PCI_CB_BRIDGE_CONTROL0x3e
#define PCI_CB_BRIDGE_CTL_PARITY0x01/* Similar to standard bridge control register */
#define PCI_CB_BRIDGE_CTL_SERR0x02
#define PCI_CB_BRIDGE_CTL_ISA0x04
#define PCI_CB_BRIDGE_CTL_VGA0x08
#define PCI_CB_BRIDGE_CTL_MASTER_ABORT0x20
#define PCI_CB_BRIDGE_CTL_CB_RESET0x40/* CardBus reset */
#define PCI_CB_BRIDGE_CTL_16BIT_INT0x80/* Enable interrupt for 16-bit cards */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100/* Prefetch enable for both memory regions */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
#define PCI_CB_BRIDGE_CTL_POST_WRITES0x400
#define PCI_CB_SUBSYSTEM_VENDOR_ID0x40
#define PCI_CB_SUBSYSTEM_ID0x42
#define PCI_CB_LEGACY_MODE_BASE0x44/* 16-bit PC Card legacy mode base address (ExCa) */
/* 0x48-0x7f reserved */
/* Capability lists */
#define PCI_CAP_LIST_ID0/* Capability ID */
#define PCI_CAP_ID_PM0x01/* Power Management */
#define PCI_CAP_ID_AGP0x02/* Accelerated Graphics Port */
#define PCI_CAP_ID_VPD0x03/* Vital Product Data */
#define PCI_CAP_ID_SLOTID0x04/* Slot Identification */
#define PCI_CAP_ID_MSI0x05/* Message Signaled Interrupts */
#define PCI_CAP_ID_CHSWP0x06/* CompactPCI HotSwap */
#define PCI_CAP_ID_PCIX0x07/* PCI-X */
#define PCI_CAP_ID_HT0x08/* HyperTransport */
#define PCI_CAP_ID_VNDR0x09/* Vendor specific */
#define PCI_CAP_ID_DBG0x0A/* Debug port */
#define PCI_CAP_ID_CCRC0x0B/* CompactPCI Central Resource Control */
#define PCI_CAP_ID_HOTPLUG0x0C/* PCI hot-plug */
#define PCI_CAP_ID_SSVID0x0D/* Bridge subsystem vendor/device ID */
#define PCI_CAP_ID_AGP30x0E/* AGP 8x */
#define PCI_CAP_ID_SECURE0x0F/* Secure device (?) */
#define PCI_CAP_ID_EXP0x10/* PCI Express */
#define PCI_CAP_ID_MSIX0x11/* MSI-X */
#define PCI_CAP_ID_SATA0x12/* Serial-ATA HBA */
#define PCI_CAP_ID_AF0x13/* Advanced features of PCI devices integrated in PCIe root cplx */
#define PCI_CAP_LIST_NEXT1/* Next capability in the list */
#define PCI_CAP_FLAGS2/* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF4
#define PCI_CAP_LIST_ID0/* Capability ID */
#define PCI_CAP_ID_PM0x01/* Power Management */
#define PCI_CAP_ID_AGP0x02/* Accelerated Graphics Port */
#define PCI_CAP_ID_VPD0x03/* Vital Product Data */
#define PCI_CAP_ID_SLOTID0x04/* Slot Identification */
#define PCI_CAP_ID_MSI0x05/* Message Signaled Interrupts */
#define PCI_CAP_ID_CHSWP0x06/* CompactPCI HotSwap */
#define PCI_CAP_ID_PCIX0x07/* PCI-X */
#define PCI_CAP_ID_HT0x08/* HyperTransport */
#define PCI_CAP_ID_VNDR0x09/* Vendor specific */
#define PCI_CAP_ID_DBG0x0A/* Debug port */
#define PCI_CAP_ID_CCRC0x0B/* CompactPCI Central Resource Control */
#define PCI_CAP_ID_HOTPLUG0x0C/* PCI hot-plug */
#define PCI_CAP_ID_SSVID0x0D/* Bridge subsystem vendor/device ID */
#define PCI_CAP_ID_AGP30x0E/* AGP 8x */
#define PCI_CAP_ID_SECURE0x0F/* Secure device (?) */
#define PCI_CAP_ID_EXP0x10/* PCI Express */
#define PCI_CAP_ID_MSIX0x11/* MSI-X */
#define PCI_CAP_ID_SATA0x12/* Serial-ATA HBA */
#define PCI_CAP_ID_AF0x13/* Advanced features of PCI devices integrated in PCIe root cplx */
#define PCI_CAP_LIST_NEXT1/* Next capability in the list */
#define PCI_CAP_FLAGS2/* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF4
/* Capabilities residing in the PCI Express extended configuration space */
/* Capabilities residing in the
PCI Express extended configuration space */
#define PCI_EXT_CAP_ID_AER0x01/* Advanced Error Reporting */
#define PCI_EXT_CAP_ID_VC0x02/* Virtual Channel */
#define PCI_EXT_CAP_ID_DSN0x03/* Device Serial Number */
#define PCI_EXT_CAP_ID_PB0x04/* Power Budgeting */
#define PCI_EXT_CAP_ID_RCLINK0x05/* Root Complex Link Declaration */
#define PCI_EXT_CAP_ID_RCILINK0x06/* Root Complex Internal Link Declaration */
#define PCI_EXT_CAP_ID_RCECOLL0x07/* Root Complex Event Collector */
#define PCI_EXT_CAP_ID_MFVC0x08/* Multi-Function Virtual Channel */
#define PCI_EXT_CAP_ID_RBCB0x0a/* Root Bridge Control Block */
#define PCI_EXT_CAP_ID_VNDR0x0b/* Vendor specific */
#define PCI_EXT_CAP_ID_ACS0x0d/* Access Controls */
#define PCI_EXT_CAP_ID_ARI0x0e/* Alternative Routing-ID Interpretation */
#define PCI_EXT_CAP_ID_ATS0x0f/* Address Translation Service */
#define PCI_EXT_CAP_ID_SRIOV0x10/* Single Root I/O Virtualization */
#define PCI_EXT_CAP_ID_AER0x01/* Advanced Error Reporting */
#define PCI_EXT_CAP_ID_VC0x02/* Virtual Channel */
#define PCI_EXT_CAP_ID_DSN0x03/* Device Serial Number */
#define PCI_EXT_CAP_ID_PB0x04/* Power Budgeting */
#define PCI_EXT_CAP_ID_RCLINK0x05/* Root Complex Link Declaration */
#define PCI_EXT_CAP_ID_RCILINK0x06/* Root Complex Internal Link Declaration */
#define PCI_EXT_CAP_ID_RCECOLL0x07/* Root Complex Event Collector */
#define PCI_EXT_CAP_ID_MFVC0x08/* Multi-Function Virtual Channel */
#define PCI_EXT_CAP_ID_RBCB0x0a/* Root Bridge Control Block */
#define PCI_EXT_CAP_ID_VNDR0x0b/* Vendor specific */
#define PCI_EXT_CAP_ID_ACS0x0d/* Access Controls */
#define PCI_EXT_CAP_ID_ARI0x0e/* Alternative Routing-ID Interpretation */
#define PCI_EXT_CAP_ID_ATS0x0f/* Address Translation Service */
#define PCI_EXT_CAP_ID_SRIOV0x10/* Single Root I/O Virtualization */
/* Power Management Registers */
#define PCI_PM_CAP_VER_MASK0x0007/* Version (2=PM1.1) */
#define PCI_PM_CAP_PME_CLOCK0x0008/* Clock required for PME generation */
#define PCI_PM_CAP_DSI0x0020/* Device specific initialization required */
#define PCI_PM_CAP_AUX_C_MASK0x01c0/* Maximum aux current required in D3cold */
#define PCI_PM_CAP_D10x0200/* D1 power state support */
#define PCI_PM_CAP_D20x0400/* D2 power state support */
#define PCI_PM_CAP_PME_D00x0800/* PME can be asserted from D0 */
#define PCI_PM_CAP_PME_D10x1000/* PME can be asserted from D1 */
#define PCI_PM_CAP_PME_D20x2000/* PME can be asserted from D2 */
#define PCI_PM_CAP_PME_D3_HOT0x4000/* PME can be asserted from D3hot */
#define PCI_PM_CAP_PME_D3_COLD0x8000/* PME can be asserted from D3cold */
#define PCI_PM_CTRL4/* PM control and status register */
#define PCI_PM_CTRL_STATE_MASK0x0003/* Current power state (D0 to D3) */
#define PCI_PM_CTRL_PME_ENABLE0x0100/* PME pin enable */
#define PCI_PM_CTRL_DATA_SEL_MASK0x1e00/* PM table data index */
#define PCI_PM_CTRL_DATA_SCALE_MASK0x6000/* PM table data scaling factor */
#define PCI_PM_CTRL_PME_STATUS0x8000/* PME pin status */
#define PCI_PM_PPB_EXTENSIONS6/* PPB support extensions */
#define PCI_PM_PPB_B2_B30x40/* If bridge enters D3hot, bus enters: 0=B3, 1=B2 */
#define PCI_PM_BPCC_ENABLE0x80/* Secondary bus is power managed */
#define PCI_PM_DATA_REGISTER7/* PM table contents read here */
#define PCI_PM_SIZEOF8
#define PCI_PM_CAP_VER_MASK0x0007/* Version (2=PM1.1) */
#define PCI_PM_CAP_PME_CLOCK0x0008/* Clock required for PME generation */
#define PCI_PM_CAP_DSI0x0020/* Device specific initialization required */
#define PCI_PM_CAP_AUX_C_MASK0x01c0/* Maximum aux current required in D3cold */
#define PCI_PM_CAP_D10x0200/* D1 power state support */
#define PCI_PM_CAP_D20x0400/* D2 power state support */
#define PCI_PM_CAP_PME_D00x0800/* PME can be asserted from D0 */
#define PCI_PM_CAP_PME_D10x1000/* PME can be asserted from D1 */
#define PCI_PM_CAP_PME_D20x2000/* PME can be asserted from D2 */
#define PCI_PM_CAP_PME_D3_HOT0x4000/* PME can be asserted from D3hot */
#define PCI_PM_CAP_PME_D3_COLD0x8000/* PME can be asserted from D3cold */
#define PCI_PM_CTRL4/* PM control and status register */
#define PCI_PM_CTRL_STATE_MASK0x0003/* Current power state (D0 to D3) */
#define PCI_PM_CTRL_PME_ENABLE0x0100/* PME pin enable */
#define PCI_PM_CTRL_DATA_SEL_MASK0x1e00/* PM table data index */
#define PCI_PM_CTRL_DATA_SCALE_MASK0x6000/* PM table data scaling factor */
#define PCI_PM_CTRL_PME_STATUS0x8000/* PME pin status */
#define PCI_PM_PPB_EXTENSIONS6/* PPB support extensions */
#define PCI_PM_PPB_B2_B30x40/* If bridge enters D3hot, bus enters: 0=B3, 1=B2 */
#define PCI_PM_BPCC_ENABLE0x80/* Secondary bus is power managed */
#define PCI_PM_DATA_REGISTER7/* PM table contents read here */
#define PCI_PM_SIZEOF8
/* AGP registers */
#define PCI_AGP_VERSION2/* BCD version number */
#define PCI_AGP_RFU3/* Rest of capability flags */
#define PCI_AGP_STATUS4/* Status register */
#define PCI_AGP_STATUS_RQ_MASK0xff000000/* Maximum number of requests - 1 */
#define PCI_AGP_STATUS_ISOCH0x10000/* Isochronous transactions supported */
#define PCI_AGP_STATUS_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_STATUS_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_STATUS_SBA0x0200/* Sideband addressing supported */
#define PCI_AGP_STATUS_ITA_COH0x0100/* In-aperture accesses always coherent */
#define PCI_AGP_STATUS_GART640x0080/* 64-bit GART entries supported */
#define PCI_AGP_STATUS_HTRANS0x0040/* If 0, core logic can xlate host CPU accesses thru aperture */
#define PCI_AGP_STATUS_64BIT0x0020/* 64-bit addressing cycles supported */
#define PCI_AGP_STATUS_FW0x0010/* Fast write transfers supported */
#define PCI_AGP_STATUS_AGP30x0008/* AGP3 mode supported */
#define PCI_AGP_STATUS_RATE40x0004/* 4x transfer rate supported (RFU in AGP3 mode) */
#define PCI_AGP_STATUS_RATE20x0002/* 2x transfer rate supported (8x in AGP3 mode) */
#define PCI_AGP_STATUS_RATE10x0001/* 1x transfer rate supported (4x in AGP3 mode) */
#define PCI_AGP_COMMAND8/* Control register */
#define PCI_AGP_COMMAND_RQ_MASK0xff000000/* Master: Maximum number of requests */
#define PCI_AGP_COMMAND_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_COMMAND_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_COMMAND_SBA0x0200/* Sideband addressing enabled */
#define PCI_AGP_COMMAND_AGP0x0100/* Allow processing of AGP transactions */
#define PCI_AGP_COMMAND_GART640x0080/* 64-bit GART entries enabled */
#define PCI_AGP_COMMAND_64BIT0x0020/* Allow generation of 64-bit addr cycles */
#define PCI_AGP_COMMAND_FW0x0010/* Enable FW transfers */
#define PCI_AGP_COMMAND_RATE40x0004/* Use 4x rate (RFU in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE20x0002/* Use 2x rate (8x in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE10x0001/* Use 1x rate (4x in AGP3 mode) */
#define PCI_AGP_SIZEOF12
#define PCI_AGP_VERSION2/* BCD version number */
#define PCI_AGP_RFU3/* Rest of capability flags */
#define PCI_AGP_STATUS4/* Status register */
#define PCI_AGP_STATUS_RQ_MASK0xff000000/* Maximum number of requests - 1 */
#define PCI_AGP_STATUS_ISOCH0x10000/* Isochronous transactions supported */
#define PCI_AGP_STATUS_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_STATUS_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_STATUS_SBA0x0200/* Sideband addressing supported */
#define PCI_AGP_STATUS_ITA_COH0x0100/* In-aperture accesses always coherent */
#define PCI_AGP_STATUS_GART640x0080/* 64-bit GART entries supported */
#define PCI_AGP_STATUS_HTRANS0x0040/* If 0, core logic can xlate host CPU accesses thru aperture */
#define PCI_AGP_STATUS_64BIT0x0020/* 64-bit addressing cycles supported */
#define PCI_AGP_STATUS_FW0x0010/* Fast write transfers supported */
#define PCI_AGP_STATUS_AGP30x0008/* AGP3 mode supported */
#define PCI_AGP_STATUS_RATE40x0004/* 4x transfer rate supported (RFU in AGP3 mode) */
#define PCI_AGP_STATUS_RATE20x0002/* 2x transfer rate supported (8x in AGP3 mode) */
#define PCI_AGP_STATUS_RATE10x0001/* 1x transfer rate supported (4x in AGP3 mode) */
#define PCI_AGP_COMMAND8/* Control register */
#define PCI_AGP_COMMAND_RQ_MASK0xff000000 /* Master: Maximum number of requests */
#define PCI_AGP_COMMAND_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_COMMAND_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_COMMAND_SBA0x0200/* Sideband addressing enabled */
#define PCI_AGP_COMMAND_AGP0x0100/* Allow processing of AGP transactions */
#define PCI_AGP_COMMAND_GART640x0080/* 64-bit GART entries enabled */
#define PCI_AGP_COMMAND_64BIT0x0020/* Allow generation of 64-bit addr cycles */
#define PCI_AGP_COMMAND_FW0x0010/* Enable FW transfers */
#define PCI_AGP_COMMAND_RATE40x0004/* Use 4x rate (RFU in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE20x0002/* Use 2x rate (8x in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE10x0001/* Use 1x rate (4x in AGP3 mode) */
#define PCI_AGP_SIZEOF12
/* Vital Product Data */
#define PCI_VPD_ADDR2/* Address to access (15 bits!) */
#define PCI_VPD_ADDR_MASK0x7fff/* Address mask */
#define PCI_VPD_ADDR_F0x8000/* Write 0, 1 indicates completion */
#define PCI_VPD_DATA4/* 32-bits of data returned here */
#define PCI_VPD_ADDR2/* Address to access (15 bits!) */
#define PCI_VPD_ADDR_MASK0x7fff/* Address mask */
#define PCI_VPD_ADDR_F0x8000/* Write 0, 1 indicates completion */
#define PCI_VPD_DATA4/* 32-bits of data returned here */
/* Slot Identification */
#define PCI_SID_ESR2/* Expansion Slot Register */
#define PCI_SID_ESR_NSLOTS0x1f/* Number of expansion slots available */
#define PCI_SID_ESR_FIC0x20/* First In Chassis Flag */
#define PCI_SID_CHASSIS_NR3/* Chassis Number */
#define PCI_SID_ESR2/* Expansion Slot Register */
#define PCI_SID_ESR_NSLOTS0x1f/* Number of expansion slots available */
#define PCI_SID_ESR_FIC0x20/* First In Chassis Flag */
#define PCI_SID_CHASSIS_NR3/* Chassis Number */
/* Message Signaled Interrupts registers */
#define PCI_MSI_FLAGS2/* Various flags */
#define PCI_MSI_FLAGS_MASK_BIT0x100/* interrupt masking & reporting supported */
#define PCI_MSI_FLAGS_64BIT0x080/* 64-bit addresses allowed */
#define PCI_MSI_FLAGS_QSIZE0x070/* Message queue size configured */
#define PCI_MSI_FLAGS_QMASK0x00e/* Maximum queue size available */
#define PCI_MSI_FLAGS_ENABLE0x001/* MSI feature enabled */
#define PCI_MSI_RFU3/* Rest of capability flags */
#define PCI_MSI_ADDRESS_LO4/* Lower 32 bits */
#define PCI_MSI_ADDRESS_HI8/* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
#define PCI_MSI_DATA_328/* 16 bits of data for 32-bit devices */
#define PCI_MSI_DATA_6412/* 16 bits of data for 64-bit devices */
#define PCI_MSI_MASK_BIT_3212/* per-vector masking for 32-bit devices */
#define PCI_MSI_MASK_BIT_6416/* per-vector masking for 64-bit devices */
#define PCI_MSI_PENDING_3216/* per-vector interrupt pending for 32-bit devices */
#define PCI_MSI_PENDING_6420/* per-vector interrupt pending for 64-bit devices */
#define PCI_MSI_FLAGS2/* Various flags */
#define PCI_MSI_FLAGS_MASK_BIT0x100/* interrupt masking & reporting supported */
#define PCI_MSI_FLAGS_64BIT0x080/* 64-bit addresses allowed */
#define PCI_MSI_FLAGS_QSIZE0x070/* Message queue size configured */
#define PCI_MSI_FLAGS_QMASK0x00e/* Maximum queue size available */
#define PCI_MSI_FLAGS_ENABLE0x001/* MSI feature enabled */
#define PCI_MSI_RFU3/* Rest of capability flags */
#define PCI_MSI_ADDRESS_LO4/* Lower 32 bits */
#define PCI_MSI_ADDRESS_HI8/* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
#define PCI_MSI_DATA_328/* 16 bits of data for 32-bit devices */
#define PCI_MSI_DATA_6412/* 16 bits of data for 64-bit devices */
#define PCI_MSI_MASK_BIT_3212/* per-vector masking for 32-bit devices */
#define PCI_MSI_MASK_BIT_6416/* per-vector masking for 64-bit devices */
#define PCI_MSI_PENDING_3216/* per-vector interrupt pending for 32-bit devices */
#define PCI_MSI_PENDING_6420/* per-vector interrupt pending for 64-bit devices */
/* PCI-X */
#define PCI_PCIX_COMMAND 2 /* Command register offset */
#define PCI_PCIX_COMMAND_DPERE 0x0001 /* Data Parity Error Recover Enable */
#define PCI_PCIX_COMMAND_ERO 0x0002 /* Enable Relaxed Ordering */
#define PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT 0x000c /* Maximum Memory Read Byte Count */
#define PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS 0x0070
#define PCI_PCIX_COMMAND_RESERVED 0xf80
#define PCI_PCIX_STATUS 4 /* Status register offset */
#define PCI_PCIX_STATUS_FUNCTION 0x00000007
#define PCI_PCIX_STATUS_DEVICE 0x000000f8
#define PCI_PCIX_STATUS_BUS 0x0000ff00
#define PCI_PCIX_STATUS_64BIT 0x00010000
#define PCI_PCIX_STATUS_133MHZ 0x00020000
#define PCI_PCIX_STATUS_SC_DISCARDED 0x00040000 /* Split Completion Discarded */
#define PCI_PCIX_STATUS_UNEXPECTED_SC 0x00080000 /* Unexpected Split Completion */
#define PCI_PCIX_STATUS_DEVICE_COMPLEXITY 0x00100000 /* 0 = simple device, 1 = bridge device */
#define PCI_PCIX_STATUS_DESIGNED_MAX_MEM_READ_BYTE_COUNT 0x00600000 /* 0 = 512 bytes, 1 = 1024, 2 = 2048, 3 = 4096 */
#define PCI_PCIX_COMMAND2 /* Command register offset */
#define PCI_PCIX_COMMAND_DPERE 0x0001 /* Data Parity Error Recover Enable */
#define PCI_PCIX_COMMAND_ERO 0x0002 /* Enable Relaxed Ordering */
#define PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT 0x000c /* Maximum Memory Read Byte Count */
#define PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS 0x0070
#define PCI_PCIX_COMMAND_RESERVED0xf80
#define PCI_PCIX_STATUS4 /* Status register offset */
#define PCI_PCIX_STATUS_FUNCTION 0x00000007
#define PCI_PCIX_STATUS_DEVICE 0x000000f8
#define PCI_PCIX_STATUS_BUS 0x0000ff00
#define PCI_PCIX_STATUS_64BIT 0x00010000
#define PCI_PCIX_STATUS_133MHZ 0x00020000
#define PCI_PCIX_STATUS_SC_DISCARDED 0x00040000 /* Split Completion Discarded */
#define PCI_PCIX_STATUS_UNEXPECTED_SC 0x00080000 /* Unexpected Split Completion */
#define PCI_PCIX_STATUS_DEVICE_COMPLEXITY 0x00100000 /* 0 = simple device, 1 = bridge device */
#define PCI_PCIX_STATUS_DESIGNED_MAX_MEM_READ_BYTE_COUNT 0x00600000 /* 0 = 512 bytes, 1 = 1024, 2 = 2048, 3 = 4096 */
#define PCI_PCIX_STATUS_DESIGNED_MAX_OUTSTANDING_SPLIT_TRANS 0x03800000
#define PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE 0x1c000000
#define PCI_PCIX_STATUS_RCVD_SC_ERR_MESS 0x20000000 /* Received Split Completion Error Message */
#define PCI_PCIX_STATUS_266MHZ0x40000000 /* 266 MHz capable */
#define PCI_PCIX_STATUS_533MHZ 0x80000000 /* 533 MHz capable */
#define PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE 0x1c000000
#define PCI_PCIX_STATUS_RCVD_SC_ERR_MESS 0x20000000 /* Received Split Completion Error Message */
#define PCI_PCIX_STATUS_266MHZ 0x40000000 /* 266 MHz capable */
#define PCI_PCIX_STATUS_533MHZ 0x80000000 /* 533 MHz capable */
#define PCI_PCIX_SIZEOF4
/* PCI-X Bridges */
#define PCI_PCIX_BRIDGE_SEC_STATUS 2 /* Secondary bus status register offset */
#define PCI_PCIX_BRIDGE_SEC_STATUS_64BIT 0x0001
#define PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ 0x0002
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED 0x0004 /* Split Completion Discarded on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC 0x0008 /* Unexpected Split Completion on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN 0x0010 /* Split Completion Overrun on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED 0x0020
#define PCI_PCIX_BRIDGE_SEC_STATUS_CLOCK_FREQ 0x01c0
#define PCI_PCIX_BRIDGE_SEC_STATUS_RESERVED 0xfe00
#define PCI_PCIX_BRIDGE_STATUS 4 /* Primary bus status register offset */
#define PCI_PCIX_BRIDGE_STATUS_FUNCTION 0x00000007
#define PCI_PCIX_BRIDGE_STATUS_DEVICE 0x000000f8
#define PCI_PCIX_BRIDGE_STATUS_BUS 0x0000ff00
#define PCI_PCIX_BRIDGE_STATUS_64BIT 0x00010000
#define PCI_PCIX_BRIDGE_STATUS_133MHZ 0x00020000
#define PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED 0x00040000 /* Split Completion Discarded */
#define PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC 0x00080000 /* Unexpected Split Completion */
#define PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN 0x00100000 /* Split Completion Overrun */
#define PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED 0x00200000
#define PCI_PCIX_BRIDGE_STATUS_RESERVED 0xffc00000
#define PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL 8 /* Upstream Split Transaction Register offset */
#define PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL 12 /* Downstream Split Transaction Register offset */
#define PCI_PCIX_BRIDGE_STR_CAPACITY 0x0000ffff
#define PCI_PCIX_BRIDGE_STR_COMMITMENT_LIMIT 0xffff0000
#define PCI_PCIX_BRIDGE_SEC_STATUS2 /* Secondary bus status register offset */
#define PCI_PCIX_BRIDGE_SEC_STATUS_64BIT 0x0001
#define PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ 0x0002
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED 0x0004 /* Split Completion Discarded on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC 0x0008 /* Unexpected Split Completion on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN 0x0010 /* Split Completion Overrun on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED 0x0020
#define PCI_PCIX_BRIDGE_SEC_STATUS_CLOCK_FREQ 0x01c0
#define PCI_PCIX_BRIDGE_SEC_STATUS_RESERVED 0xfe00
#define PCI_PCIX_BRIDGE_STATUS4 /* Primary bus status register offset */
#define PCI_PCIX_BRIDGE_STATUS_FUNCTION 0x00000007
#define PCI_PCIX_BRIDGE_STATUS_DEVICE 0x000000f8
#define PCI_PCIX_BRIDGE_STATUS_BUS 0x0000ff00
#define PCI_PCIX_BRIDGE_STATUS_64BIT 0x00010000
#define PCI_PCIX_BRIDGE_STATUS_133MHZ 0x00020000
#define PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED 0x00040000 /* Split Completion Discarded */
#define PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC 0x00080000 /* Unexpected Split Completion */
#define PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN 0x00100000 /* Split Completion Overrun */
#define PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED 0x00200000
#define PCI_PCIX_BRIDGE_STATUS_RESERVED 0xffc00000
#define PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL8 /* Upstream Split Transaction Register offset */
#define PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL 12 /* Downstream Split Transaction Register offset */
#define PCI_PCIX_BRIDGE_STR_CAPACITY 0x0000ffff
#define PCI_PCIX_BRIDGE_STR_COMMITMENT_LIMIT 0xffff0000
#define PCI_PCIX_BRIDGE_SIZEOF 12
/* PCI Express */
#define PCI_EXP_FLAGS0x2/* Capabilities register */
#define PCI_EXP_FLAGS_VERS0x000f/* Capability version */
#define PCI_EXP_FLAGS_TYPE0x00f0/* Device/Port type */
#define PCI_EXP_TYPE_ENDPOINT0x0/* Express Endpoint */
#define PCI_EXP_TYPE_LEG_END0x1/* Legacy Endpoint */
#define PCI_EXP_TYPE_ROOT_PORT 0x4/* Root Port */
#define PCI_EXP_TYPE_UPSTREAM0x5/* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM 0x6/* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE 0x7/* PCI/PCI-X Bridge */
#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8/* PCI/PCI-X to PCIE Bridge */
#define PCI_EXP_TYPE_ROOT_INT_EP 0x9/* Root Complex Integrated Endpoint */
#define PCI_EXP_TYPE_ROOT_EC 0xa/* Root Complex Event Collector */
#define PCI_EXP_FLAGS_SLOT0x0100/* Slot implemented */
#define PCI_EXP_FLAGS_IRQ0x3e00/* Interrupt message number */
#define PCI_EXP_DEVCAP0x4/* Device capabilities */
#define PCI_EXP_DEVCAP_PAYLOAD0x07/* Max_Payload_Size */
#define PCI_EXP_DEVCAP_PHANTOM0x18/* Phantom functions */
#define PCI_EXP_DEVCAP_EXT_TAG0x20/* Extended tags */
#define PCI_EXP_DEVCAP_L0S0x1c0/* L0s Acceptable Latency */
#define PCI_EXP_DEVCAP_L10xe00/* L1 Acceptable Latency */
#define PCI_EXP_DEVCAP_ATN_BUT0x1000/* Attention Button Present */
#define PCI_EXP_DEVCAP_ATN_IND0x2000/* Attention Indicator Present */
#define PCI_EXP_DEVCAP_PWR_IND0x4000/* Power Indicator Present */
#define PCI_EXP_DEVCAP_RBE0x8000/* Role-Based Error Reporting */
#define PCI_EXP_DEVCAP_PWR_VAL0x3fc0000 /* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL0xc000000 /* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLRESET0x10000000 /* Function-Level Reset */
#define PCI_EXP_DEVCTL0x8/* Device Control */
#define PCI_EXP_DEVCTL_CERE0x0001/* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE0x0002/* Non-Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_FERE0x0004/* Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_URRE0x0008/* Unsupported Request Reporting En. */
#define PCI_EXP_DEVCTL_RELAXED0x0010/* Enable Relaxed Ordering */
#define PCI_EXP_DEVCTL_PAYLOAD0x00e0/* Max_Payload_Size */
#define PCI_EXP_DEVCTL_EXT_TAG0x0100/* Extended Tag Field Enable */
#define PCI_EXP_DEVCTL_PHANTOM0x0200/* Phantom Functions Enable */
#define PCI_EXP_DEVCTL_AUX_PME0x0400/* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP0x0800/* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ0x7000/* Max_Read_Request_Size */
#define PCI_EXP_DEVCTL_BCRE0x8000/* Bridge Configuration Retry Enable */
#define PCI_EXP_DEVCTL_FLRESET0x8000/* Function-Level Reset [bit shared with BCRE] */
#define PCI_EXP_DEVSTA0xa/* Device Status */
#define PCI_EXP_DEVSTA_CED0x01/* Correctable Error Detected */
#define PCI_EXP_DEVSTA_NFED0x02/* Non-Fatal Error Detected */
#define PCI_EXP_DEVSTA_FED0x04/* Fatal Error Detected */
#define PCI_EXP_DEVSTA_URD0x08/* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD0x10/* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND0x20/* Transactions Pending */
#define PCI_EXP_LNKCAP0xc/* Link Capabilities */
#define PCI_EXP_LNKCAP_SPEED0x0000f/* Maximum Link Speed */
#define PCI_EXP_LNKCAP_WIDTH0x003f0/* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPM0x00c00/* Active State Power Management */
#define PCI_EXP_LNKCAP_L0S0x07000/* L0s Acceptable Latency */
#define PCI_EXP_LNKCAP_L10x38000/* L1 Acceptable Latency */
#define PCI_EXP_LNKCAP_CLOCKPM0x40000/* Clock Power Management */
#define PCI_EXP_LNKCAP_SURPRISE 0x80000 /* Surprise Down Error Reporting */
#define PCI_EXP_LNKCAP_DLLA0x100000 /* Data Link Layer Active Reporting */
#define PCI_EXP_LNKCAP_LBNC0x200000 /* Link Bandwidth Notification Capability */
#define PCI_EXP_LNKCAP_PORT0xff000000 /* Port Number */
#define PCI_EXP_LNKCTL0x10/* Link Control */
#define PCI_EXP_LNKCTL_ASPM0x0003/* ASPM Control */
#define PCI_EXP_LNKCTL_RCB0x0008/* Read Completion Boundary */
#define PCI_EXP_LNKCTL_DISABLE0x0010/* Link Disable */
#define PCI_EXP_LNKCTL_RETRAIN0x0020/* Retrain Link */
#define PCI_EXP_LNKCTL_CLOCK0x0040/* Common Clock Configuration */
#define PCI_EXP_LNKCTL_XSYNCH0x0080/* Extended Synch */
#define PCI_EXP_LNKCTL_CLOCKPM0x0100/* Clock Power Management */
#define PCI_EXP_LNKCTL_HWAUTWD0x0200/* Hardware Autonomous Width Disable */
#define PCI_EXP_LNKCTL_BWMIE0x0400/* Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKCTL_AUTBWIE0x0800/* Autonomous Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKSTA0x12/* Link Status */
#define PCI_EXP_LNKSTA_SPEED0x000f/* Negotiated Link Speed */
#define PCI_EXP_LNKSTA_WIDTH0x03f0/* Negotiated Link Width */
#define PCI_EXP_LNKSTA_TR_ERR0x0400/* Training Error (obsolete) */
#define PCI_EXP_LNKSTA_TRAIN0x0800/* Link Training */
#define PCI_EXP_LNKSTA_SL_CLK0x1000/* Slot Clock Configuration */
#define PCI_EXP_LNKSTA_DL_ACT0x2000/* Data Link Layer in DL_Active State */
#define PCI_EXP_LNKSTA_BWMGMT0x4000/* Bandwidth Mgmt Status */
#define PCI_EXP_LNKSTA_AUTBW0x8000/* Autonomous Bandwidth Mgmt Status */
#define PCI_EXP_SLTCAP0x14/* Slot Capabilities */
#define PCI_EXP_SLTCAP_ATNB0x0001/* Attention Button Present */
#define PCI_EXP_SLTCAP_PWRC0x0002/* Power Controller Present */
#define PCI_EXP_SLTCAP_MRL0x0004/* MRL Sensor Present */
#define PCI_EXP_SLTCAP_ATNI0x0008/* Attention Indicator Present */
#define PCI_EXP_SLTCAP_PWRI0x0010/* Power Indicator Present */
#define PCI_EXP_SLTCAP_HPS0x0020/* Hot-Plug Surprise */
#define PCI_EXP_SLTCAP_HPC0x0040/* Hot-Plug Capable */
#define PCI_EXP_SLTCAP_PWR_VAL0x00007f80 /* Slot Power Limit Value */
#define PCI_EXP_SLTCAP_PWR_SCL0x00018000 /* Slot Power Limit Scale */
#define PCI_EXP_SLTCAP_INTERLOCK 0x020000 /* Electromechanical Interlock Present */
#define PCI_EXP_SLTCAP_NOCMDCOMP 0x040000 /* No Command Completed Support */
#define PCI_EXP_SLTCAP_PSN0xfff80000 /* Physical Slot Number */
#define PCI_EXP_SLTCTL0x18/* Slot Control */
#define PCI_EXP_SLTCTL_ATNB0x0001/* Attention Button Pressed Enable */
#define PCI_EXP_SLTCTL_PWRF0x0002/* Power Fault Detected Enable */
#define PCI_EXP_SLTCTL_MRLS0x0004/* MRL Sensor Changed Enable */
#define PCI_EXP_SLTCTL_PRSD0x0008/* Presence Detect Changed Enable */
#define PCI_EXP_SLTCTL_CMDC0x0010/* Command Completed Interrupt Enable */
#define PCI_EXP_SLTCTL_HPIE0x0020/* Hot-Plug Interrupt Enable */
#define PCI_EXP_SLTCTL_ATNI0x00c0/* Attention Indicator Control */
#define PCI_EXP_SLTCTL_PWRI0x0300/* Power Indicator Control */
#define PCI_EXP_SLTCTL_PWRC0x0400/* Power Controller Control */
#define PCI_EXP_SLTCTL_INTERLOCK 0x0800 /* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_LLCHG0x1000/* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTSTA0x1a/* Slot Status */
#define PCI_EXP_SLTSTA_ATNB0x0001/* Attention Button Pressed */
#define PCI_EXP_SLTSTA_PWRF0x0002/* Power Fault Detected */
#define PCI_EXP_SLTSTA_MRLS0x0004/* MRL Sensor Changed */
#define PCI_EXP_SLTSTA_PRSD0x0008/* Presence Detect Changed */
#define PCI_EXP_SLTSTA_CMDC0x0010/* Command Completed */
#define PCI_EXP_SLTSTA_MRL_ST0x0020/* MRL Sensor State */
#define PCI_EXP_SLTSTA_PRES0x0040/* Presence Detect State */
#define PCI_EXP_SLTSTA_INTERLOCK 0x0080 /* Electromechanical Interlock Status */
#define PCI_EXP_SLTSTA_LLCHG0x0100/* Data Link Layer State Changed */
#define PCI_EXP_RTCTL0x1c/* Root Control */
#define PCI_EXP_RTCTL_SECEE0x0001/* System Error on Correctable Error */
#define PCI_EXP_RTCTL_SENFEE0x0002/* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE0x0004/* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE0x0008/* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTCAP0x1e/* Root Capabilities */
#define PCI_EXP_RTCAP_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTSTA0x20/* Root Status */
#define PCI_EXP_RTSTA_PME_REQID 0x0000ffff /* PME Requester ID */
#define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */
#define PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */
#define PCI_EXP_DEVCAP20x24/* Device capabilities 2 */
#define PCI_EXP_DEVCTL20x28/* Device Control */
#define PCI_EXP_DEV2_TIMEOUT_RANGE(x)((x) & 0xf) /* Completion Timeout Ranges Supported */
#define PCI_EXP_DEV2_TIMEOUT_VALUE(x)((x) & 0xf) /* Completion Timeout Value */
#define PCI_EXP_DEV2_TIMEOUT_DIS0x0010/* Completion Timeout Disable Supported */
#define PCI_EXP_DEV2_ARI0x0020/* ARI Forwarding */
#define PCI_EXP_DEVSTA20x2a/* Device Status */
#define PCI_EXP_LNKCAP20x2c/* Link Capabilities */
#define PCI_EXP_LNKCTL20x30/* Link Control */
#define PCI_EXP_LNKCTL2_SPEED(x)((x) & 0xf) /* Target Link Speed */
#define PCI_EXP_LNKCTL2_CMPLNC0x0010/* Enter Compliance */
#define PCI_EXP_LNKCTL2_SPEED_DIS0x0020/* Hardware Autonomous Speed Disable */
#define PCI_EXP_LNKCTL2_DEEMPHASIS(x)(((x) >> 6) & 1) /* Selectable De-emphasis */
#define PCI_EXP_LNKCTL2_MARGIN(x)(((x) >> 7) & 7) /* Transmit Margin */
#define PCI_EXP_LNKCTL2_MOD_CMPLNC0x0400/* Enter Modified Compliance */
#define PCI_EXP_LNKCTL2_CMPLNC_SOS0x0800/* Compliance SOS */
#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 1) /* Compliance De-emphasis */
#define PCI_EXP_LNKSTA20x32/* Link Status */
#define PCI_EXP_LINKSTA2_DEEMPHASIS(x)((x) & 1)/* Current De-emphasis Level */
#define PCI_EXP_SLTCAP20x34/* Slot Capabilities */
#define PCI_EXP_SLTCTL20x38/* Slot Control */
#define PCI_EXP_SLTSTA20x3a/* Slot Status */
#define PCI_EXP_FLAGS0x2/* Capabilities register */
#define PCI_EXP_FLAGS_VERS0x000f/* Capability version */
#define PCI_EXP_FLAGS_TYPE0x00f0/* Device/Port type */
#define PCI_EXP_TYPE_ENDPOINT0x0 /* Express Endpoint */
#define PCI_EXP_TYPE_LEG_END0x1 /* Legacy Endpoint */
#define PCI_EXP_TYPE_ROOT_PORT0x4 /* Root Port */
#define PCI_EXP_TYPE_UPSTREAM0x5 /* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM0x6 /* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE0x7 /* PCI/PCI-X Bridge */
#define PCI_EXP_TYPE_PCIE_BRIDGE0x8 /* PCI/PCI-X to PCIE Bridge */
#define PCI_EXP_TYPE_ROOT_INT_EP0x9 /* Root Complex Integrated Endpoint */
#define PCI_EXP_TYPE_ROOT_EC0xa /* Root Complex Event Collector */
#define PCI_EXP_FLAGS_SLOT0x0100/* Slot implemented */
#define PCI_EXP_FLAGS_IRQ0x3e00/* Interrupt message number */
#define PCI_EXP_DEVCAP0x4 /* Device capabilities */
#define PCI_EXP_DEVCAP_PAYLOAD0x07/* Max_Payload_Size */
#define PCI_EXP_DEVCAP_PHANTOM0x18/* Phantom functions */
#define PCI_EXP_DEVCAP_EXT_TAG0x20/* Extended tags */
#define PCI_EXP_DEVCAP_L0S0x1c0/* L0s Acceptable Latency */
#define PCI_EXP_DEVCAP_L10xe00/* L1 Acceptable Latency */
#define PCI_EXP_DEVCAP_ATN_BUT0x1000/* Attention Button Present */
#define PCI_EXP_DEVCAP_ATN_IND0x2000/* Attention Indicator Present */
#define PCI_EXP_DEVCAP_PWR_IND0x4000/* Power Indicator Present */
#define PCI_EXP_DEVCAP_RBE0x8000/* Role-Based Error Reporting */
#define PCI_EXP_DEVCAP_PWR_VAL0x3fc0000/* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL0xc000000/* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLRESET0x10000000/* Function-Level Reset */
#define PCI_EXP_DEVCTL0x8/* Device Control */
#define PCI_EXP_DEVCTL_CERE0x0001/* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE0x0002/* Non-Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_FERE0x0004/* Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_URRE0x0008/* Unsupported Request Reporting En. */
#define PCI_EXP_DEVCTL_RELAXED0x0010/* Enable Relaxed Ordering */
#define PCI_EXP_DEVCTL_PAYLOAD0x00e0/* Max_Payload_Size */
#define PCI_EXP_DEVCTL_EXT_TAG0x0100/* Extended Tag Field Enable */
#define PCI_EXP_DEVCTL_PHANTOM0x0200/* Phantom Functions Enable */
#define PCI_EXP_DEVCTL_AUX_PME0x0400/* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP0x0800/* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ0x7000/* Max_Read_Request_Size */
#define PCI_EXP_DEVCTL_BCRE0x8000/* Bridge Configuration Retry Enable */
#define PCI_EXP_DEVCTL_FLRESET0x8000/* Function-Level Reset [bit shared with BCRE] */
#define PCI_EXP_DEVSTA0xa /* Device Status */
#define PCI_EXP_DEVSTA_CED0x01/* Correctable Error Detected */
#define PCI_EXP_DEVSTA_NFED0x02/* Non-Fatal Error Detected */
#define PCI_EXP_DEVSTA_FED0x04/* Fatal Error Detected */
#define PCI_EXP_DEVSTA_URD0x08/* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD0x10/* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND0x20/* Transactions Pending */
#define PCI_EXP_LNKCAP0xc/* Link Capabilities */
#define PCI_EXP_LNKCAP_SPEED0x0000f /* Maximum Link Speed */
#define PCI_EXP_LNKCAP_WIDTH0x003f0 /* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPM0x00c00 /* Active State Power Management */
#define PCI_EXP_LNKCAP_L0S0x07000 /* L0s Acceptable Latency */
#define PCI_EXP_LNKCAP_L10x38000 /* L1 Acceptable Latency */
#define PCI_EXP_LNKCAP_CLOCKPM0x40000 /* Clock Power Management */
#define PCI_EXP_LNKCAP_SURPRISE0x80000 /* Surprise Down Error Reporting */
#define PCI_EXP_LNKCAP_DLLA0x100000/* Data Link Layer Active Reporting */
#define PCI_EXP_LNKCAP_LBNC0x200000/* Link Bandwidth Notification Capability */
#define PCI_EXP_LNKCAP_PORT0xff000000/* Port Number */
#define PCI_EXP_LNKCTL0x10/* Link Control */
#define PCI_EXP_LNKCTL_ASPM0x0003/* ASPM Control */
#define PCI_EXP_LNKCTL_RCB0x0008/* Read Completion Boundary */
#define PCI_EXP_LNKCTL_DISABLE0x0010/* Link Disable */
#define PCI_EXP_LNKCTL_RETRAIN0x0020/* Retrain Link */
#define PCI_EXP_LNKCTL_CLOCK0x0040/* Common Clock Configuration */
#define PCI_EXP_LNKCTL_XSYNCH0x0080/* Extended Synch */
#define PCI_EXP_LNKCTL_CLOCKPM0x0100/* Clock Power Management */
#define PCI_EXP_LNKCTL_HWAUTWD0x0200/* Hardware Autonomous Width Disable */
#define PCI_EXP_LNKCTL_BWMIE0x0400/* Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKCTL_AUTBWIE0x0800/* Autonomous Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKSTA0x12/* Link Status */
#define PCI_EXP_LNKSTA_SPEED0x000f/* Negotiated Link Speed */
#define PCI_EXP_LNKSTA_WIDTH0x03f0/* Negotiated Link Width */
#define PCI_EXP_LNKSTA_TR_ERR0x0400/* Training Error (obsolete) */
#define PCI_EXP_LNKSTA_TRAIN0x0800/* Link Training */
#define PCI_EXP_LNKSTA_SL_CLK0x1000/* Slot Clock Configuration */
#define PCI_EXP_LNKSTA_DL_ACT0x2000/* Data Link Layer in DL_Active State */
#define PCI_EXP_LNKSTA_BWMGMT0x4000/* Bandwidth Mgmt Status */
#define PCI_EXP_LNKSTA_AUTBW0x8000/* Autonomous Bandwidth Mgmt Status */
#define PCI_EXP_SLTCAP0x14/* Slot Capabilities */
#define PCI_EXP_SLTCAP_ATNB0x0001/* Attention Button Present */
#define PCI_EXP_SLTCAP_PWRC0x0002/* Power Controller Present */
#define PCI_EXP_SLTCAP_MRL0x0004/* MRL Sensor Present */
#define PCI_EXP_SLTCAP_ATNI0x0008/* Attention Indicator Present */
#define PCI_EXP_SLTCAP_PWRI0x0010/* Power Indicator Present */
#define PCI_EXP_SLTCAP_HPS0x0020/* Hot-Plug Surprise */
#define PCI_EXP_SLTCAP_HPC0x0040/* Hot-Plug Capable */
#define PCI_EXP_SLTCAP_PWR_VAL0x00007f80/* Slot Power Limit Value */
#define PCI_EXP_SLTCAP_PWR_SCL0x00018000/* Slot Power Limit Scale */
#define PCI_EXP_SLTCAP_INTERLOCK0x020000/* Electromechanical Interlock Present */
#define PCI_EXP_SLTCAP_NOCMDCOMP0x040000/* No Command Completed Support */
#define PCI_EXP_SLTCAP_PSN0xfff80000/* Physical Slot Number */
#define PCI_EXP_SLTCTL0x18/* Slot Control */
#define PCI_EXP_SLTCTL_ATNB0x0001/* Attention Button Pressed Enable */
#define PCI_EXP_SLTCTL_PWRF0x0002/* Power Fault Detected Enable */
#define PCI_EXP_SLTCTL_MRLS0x0004/* MRL Sensor Changed Enable */
#define PCI_EXP_SLTCTL_PRSD0x0008/* Presence Detect Changed Enable */
#define PCI_EXP_SLTCTL_CMDC0x0010/* Command Completed Interrupt Enable */
#define PCI_EXP_SLTCTL_HPIE0x0020/* Hot-Plug Interrupt Enable */
#define PCI_EXP_SLTCTL_ATNI0x00c0/* Attention Indicator Control */
#define PCI_EXP_SLTCTL_PWRI0x0300/* Power Indicator Control */
#define PCI_EXP_SLTCTL_PWRC0x0400/* Power Controller Control */
#define PCI_EXP_SLTCTL_INTERLOCK0x0800/* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_LLCHG0x1000/* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTSTA0x1a/* Slot Status */
#define PCI_EXP_SLTSTA_ATNB0x0001/* Attention Button Pressed */
#define PCI_EXP_SLTSTA_PWRF0x0002/* Power Fault Detected */
#define PCI_EXP_SLTSTA_MRLS0x0004/* MRL Sensor Changed */
#define PCI_EXP_SLTSTA_PRSD0x0008/* Presence Detect Changed */
#define PCI_EXP_SLTSTA_CMDC0x0010/* Command Completed */
#define PCI_EXP_SLTSTA_MRL_ST0x0020/* MRL Sensor State */
#define PCI_EXP_SLTSTA_PRES0x0040/* Presence Detect State */
#define PCI_EXP_SLTSTA_INTERLOCK0x0080/* Electromechanical Interlock Status */
#define PCI_EXP_SLTSTA_LLCHG0x0100/* Data Link Layer State Changed */
#define PCI_EXP_RTCTL0x1c/* Root Control */
#define PCI_EXP_RTCTL_SECEE0x0001/* System Error on Correctable Error */
#define PCI_EXP_RTCTL_SENFEE0x0002/* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE0x0004/* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE0x0008/* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTCAP0x1e/* Root Capabilities */
#define PCI_EXP_RTCAP_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTSTA0x20/* Root Status */
#define PCI_EXP_RTSTA_PME_REQID0x0000ffff/* PME Requester ID */
#define PCI_EXP_RTSTA_PME_STATUS0x00010000/* PME Status */
#define PCI_EXP_RTSTA_PME_PENDING0x00020000/* PME is Pending */
#define PCI_EXP_DEVCAP20x24/* Device capabilities 2 */
#define PCI_EXP_DEVCTL20x28/* Device Control */
#define PCI_EXP_DEV2_TIMEOUT_RANGE(x)((x) & 0xf) /* Completion Timeout Ranges Supported */
#define PCI_EXP_DEV2_TIMEOUT_VALUE(x)((x) & 0xf) /* Completion Timeout Value */
#define PCI_EXP_DEV2_TIMEOUT_DIS0x0010/* Completion Timeout Disable Supported */
#define PCI_EXP_DEV2_ARI0x0020/* ARI Forwarding */
#define PCI_EXP_DEVSTA20x2a/* Device Status */
#define PCI_EXP_LNKCAP20x2c/* Link Capabilities */
#define PCI_EXP_LNKCTL20x30/* Link Control */
#define PCI_EXP_LNKCTL2_SPEED(x)((x) & 0xf) /* Target Link Speed */
#define PCI_EXP_LNKCTL2_CMPLNC0x0010/* Enter Compliance */
#define PCI_EXP_LNKCTL2_SPEED_DIS0x0020/* Hardware Autonomous Speed Disable */
#define PCI_EXP_LNKCTL2_DEEMPHASIS(x)(((x) >> 6) & 1) /* Selectable De-emphasis */
#define PCI_EXP_LNKCTL2_MARGIN(x)(((x) >> 7) & 7) /* Transmit Margin */
#define PCI_EXP_LNKCTL2_MOD_CMPLNC0x0400/* Enter Modified Compliance */
#define PCI_EXP_LNKCTL2_CMPLNC_SOS0x0800/* Compliance SOS */
#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x)(((x) >> 12) & 1) /* Compliance De-emphasis */
#define PCI_EXP_LNKSTA20x32/* Link Status */
#define PCI_EXP_LINKSTA2_DEEMPHASIS(x)((x) & 1)/* Current De-emphasis Level */
#define PCI_EXP_SLTCAP20x34/* Slot Capabilities */
#define PCI_EXP_SLTCTL20x38/* Slot Control */
#define PCI_EXP_SLTSTA20x3a/* Slot Status */
/* MSI-X */
#define PCI_MSIX_ENABLE0x8000
#define PCI_MSIX_MASK0x4000
#define PCI_MSIX_TABSIZE0x03ff
#define PCI_MSIX_TABLE4
#define PCI_MSIX_PBA8
#define PCI_MSIX_BIR0x7
#define PCI_MSIX_ENABLE0x8000
#define PCI_MSIX_MASK0x4000
#define PCI_MSIX_TABSIZE0x03ff
#define PCI_MSIX_TABLE4
#define PCI_MSIX_PBA8
#define PCI_MSIX_BIR0x7
/* Subsystem vendor/device ID for PCI bridges */
#define PCI_SSVID_VENDOR4
#define PCI_SSVID_DEVICE6
#define PCI_SSVID_VENDOR4
#define PCI_SSVID_DEVICE6
/* Advanced Error Reporting */
#define PCI_ERR_UNCOR_STATUS4/* Uncorrectable Error Status */
#define PCI_ERR_UNC_TRAIN0x00000001/* Undefined in PCIe rev1.1 & 2.0 spec */
#define PCI_ERR_UNC_DLP0x00000010/* Data Link Protocol */
#define PCI_ERR_UNC_SDES0x00000020/* Surprise Down Error */
#define PCI_ERR_UNC_POISON_TLP0x00001000/* Poisoned TLP */
#define PCI_ERR_UNC_FCP0x00002000/* Flow Control Protocol */
#define PCI_ERR_UNC_COMP_TIME0x00004000/* Completion Timeout */
#define PCI_ERR_UNC_COMP_ABORT0x00008000/* Completer Abort */
#define PCI_ERR_UNC_UNX_COMP0x00010000/* Unexpected Completion */
#define PCI_ERR_UNC_RX_OVER0x00020000/* Receiver Overflow */
#define PCI_ERR_UNC_MALF_TLP0x00040000/* Malformed TLP */
#define PCI_ERR_UNC_ECRC0x00080000/* ECRC Error Status */
#define PCI_ERR_UNC_UNSUP0x00100000/* Unsupported Request */
#define PCI_ERR_UNC_ACS_VIOL0x00200000/* ACS Violation */
#define PCI_ERR_UNCOR_MASK8/* Uncorrectable Error Mask */
#define PCI_ERR_UNCOR_STATUS4/* Uncorrectable Error Status */
#define PCI_ERR_UNC_TRAIN0x00000001/* Undefined in PCIe rev1.1 & 2.0 spec */
#define PCI_ERR_UNC_DLP0x00000010/* Data Link Protocol */
#define PCI_ERR_UNC_SDES0x00000020/* Surprise Down Error */
#define PCI_ERR_UNC_POISON_TLP0x00001000/* Poisoned TLP */
#define PCI_ERR_UNC_FCP0x00002000/* Flow Control Protocol */
#define PCI_ERR_UNC_COMP_TIME0x00004000/* Completion Timeout */
#define PCI_ERR_UNC_COMP_ABORT0x00008000/* Completer Abort */
#define PCI_ERR_UNC_UNX_COMP0x00010000/* Unexpected Completion */
#define PCI_ERR_UNC_RX_OVER0x00020000/* Receiver Overflow */
#define PCI_ERR_UNC_MALF_TLP0x00040000/* Malformed TLP */
#define PCI_ERR_UNC_ECRC0x00080000/* ECRC Error Status */
#define PCI_ERR_UNC_UNSUP0x00100000/* Unsupported Request */
#define PCI_ERR_UNC_ACS_VIOL0x00200000/* ACS Violation */
#define PCI_ERR_UNCOR_MASK8/* Uncorrectable Error Mask */
/* Same bits as above */
#define PCI_ERR_UNCOR_SEVER12/* Uncorrectable Error Severity */
#define PCI_ERR_UNCOR_SEVER12/* Uncorrectable Error Severity */
/* Same bits as above */
#define PCI_ERR_COR_STATUS16/* Correctable Error Status */
#define PCI_ERR_COR_RCVR0x00000001/* Receiver Error Status */
#define PCI_ERR_COR_BAD_TLP0x00000040/* Bad TLP Status */
#define PCI_ERR_COR_BAD_DLLP0x00000080/* Bad DLLP Status */
#define PCI_ERR_COR_REP_ROLL0x00000100/* REPLAY_NUM Rollover */
#define PCI_ERR_COR_REP_TIMER0x00001000/* Replay Timer Timeout */
#define PCI_ERR_COR_REP_ANFE0x00002000/* Advisory Non-Fatal Error */
#define PCI_ERR_COR_MASK20/* Correctable Error Mask */
#define PCI_ERR_COR_STATUS16/* Correctable Error Status */
#define PCI_ERR_COR_RCVR0x00000001/* Receiver Error Status */
#define PCI_ERR_COR_BAD_TLP0x00000040/* Bad TLP Status */
#define PCI_ERR_COR_BAD_DLLP0x00000080/* Bad DLLP Status */
#define PCI_ERR_COR_REP_ROLL0x00000100/* REPLAY_NUM Rollover */
#define PCI_ERR_COR_REP_TIMER0x00001000/* Replay Timer Timeout */
#define PCI_ERR_COR_REP_ANFE0x00002000/* Advisory Non-Fatal Error */
#define PCI_ERR_COR_MASK20/* Correctable Error Mask */
/* Same bits as above */
#define PCI_ERR_CAP24/* Advanced Error Capabilities */
#define PCI_ERR_CAP_FEP(x)((x) & 31)/* First Error Pointer */
#define PCI_ERR_CAP_ECRC_GENC0x00000020/* ECRC Generation Capable */
#define PCI_ERR_CAP_ECRC_GENE0x00000040/* ECRC Generation Enable */
#define PCI_ERR_CAP_ECRC_CHKC0x00000080/* ECRC Check Capable */
#define PCI_ERR_CAP_ECRC_CHKE0x00000100/* ECRC Check Enable */
#define PCI_ERR_HEADER_LOG28/* Header Log Register (16 bytes) */
#define PCI_ERR_ROOT_COMMAND44/* Root Error Command */
#define PCI_ERR_ROOT_STATUS48
#define PCI_ERR_ROOT_COR_SRC52
#define PCI_ERR_ROOT_SRC54
#define PCI_ERR_CAP24/* Advanced Error Capabilities */
#define PCI_ERR_CAP_FEP(x)((x) & 31)/* First Error Pointer */
#define PCI_ERR_CAP_ECRC_GENC0x00000020/* ECRC Generation Capable */
#define PCI_ERR_CAP_ECRC_GENE0x00000040/* ECRC Generation Enable */
#define PCI_ERR_CAP_ECRC_CHKC0x00000080/* ECRC Check Capable */
#define PCI_ERR_CAP_ECRC_CHKE0x00000100/* ECRC Check Enable */
#define PCI_ERR_HEADER_LOG28/* Header Log Register (16 bytes) */
#define PCI_ERR_ROOT_COMMAND44/* Root Error Command */
#define PCI_ERR_ROOT_STATUS48
#define PCI_ERR_ROOT_COR_SRC52
#define PCI_ERR_ROOT_SRC54
/* Virtual Channel */
#define PCI_VC_PORT_REG14
#define PCI_VC_PORT_REG28
#define PCI_VC_PORT_CTRL12
#define PCI_VC_PORT_STATUS14
#define PCI_VC_RES_CAP16
#define PCI_VC_RES_CTRL20
#define PCI_VC_RES_STATUS26
#define PCI_VC_PORT_REG14
#define PCI_VC_PORT_REG28
#define PCI_VC_PORT_CTRL12
#define PCI_VC_PORT_STATUS14
#define PCI_VC_RES_CAP16
#define PCI_VC_RES_CTRL20
#define PCI_VC_RES_STATUS26
/* Power Budgeting */
#define PCI_PWR_DSR4/* Data Select Register */
#define PCI_PWR_DATA8/* Data Register */
#define PCI_PWR_DATA_BASE(x)((x) & 0xff) /* Base Power */
#define PCI_PWR_DATA_SCALE(x)(((x) >> 8) & 3) /* Data Scale */
#define PCI_PWR_DATA_PM_SUB(x)(((x) >> 10) & 7) /* PM Sub State */
#define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */
#define PCI_PWR_DATA_TYPE(x)(((x) >> 15) & 7) /* Type */
#define PCI_PWR_DATA_RAIL(x)(((x) >> 18) & 7) /* Power Rail */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP_BUDGET(x)((x) & 1)/* Included in system budget */
#define PCI_PWR_DSR4/* Data Select Register */
#define PCI_PWR_DATA8/* Data Register */
#define PCI_PWR_DATA_BASE(x)((x) & 0xff)/* Base Power */
#define PCI_PWR_DATA_SCALE(x)(((x) >> 8) & 3)/* Data Scale */
#define PCI_PWR_DATA_PM_SUB(x)(((x) >> 10) & 7)/* PM Sub State */
#define PCI_PWR_DATA_PM_STATE(x)(((x) >> 13) & 3)/* PM State */
#define PCI_PWR_DATA_TYPE(x)(((x) >> 15) & 7)/* Type */
#define PCI_PWR_DATA_RAIL(x)(((x) >> 18) & 7)/* Power Rail */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP_BUDGET(x)((x) & 1)/* Included in system budget */
/* Access Control Services */
#define PCI_ACS_CAP0x04/* ACS Capability Register */
#define PCI_ACS_CAP_VALID0x0001/* ACS Source Validation */
#define PCI_ACS_CAP_BLOCK0x0002/* ACS Translation Blocking */
#define PCI_ACS_CAP_REQ_RED0x0004/* ACS P2P Request Redirect */
#define PCI_ACS_CAP_CMPLT_RED0x0008/* ACS P2P Completion Redirect */
#define PCI_ACS_CAP_FORWARD0x0010/* ACS Upstream Forwarding */
#define PCI_ACS_CAP_EGRESS0x0020/* ACS P2P Egress Control */
#define PCI_ACS_CAP_TRANS0x0040/* ACS Direct Translated P2P */
#define PCI_ACS_CAP_VECTOR(x)(((x) >> 8) & 0xff) /* Egress Control Vector Size */
#define PCI_ACS_CTRL0x06/* ACS Control Register */
#define PCI_ACS_CTRL_VALID0x0001/* ACS Source Validation Enable */
#define PCI_ACS_CTRL_BLOCK0x0002/* ACS Translation Blocking Enable */
#define PCI_ACS_CTRL_REQ_RED0x0004/* ACS P2P Request Redirect Enable */
#define PCI_ACS_CTRL_CMPLT_RED0x0008/* ACS P2P Completion Redirect Enable */
#define PCI_ACS_CTRL_FORWARD0x0010/* ACS Upstream Forwarding Enable */
#define PCI_ACS_CTRL_EGRESS0x0020/* ACS P2P Egress Control Enable */
#define PCI_ACS_CTRL_TRANS0x0040/* ACS Direct Translated P2P Enable */
#define PCI_ACS_EGRESS_CTRL0x08/* Egress Control Vector */
#define PCI_ACS_CAP0x04/* ACS Capability Register */
#define PCI_ACS_CAP_VALID0x0001/* ACS Source Validation */
#define PCI_ACS_CAP_BLOCK0x0002/* ACS Translation Blocking */
#define PCI_ACS_CAP_REQ_RED0x0004/* ACS P2P Request Redirect */
#define PCI_ACS_CAP_CMPLT_RED0x0008/* ACS P2P Completion Redirect */
#define PCI_ACS_CAP_FORWARD0x0010/* ACS Upstream Forwarding */
#define PCI_ACS_CAP_EGRESS0x0020/* ACS P2P Egress Control */
#define PCI_ACS_CAP_TRANS0x0040/* ACS Direct Translated P2P */
#define PCI_ACS_CAP_VECTOR(x)(((x) >> 8) & 0xff) /* Egress Control Vector Size */
#define PCI_ACS_CTRL0x06/* ACS Control Register */
#define PCI_ACS_CTRL_VALID0x0001/* ACS Source Validation Enable */
#define PCI_ACS_CTRL_BLOCK0x0002/* ACS Translation Blocking Enable */
#define PCI_ACS_CTRL_REQ_RED0x0004/* ACS P2P Request Redirect Enable */
#define PCI_ACS_CTRL_CMPLT_RED0x0008/* ACS P2P Completion Redirect Enable */
#define PCI_ACS_CTRL_FORWARD0x0010/* ACS Upstream Forwarding Enable */
#define PCI_ACS_CTRL_EGRESS0x0020/* ACS P2P Egress Control Enable */
#define PCI_ACS_CTRL_TRANS0x0040/* ACS Direct Translated P2P Enable */
#define PCI_ACS_EGRESS_CTRL0x08/* Egress Control Vector */
/* Alternative Routing-ID Interpretation */
#define PCI_ARI_CAP0x04/* ARI Capability Register */
#define PCI_ARI_CAP_MFVC0x0001/* MFVC Function Groups Capability */
#define PCI_ARI_CAP_ACS0x0002/* ACS Function Groups Capability */
#define PCI_ARI_CAP_NFN(x)(((x) >> 8) & 0xff) /* Next Function Number */
#define PCI_ARI_CTRL0x06/* ARI Control Register */
#define PCI_ARI_CTRL_MFVC0x0001/* MFVC Function Groups Enable */
#define PCI_ARI_CTRL_ACS0x0002/* ACS Function Groups Enable */
#define PCI_ARI_CTRL_FG(x)(((x) >> 4) & 7) /* Function Group */
#define PCI_ARI_CAP0x04/* ARI Capability Register */
#define PCI_ARI_CAP_MFVC0x0001/* MFVC Function Groups Capability */
#define PCI_ARI_CAP_ACS0x0002/* ACS Function Groups Capability */
#define PCI_ARI_CAP_NFN(x)(((x) >> 8) & 0xff) /* Next Function Number */
#define PCI_ARI_CTRL0x06/* ARI Control Register */
#define PCI_ARI_CTRL_MFVC0x0001/* MFVC Function Groups Enable */
#define PCI_ARI_CTRL_ACS0x0002/* ACS Function Groups Enable */
#define PCI_ARI_CTRL_FG(x)(((x) >> 4) & 7) /* Function Group */
/* Address Translation Service */
#define PCI_ATS_CAP0x04/* ATS Capability Register */
#define PCI_ATS_CAP_IQD(x)((x) & 0x1f) /* Invalidate Queue Depth */
#define PCI_ATS_CTRL0x06/* ATS Control Register */
#define PCI_ATS_CTRL_STU(x)((x) & 0x1f) /* Smallest Translation Unit */
#define PCI_ATS_CTRL_ENABLE0x8000/* ATS Enable */
#define PCI_ATS_CAP0x04 /* ATS Capability Register */
#define PCI_ATS_CAP_IQD(x)((x) & 0x1f) /* Invalidate Queue Depth */
#define PCI_ATS_CTRL0x06 /* ATS Control Register */
#define PCI_ATS_CTRL_STU(x)((x) & 0x1f) /* Smallest Translation Unit */
#define PCI_ATS_CTRL_ENABLE0x8000 /* ATS Enable */
/* Single Root I/O Virtualization */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP_VFM0x00000001 /* VF Migration Capable */
#define PCI_IOV_CAP_IMN(x)((x) >> 21) /* VF Migration Interrupt Message Number */
#define PCI_IOV_CTRL0x08/* SR-IOV Control Register */
#define PCI_IOV_CTRL_VFE0x0001/* VF Enable */
#define PCI_IOV_CTRL_VFME0x0002/* VF Migration Enable */
#define PCI_IOV_CTRL_VFMIE0x0004/* VF Migration Interrupt Enable */
#define PCI_IOV_CTRL_MSE0x0008/* VF MSE */
#define PCI_IOV_CTRL_ARI0x0010/* ARI Capable Hierarchy */
#define PCI_IOV_STATUS0x0a/* SR-IOV Status Register */
#define PCI_IOV_STATUS_MS0x0001/* VF Migration Status */
#define PCI_IOV_INITIALVF0x0c/* Number of VFs that are initially associated */
#define PCI_IOV_TOTALVF0x0e/* Maximum number of VFs that could be associated */
#define PCI_IOV_NUMVF0x10/* Number of VFs that are available */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_OFFSET0x14/* First VF Offset */
#define PCI_IOV_STRIDE0x16/* Routing ID offset from one VF to the next one */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_SUPPS0x1c/* Supported Page Sizes */
#define PCI_IOV_SYSPS0x20/* System Page Size */
#define PCI_IOV_BAR_BASE0x24/* VF BAR0, VF BAR1, ... VF BAR5 */
#define PCI_IOV_NUM_BAR6/* Number of VF BARs */
#define PCI_IOV_MSAO0x3c/* VF Migration State Array Offset */
#define PCI_IOV_MSA_BIR(x)((x) & 7) /* VF Migration State BIR */
#define PCI_IOV_MSA_OFFSET(x)((x) & 0xfffffff8) /* VF Migration State Offset */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP_VFM0x00000001/* VF Migration Capable */
#define PCI_IOV_CAP_IMN(x)((x) >> 21) /* VF Migration Interrupt Message Number */
#define PCI_IOV_CTRL0x08/* SR-IOV Control Register */
#define PCI_IOV_CTRL_VFE0x0001/* VF Enable */
#define PCI_IOV_CTRL_VFME0x0002/* VF Migration Enable */
#define PCI_IOV_CTRL_VFMIE0x0004/* VF Migration Interrupt Enable */
#define PCI_IOV_CTRL_MSE0x0008/* VF MSE */
#define PCI_IOV_CTRL_ARI0x0010/* ARI Capable Hierarchy */
#define PCI_IOV_STATUS0x0a/* SR-IOV Status Register */
#define PCI_IOV_STATUS_MS0x0001/* VF Migration Status */
#define PCI_IOV_INITIALVF0x0c/* Number of VFs that are initially associated */
#define PCI_IOV_TOTALVF0x0e/* Maximum number of VFs that could be associated */
#define PCI_IOV_NUMVF0x10/* Number of VFs that are available */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_OFFSET0x14/* First VF Offset */
#define PCI_IOV_STRIDE0x16/* Routing ID offset from one VF to the next one */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_SUPPS0x1c/* Supported Page Sizes */
#define PCI_IOV_SYSPS0x20/* System Page Size */
#define PCI_IOV_BAR_BASE0x24/* VF BAR0, VF BAR1, ... VF BAR5 */
#define PCI_IOV_NUM_BAR6/* Number of VF BARs */
#define PCI_IOV_MSAO0x3c/* VF Migration State Array Offset */
#define PCI_IOV_MSA_BIR(x)((x) & 7)/* VF Migration State BIR */
#define PCI_IOV_MSA_OFFSET(x)((x) & 0xfffffff8) /* VF Migration State Offset */
/*
* The PCI interface treats multi-function devices as independent
* devices. The slot/function address of each device is encoded
* devices. The slot/function address of each device is encoded
* in a single byte as follows:
*
*7:3 = slot
*2:0 = function
*/
#define PCI_DEVFN(slot,func)((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn)((devfn) & 0x07)
#define PCI_DEVFN(slot,func)((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn)((devfn) & 0x07)
/* Device classes and subclasses */
#define PCI_CLASS_NOT_DEFINED0x0000
#define PCI_CLASS_NOT_DEFINED_VGA0x0001
#define PCI_BASE_CLASS_STORAGE0x01
#define PCI_CLASS_STORAGE_SCSI0x0100
#define PCI_CLASS_STORAGE_IDE0x0101
#define PCI_CLASS_STORAGE_FLOPPY0x0102
#define PCI_CLASS_STORAGE_IPI0x0103
#define PCI_CLASS_STORAGE_RAID0x0104
#define PCI_CLASS_STORAGE_ATA0x0105
#define PCI_CLASS_STORAGE_SATA0x0106
#define PCI_CLASS_STORAGE_SAS0x0107
#define PCI_CLASS_STORAGE_OTHER0x0180
#define PCI_CLASS_NOT_DEFINED0x0000
#define PCI_CLASS_NOT_DEFINED_VGA0x0001
#define PCI_BASE_CLASS_NETWORK0x02
#define PCI_CLASS_NETWORK_ETHERNET0x0200
#define PCI_CLASS_NETWORK_TOKEN_RING0x0201
#define PCI_CLASS_NETWORK_FDDI0x0202
#define PCI_CLASS_NETWORK_ATM0x0203
#define PCI_CLASS_NETWORK_ISDN0x0204
#define PCI_CLASS_NETWORK_OTHER0x0280
#define PCI_BASE_CLASS_STORAGE0x01
#define PCI_CLASS_STORAGE_SCSI0x0100
#define PCI_CLASS_STORAGE_IDE0x0101
#define PCI_CLASS_STORAGE_FLOPPY0x0102
#define PCI_CLASS_STORAGE_IPI0x0103
#define PCI_CLASS_STORAGE_RAID0x0104
#define PCI_CLASS_STORAGE_ATA0x0105
#define PCI_CLASS_STORAGE_SATA0x0106
#define PCI_CLASS_STORAGE_SAS0x0107
#define PCI_CLASS_STORAGE_OTHER0x0180
#define PCI_BASE_CLASS_DISPLAY0x03
#define PCI_CLASS_DISPLAY_VGA0x0300
#define PCI_CLASS_DISPLAY_XGA0x0301
#define PCI_CLASS_DISPLAY_3D0x0302
#define PCI_CLASS_DISPLAY_OTHER0x0380
#define PCI_BASE_CLASS_NETWORK0x02
#define PCI_CLASS_NETWORK_ETHERNET0x0200
#define PCI_CLASS_NETWORK_TOKEN_RING0x0201
#define PCI_CLASS_NETWORK_FDDI0x0202
#define PCI_CLASS_NETWORK_ATM0x0203
#define PCI_CLASS_NETWORK_ISDN0x0204
#define PCI_CLASS_NETWORK_OTHER0x0280
#define PCI_BASE_CLASS_MULTIMEDIA0x04
#define PCI_CLASS_MULTIMEDIA_VIDEO0x0400
#define PCI_CLASS_MULTIMEDIA_AUDIO0x0401
#define PCI_CLASS_MULTIMEDIA_PHONE0x0402
#define PCI_CLASS_MULTIMEDIA_AUDIO_DEV0x0403
#define PCI_CLASS_MULTIMEDIA_OTHER0x0480
#define PCI_BASE_CLASS_DISPLAY0x03
#define PCI_CLASS_DISPLAY_VGA0x0300
#define PCI_CLASS_DISPLAY_XGA0x0301
#define PCI_CLASS_DISPLAY_3D0x0302
#define PCI_CLASS_DISPLAY_OTHER0x0380
#define PCI_BASE_CLASS_MEMORY0x05
#define PCI_CLASS_MEMORY_RAM0x0500
#define PCI_CLASS_MEMORY_FLASH0x0501
#define PCI_CLASS_MEMORY_OTHER0x0580
#define PCI_BASE_CLASS_MULTIMEDIA0x04
#define PCI_CLASS_MULTIMEDIA_VIDEO0x0400
#define PCI_CLASS_MULTIMEDIA_AUDIO0x0401
#define PCI_CLASS_MULTIMEDIA_PHONE0x0402
#define PCI_CLASS_MULTIMEDIA_AUDIO_DEV0x0403
#define PCI_CLASS_MULTIMEDIA_OTHER0x0480
#define PCI_BASE_CLASS_BRIDGE0x06
#define PCI_CLASS_BRIDGE_HOST0x0600
#define PCI_CLASS_BRIDGE_ISA0x0601
#define PCI_CLASS_BRIDGE_EISA0x0602
#define PCI_CLASS_BRIDGE_MC0x0603
#define PCI_CLASS_BRIDGE_PCI0x0604
#define PCI_CLASS_BRIDGE_PCMCIA0x0605
#define PCI_CLASS_BRIDGE_NUBUS0x0606
#define PCI_CLASS_BRIDGE_CARDBUS0x0607
#define PCI_CLASS_BRIDGE_RACEWAY0x0608
#define PCI_CLASS_BRIDGE_PCI_SEMI0x0609
#define PCI_CLASS_BRIDGE_IB_TO_PCI0x060a
#define PCI_CLASS_BRIDGE_OTHER0x0680
#define PCI_BASE_CLASS_MEMORY0x05
#define PCI_CLASS_MEMORY_RAM0x0500
#define PCI_CLASS_MEMORY_FLASH0x0501
#define PCI_CLASS_MEMORY_OTHER0x0580
#define PCI_BASE_CLASS_COMMUNICATION0x07
#define PCI_CLASS_COMMUNICATION_SERIAL0x0700
#define PCI_CLASS_COMMUNICATION_PARALLEL0x0701
#define PCI_CLASS_COMMUNICATION_MSERIAL0x0702
#define PCI_CLASS_COMMUNICATION_MODEM0x0703
#define PCI_CLASS_COMMUNICATION_OTHER0x0780
#define PCI_BASE_CLASS_BRIDGE0x06
#define PCI_CLASS_BRIDGE_HOST0x0600
#define PCI_CLASS_BRIDGE_ISA0x0601
#define PCI_CLASS_BRIDGE_EISA0x0602
#define PCI_CLASS_BRIDGE_MC0x0603
#define PCI_CLASS_BRIDGE_PCI0x0604
#define PCI_CLASS_BRIDGE_PCMCIA0x0605
#define PCI_CLASS_BRIDGE_NUBUS0x0606
#define PCI_CLASS_BRIDGE_CARDBUS0x0607
#define PCI_CLASS_BRIDGE_RACEWAY0x0608
#define PCI_CLASS_BRIDGE_PCI_SEMI0x0609
#define PCI_CLASS_BRIDGE_IB_TO_PCI0x060a
#define PCI_CLASS_BRIDGE_OTHER0x0680
#define PCI_BASE_CLASS_SYSTEM0x08
#define PCI_CLASS_SYSTEM_PIC0x0800
#define PCI_CLASS_SYSTEM_DMA0x0801
#define PCI_CLASS_SYSTEM_TIMER0x0802
#define PCI_CLASS_SYSTEM_RTC0x0803
#define PCI_CLASS_SYSTEM_PCI_HOTPLUG0x0804
#define PCI_CLASS_SYSTEM_OTHER0x0880
#define PCI_BASE_CLASS_COMMUNICATION0x07
#define PCI_CLASS_COMMUNICATION_SERIAL0x0700
#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
#define PCI_CLASS_COMMUNICATION_MSERIAL0x0702
#define PCI_CLASS_COMMUNICATION_MODEM0x0703
#define PCI_CLASS_COMMUNICATION_OTHER0x0780
#define PCI_BASE_CLASS_INPUT0x09
#define PCI_CLASS_INPUT_KEYBOARD0x0900
#define PCI_CLASS_INPUT_PEN0x0901
#define PCI_CLASS_INPUT_MOUSE0x0902
#define PCI_CLASS_INPUT_SCANNER0x0903
#define PCI_CLASS_INPUT_GAMEPORT0x0904
#define PCI_CLASS_INPUT_OTHER0x0980
#define PCI_BASE_CLASS_SYSTEM0x08
#define PCI_CLASS_SYSTEM_PIC0x0800
#define PCI_CLASS_SYSTEM_DMA0x0801
#define PCI_CLASS_SYSTEM_TIMER0x0802
#define PCI_CLASS_SYSTEM_RTC0x0803
#define PCI_CLASS_SYSTEM_PCI_HOTPLUG0x0804
#define PCI_CLASS_SYSTEM_OTHER0x0880
#define PCI_BASE_CLASS_DOCKING0x0a
#define PCI_CLASS_DOCKING_GENERIC0x0a00
#define PCI_CLASS_DOCKING_OTHER0x0a80
#define PCI_BASE_CLASS_INPUT0x09
#define PCI_CLASS_INPUT_KEYBOARD0x0900
#define PCI_CLASS_INPUT_PEN0x0901
#define PCI_CLASS_INPUT_MOUSE0x0902
#define PCI_CLASS_INPUT_SCANNER0x0903
#define PCI_CLASS_INPUT_GAMEPORT0x0904
#define PCI_CLASS_INPUT_OTHER0x0980
#define PCI_BASE_CLASS_PROCESSOR0x0b
#define PCI_CLASS_PROCESSOR_3860x0b00
#define PCI_CLASS_PROCESSOR_4860x0b01
#define PCI_CLASS_PROCESSOR_PENTIUM0x0b02
#define PCI_CLASS_PROCESSOR_ALPHA0x0b10
#define PCI_CLASS_PROCESSOR_POWERPC0x0b20
#define PCI_CLASS_PROCESSOR_MIPS0x0b30
#define PCI_CLASS_PROCESSOR_CO0x0b40
#define PCI_BASE_CLASS_DOCKING0x0a
#define PCI_CLASS_DOCKING_GENERIC0x0a00
#define PCI_CLASS_DOCKING_OTHER0x0a80
#define PCI_BASE_CLASS_SERIAL0x0c
#define PCI_CLASS_SERIAL_FIREWIRE0x0c00
#define PCI_CLASS_SERIAL_ACCESS0x0c01
#define PCI_CLASS_SERIAL_SSA0x0c02
#define PCI_CLASS_SERIAL_USB0x0c03
#define PCI_CLASS_SERIAL_FIBER0x0c04
#define PCI_CLASS_SERIAL_SMBUS0x0c05
#define PCI_CLASS_SERIAL_INFINIBAND0x0c06
#define PCI_BASE_CLASS_PROCESSOR0x0b
#define PCI_CLASS_PROCESSOR_3860x0b00
#define PCI_CLASS_PROCESSOR_4860x0b01
#define PCI_CLASS_PROCESSOR_PENTIUM0x0b02
#define PCI_CLASS_PROCESSOR_ALPHA0x0b10
#define PCI_CLASS_PROCESSOR_POWERPC0x0b20
#define PCI_CLASS_PROCESSOR_MIPS0x0b30
#define PCI_CLASS_PROCESSOR_CO0x0b40
#define PCI_BASE_CLASS_WIRELESS0x0d
#define PCI_CLASS_WIRELESS_IRDA0x0d00
#define PCI_CLASS_WIRELESS_CONSUMER_IR0x0d01
#define PCI_CLASS_WIRELESS_RF0x0d10
#define PCI_CLASS_WIRELESS_OTHER0x0d80
#define PCI_BASE_CLASS_SERIAL0x0c
#define PCI_CLASS_SERIAL_FIREWIRE0x0c00
#define PCI_CLASS_SERIAL_ACCESS0x0c01
#define PCI_CLASS_SERIAL_SSA0x0c02
#define PCI_CLASS_SERIAL_USB0x0c03
#define PCI_CLASS_SERIAL_FIBER0x0c04
#define PCI_CLASS_SERIAL_SMBUS0x0c05
#define PCI_CLASS_SERIAL_INFINIBAND0x0c06
#define PCI_BASE_CLASS_INTELLIGENT0x0e
#define PCI_CLASS_INTELLIGENT_I2O0x0e00
#define PCI_BASE_CLASS_WIRELESS0x0d
#define PCI_CLASS_WIRELESS_IRDA0x0d00
#define PCI_CLASS_WIRELESS_CONSUMER_IR0x0d01
#define PCI_CLASS_WIRELESS_RF0x0d10
#define PCI_CLASS_WIRELESS_OTHER0x0d80
#define PCI_BASE_CLASS_SATELLITE0x0f
#define PCI_CLASS_SATELLITE_TV0x0f00
#define PCI_CLASS_SATELLITE_AUDIO0x0f01
#define PCI_CLASS_SATELLITE_VOICE0x0f03
#define PCI_CLASS_SATELLITE_DATA0x0f04
#define PCI_BASE_CLASS_INTELLIGENT0x0e
#define PCI_CLASS_INTELLIGENT_I2O0x0e00
#define PCI_BASE_CLASS_CRYPT0x10
#define PCI_CLASS_CRYPT_NETWORK0x1000
#define PCI_CLASS_CRYPT_ENTERTAINMENT0x1010
#define PCI_CLASS_CRYPT_OTHER0x1080
#define PCI_BASE_CLASS_SATELLITE0x0f
#define PCI_CLASS_SATELLITE_TV0x0f00
#define PCI_CLASS_SATELLITE_AUDIO0x0f01
#define PCI_CLASS_SATELLITE_VOICE0x0f03
#define PCI_CLASS_SATELLITE_DATA0x0f04
#define PCI_BASE_CLASS_SIGNAL0x11
#define PCI_CLASS_SIGNAL_DPIO0x1100
#define PCI_CLASS_SIGNAL_PERF_CTR0x1101
#define PCI_CLASS_SIGNAL_SYNCHRONIZER0x1110
#define PCI_CLASS_SIGNAL_OTHER0x1180
#define PCI_BASE_CLASS_CRYPT0x10
#define PCI_CLASS_CRYPT_NETWORK0x1000
#define PCI_CLASS_CRYPT_ENTERTAINMENT0x1010
#define PCI_CLASS_CRYPT_OTHER0x1080
#define PCI_CLASS_OTHERS0xff
#define PCI_BASE_CLASS_SIGNAL0x11
#define PCI_CLASS_SIGNAL_DPIO0x1100
#define PCI_CLASS_SIGNAL_PERF_CTR0x1101
#define PCI_CLASS_SIGNAL_SYNCHRONIZER0x1110
#define PCI_CLASS_SIGNAL_OTHER0x1180
#define PCI_CLASS_OTHERS0xff
/* Several ID's we need in the library */
#define PCI_VENDOR_ID_APPLE0x106b
#define PCI_VENDOR_ID_AMD0x1022
#define PCI_VENDOR_ID_ATI0x1002
#define PCI_VENDOR_ID_INTEL0x8086
#define PCI_VENDOR_ID_NVIDIA0x10de
#define PCI_VENDOR_ID_REALTEK0x10ec
#define PCI_VENDOR_ID_TEXAS_INSTRUMENTS 0x104c
#define PCI_VENDOR_ID_VIA0x1106
#define PCI_VENDOR_ID_APPLE0x106b
#define PCI_VENDOR_ID_AMD0x1002
#define PCI_VENDOR_ID_ATI0x1002
#define PCI_VENDOR_ID_INTEL0x8086
#define PCI_VENDOR_ID_NVIDIA0x10de
#define PCI_VENDOR_ID_REALTEK0x10ec
#define PCI_VENDOR_ID_TEXAS_INSTRUMENTS0x104c
#define PCI_VENDOR_ID_VIA0x1106
#endif /* !__LIBSAIO_PCI_H */
branches/azimutz/Chazi/i386/boot2/modules.h
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#ifndef __BOOT_MODULES_H
#define __BOOT_MODULES_H
#include <saio_types.h>
#include <mach-o/loader.h>
#include <mach-o/nlist.h>
#define MODULE_PATH"/Extra/modules/"
#define SYMBOLS_MODULE "Symbols.dylib"
#define SYMBOLS_AUTHOR "Chameleon"
#define SYMBOLS_DESCRIPTION "Chameleon symbols for linking"
#define SYMBOLS_VERSION 0
#define SYMBOLS_COMPAT 0
#define VOID_SYMBOL"dyld_void_start"
extern unsigned long long textAddress;
extern unsigned long long textSection;
extern UInt64 textAddress;
extern UInt64 textSection;
typedef struct symbolList_t
{
char* symbol;
unsigned int addr;
UInt64 addr;
struct symbolList_t* next;
} symbolList_t;
struct moduleHook_t* next;
} moduleHook_t;
typedef struct moduleList_t //Azi: modules or module? see modules/include/modules
/*typedef struct moduleList_t //Azi: modules or module? see modules/include/modules
{
char*name;
//UInt32version;
//UInt32compat;
struct moduleList_t*next;
} moduleList_t; */
typedef struct modulesList_t
{
const char*name;
const char* author;
const char* description;
UInt32version;
UInt32compat;
struct modulesList_t* next;
} moduleList_t;
int init_module_system();
void load_all_modules();
void start_built_in_module(const char* name,
const char* author,
const char* description,
UInt32 version,
UInt32 compat,
void(*start_function)(void));
int load_module(char* module);
int is_module_loaded(const char* name);
void module_loaded(const char* name/*, UInt32 version, UInt32 compat*/);
void module_loaded(const char* name, const char* author, const char* description, UInt32 version, UInt32 compat);
/********************************************************************************/
void*parse_mach(void* binary,
int(*dylib_loader)(char*),
long long(*symbol_handler)(char*, long long, char));
long long(*symbol_handler)(char*, long long, char),
void (*section_handler)(char* section, char* segment, long long offset, long long address)
);
unsigned inthandle_symtable(UInt32 base,
struct symtab_command* symtabCommand,
long long(*symbol_handler)(char*, long long, char),
char is64);
voidrebase_macho(void* base, char* rebase_stream, UInt32 size);
inline voidrebase_location(UInt32* location, char* base, int type);
voidbind_macho(void* base, char* bind_stream, UInt32 size);
voidbind_macho(void* base, UInt8* bind_stream, UInt32 size);
inline voidbind_location(UInt32* location, char* value, UInt32 addend, int type);
branches/azimutz/Chazi/i386/modules/HelloWorld/HelloWorld.cpp
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#include <iostream>
#include <modules>
extern "C"
{
void HelloWorld_start();
}
using namespace std;
class HW {
branches/azimutz/Chazi/i386/modules/HelloWorld/Makefile
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MODULE_NAME = HelloWorld
MODULE_DESCRIPTION = This module provides an example implementation of a module. Should not be used for regular bootup
MODULE_AUTHOR =
MODULE_VERSION = "1.0.0"
MODULE_COMPAT_VERSION = "1.0.0"
#MODULE_START = _$(MODULE_NAME)_start
MODULE_START = __Z16HelloWorld_startv
MODULE_DEPENDENCIES = uClibc++
MODULE_START = $(MODULE_NAME)_start
MODULE_DEPENDENCIES = uClibcxx
DIR = HelloWorld
MODULE_OBJS = HelloWorld.o
OPTIM = -Os -Oz
DEBUG = -DNOTHING
#DEBUG = -DDEBUG_HELLO_WORLD=1
CFLAGS= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \
-D__ARCHITECTURE__=\"i386\" -DSAIO_INTERNAL_USER \
-DRCZ_COMPRESSED_FILE_SUPPORT $(DEBUG) \
-fno-builtin $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -fno-common
DEFINES=
CONFIG = hd
INC = -I. -I.. -I$(SYMROOT) -I$(UTILDIR) -I$(LIBSADIR) -I$(LIBSAIODIR) -I$(BOOT2DIR)
LIBS=
VPATH = $(OBJROOT):$(SYMROOT)
SFILES =
CFILES =
HFILES =
EXPORTED_HFILES =
INSTALLED_HFILES =
OTHERFILES = Makefile
ALLSRC = $(SFILES) $(CFILES) \
$(HFILES) $(OTHERFILES)
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)
all embedtheme: dylib
include ../MakeInc.dir
branches/azimutz/Chazi/i386/util/fdisk/disk.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _DISK_H
#define _DISK_H
/* Data types */
typedef struct _DISK_metrics {
int cylinders;
int heads;
int sectors;
int size;/* Number of sectors in disk */
int sector_size;/* Bytes per sector */
} DISK_metrics;
typedef struct _disk_t {
char *name;
DISK_metrics *bios;/* Metrics as reported by BIOS (always NULL) */
DISK_metrics *label;/* As reported by device ioctls */
DISK_metrics *real;/* Metrics we're using (BIOS, ioctls, user-supplied) */
} disk_t;
/* Prototypes */
int DISK_open __P((char *, int));
int DISK_openshared __P((char *, int, int *));
int DISK_close __P((int));
int DISK_getmetrics __P((disk_t *, DISK_metrics *));
int DISK_get_sector_size __P((disk_t *, DISK_metrics *));
int DISK_printmetrics __P((disk_t *));
void DISK_fake_CHS __P((DISK_metrics *));
#endif /* _DISK_H */
branches/azimutz/Chazi/i386/util/fdisk/opendev.c
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 2000, Todd C. Miller. All rights reserved.
* Copyright (c) 1996, Jason Downs. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR(S) BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <errno.h>
#include <fcntl.h>
#include <limits.h>
#include <paths.h>
#include <stdio.h>
#include <string.h>
#include "util.h"
/*
* This routine is a generic rewrite of the original code found in
* disklabel(8).
*/
int
opendev(path, oflags, dflags, realpath)
char *path;
int oflags;
int dflags;
char **realpath;
{
int fd;
char *slash, *prefix;
static char namebuf[PATH_MAX];
/* Initial state */
if (realpath)
*realpath = path;
fd = -1;
errno = ENOENT;
if (dflags & OPENDEV_BLCK)
prefix = "";/* block device */
else
prefix = "r";/* character device */
if ((slash = strchr(path, '/')))
fd = open(path, oflags);
else if (dflags & OPENDEV_PART) {
/*
* First try raw partition (for removable drives)
*/
if (snprintf(namebuf, sizeof(namebuf), "%s%s%s%c",
_PATH_DEV, prefix, path, 'a' + getrawpartition())
< sizeof(namebuf)) {
fd = open(namebuf, oflags);
if (realpath)
*realpath = namebuf;
} else
errno = ENAMETOOLONG;
}
if (!slash && fd == -1 && errno == ENOENT) {
if (snprintf(namebuf, sizeof(namebuf), "%s%s%s",
_PATH_DEV, prefix, path) < sizeof(namebuf)) {
fd = open(namebuf, oflags);
if (realpath)
*realpath = namebuf;
} else
errno = ENAMETOOLONG;
}
return (fd);
}
branches/azimutz/Chazi/i386/util/fdisk/fdisk.c
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <err.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <paths.h>
#include <sys/types.h>
#include <sys/fcntl.h>
#include "disk.h"
#include "user.h"
#include "auto.h"
#define _PATH_MBR "/usr/standalone/i386/boot0"
void
usage()
{
extern char * __progname;
fprintf(stderr, "usage: %s "
"[-ieu] [-f mbrboot] [-c cyl -h head -s sect] [-S size] [-r] [-a style] disk\n"
"\t-i: initialize disk with new MBR\n"
"\t-u: update MBR code, preserve partition table\n"
"\t-e: edit MBRs on disk interactively\n"
"\t-f: specify non-standard MBR template\n"
"\t-chs: specify disk geometry\n"
"\t-S: specify disk size\n"
"\t-r: read partition specs from stdin (implies -i)\n"
"\t-a: auto-partition with the given style\n"
"\t-d: dump partition table\n"
"\t-y: don't ask any questions\n"
"\t-t: test if disk is partitioned\n"
"`disk' is of the form /dev/rdisk0.\n",
__progname);
fprintf(stderr, "auto-partition styles:\n");
AUTO_print_styles(stderr);
exit(1);
}
char *mbr_binary = NULL;
int
main(argc, argv)
int argc;
char **argv;
{
int ch, fd;
int i_flag = 0, m_flag = 0, u_flag = 0, r_flag = 0, d_flag = 0, y_flag = 0, t_flag = 0;
int c_arg = 0, h_arg = 0, s_arg = 0;
int size_arg = 0;
int block_size_arg = 0;
disk_t disk;
DISK_metrics *usermetrics;
char *mbrfile = _PATH_MBR;
mbr_t *mp;
char *auto_style = NULL;
while ((ch = getopt(argc, argv, "ieuf:c:h:s:b:S:ra:dyt")) != -1) {
switch(ch) {
case 'i':
i_flag = 1;
break;
case 'u':
u_flag = 1;
break;
case 'e':
m_flag = 1;
break;
case 'f':
mbrfile = optarg;
break;
case 'c':
c_arg = atoi(optarg);
if (c_arg < 1 || c_arg > 262144)
errx(1, "Cylinder argument out of range.");
break;
case 'h':
h_arg = atoi(optarg);
if (h_arg < 1 || h_arg > 256)
errx(1, "Head argument out of range.");
break;
case 's':
s_arg = atoi(optarg);
if (s_arg < 1 || s_arg > 63)
errx(1, "Sector argument out of range.");
break;
case 'b':
block_size_arg = atoi(optarg);
if (block_size_arg & (block_size_arg - 1))
errx(1, "Block size argument not a power of two.");
if (block_size_arg < 512 || block_size_arg > 4096)
errx(1, "Block size argument out of range 512..4096.");
break;
case 'S':
size_arg = atoi(optarg);
break;
case 'r':
r_flag = 1;
break;
case 'a':
auto_style = optarg;
break;
case 'd':
d_flag = 1;
break;
case 'y':
y_flag = 1;
break;
case 't':
t_flag = 1;
break;
default:
usage();
}
}
argc -= optind;
argv += optind;
/* Argument checking */
if (argc != 1)
usage();
else
disk.name = argv[0];
if (i_flag && u_flag) errx(1, "-i and -u cannot be specified simultaneously");
/* Put in supplied geometry if there */
if (c_arg | h_arg | s_arg | size_arg | block_size_arg) {
usermetrics = malloc(sizeof(DISK_metrics));
if (usermetrics != NULL) {
if (c_arg && h_arg && s_arg) {
usermetrics->cylinders = c_arg;
usermetrics->heads = h_arg;
usermetrics->sectors = s_arg;
if (size_arg) {
usermetrics->size = size_arg;
} else {
usermetrics->size = c_arg * h_arg * s_arg;
}
} else {
if (size_arg) {
usermetrics->size = size_arg;
DISK_fake_CHS(usermetrics);
} else {
errx(1, "Please specify a full geometry with [-chs].");
}
}
if (block_size_arg) {
usermetrics->sector_size = block_size_arg;
} else {
DISK_get_sector_size(&disk, usermetrics);
}
}
} else {
usermetrics = NULL;
}
/* Get the geometry */
disk.real = NULL;
if (DISK_getmetrics(&disk, usermetrics))
errx(1, "Can't get disk geometry, please use [-chs] to specify.");
/* If only testing, read MBR and silently exit */
if (t_flag) {
mbr_t *mbr;
mp = mbr = MBR_read_all(&disk);
while (mp) {
if (mp->signature != MBR_SIGNATURE) {
MBR_free(mbr);
exit(1);
}
mp = mp->next;
}
MBR_free(mbr);
exit(0);
}
/* If not editing the disk, print out current MBRs on disk */
if ((i_flag + r_flag + u_flag + m_flag) == 0) {
exit(USER_print_disk(&disk, d_flag));
}
/* Parse mbr template or read partition specs, to pass on later */
if (auto_style && r_flag) {
errx(1, "Can't specify both -r and -a");
}
mbr_binary = (char *)malloc(MBR_CODE_SIZE);
if ((fd = open(mbrfile, O_RDONLY)) == -1) {
warn("could not open MBR file %s", mbrfile);
bzero(mbr_binary, MBR_CODE_SIZE);
} else {
int cc;
cc = read(fd, mbr_binary, MBR_CODE_SIZE);
if (cc < MBR_CODE_SIZE) {
err(1, "could not read MBR code");
}
close(fd);
}
if (u_flag) {
/* Don't hose the partition table; just write the boot code */
mp = MBR_read_all(&disk);
bcopy(mbr_binary, mp->code, MBR_CODE_SIZE);
MBR_make(mp);
} else if (i_flag) {
/* If they didn't specify -a, they'll get the default auto style */
mp = MBR_alloc(NULL);
if (AUTO_init(&disk, auto_style, mp) != AUTO_OK) {
errx(1, "error initializing disk");
}
bcopy(mbr_binary, mp->code, MBR_CODE_SIZE);
MBR_make(mp);
} else if (r_flag) {
mp = MBR_parse_spec(stdin, &disk);
bcopy(mbr_binary, mp->code, MBR_CODE_SIZE);
MBR_make(mp);
} else {
/* Use what's on the disk. */
mp = MBR_read_all(&disk);
}
/* Now do what we are supposed to */
if (i_flag || r_flag || u_flag) {
USER_write(&disk, mp, u_flag, y_flag);
}
if (m_flag) {
USER_modify(&disk, mp, 0, 0);
}
if (mbr_binary)
free(mbr_binary);
return (0);
}
branches/azimutz/Chazi/i386/util/fdisk/misc.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _MISC_H
#define _MISC_H
#include <sys/types.h>
#include "cmd.h"
/* Constants */
#define ASK_HEX 0x01
#define ASK_DEC 0x02
/* Prototypes */
int ask_cmd __P((cmd_t *));
int ask_num __P((const char *, int, int, int, int, void (*help) __P((void))));
int ask_yn __P((const char *, int));
u_int16_t getshort __P((void *));
u_int32_t getlong __P((void *));
void putshort __P((void *, u_int16_t));
void putlong __P((void *, u_int32_t));
#endif /* _MISC_H */
branches/azimutz/Chazi/i386/util/fdisk/cmd.c
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/*
* Copyright (c) 2002-2005 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdio.h>
#include <ctype.h>
#include <memory.h>
#include <stdlib.h>
#include <unistd.h>
#include <signal.h>
#include <sys/fcntl.h>
#include "disk.h"
#include "misc.h"
#include "user.h"
#include "part.h"
#include "cmd.h"
#include "auto.h"
#define MAX(a, b) ((a) >= (b) ? (a) : (b))
int
Xerase(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
bzero(mbr->part, sizeof(mbr->part));
mbr->signature = MBR_SIGNATURE;
return (CMD_DIRTY);
}
int
Xreinit(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
/* Copy template MBR */
MBR_make(tt);
MBR_parse(disk, offset, 0, mbr);
MBR_init(disk, mbr);
/* Tell em we did something */
printf("In memory copy is initialized to:\n");
printf("Offset: %d\t", offset);
MBR_print(mbr);
printf("Use 'write' to update disk.\n");
return (CMD_DIRTY);
}
int
Xauto(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
if (cmd->args[0] == '\0') {
printf("usage: auto <style>\n");
printf(" where style is one of:\n");
AUTO_print_styles(stdout);
return (CMD_CONT);
}
if (AUTO_init(disk, cmd->args, mbr) != AUTO_OK) {
return (CMD_CONT);
}
MBR_make(mbr);
return (CMD_DIRTY);
}
int
Xdisk(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
int maxcyl = 1024;
int maxhead = 256;
int maxsec = 63;
/* Print out disk info */
DISK_printmetrics(disk);
#if defined (__powerpc__) || defined (__mips__)
maxcyl = 9999999;
maxhead = 9999999;
maxsec = 9999999;
#endif
/* Ask for new info */
if (ask_yn("Change disk geometry?", 0)) {
disk->real->cylinders = ask_num("BIOS Cylinders", ASK_DEC,
disk->real->cylinders, 1, maxcyl, NULL);
disk->real->heads = ask_num("BIOS Heads", ASK_DEC,
disk->real->heads, 1, maxhead, NULL);
disk->real->sectors = ask_num("BIOS Sectors", ASK_DEC,
disk->real->sectors, 1, maxsec, NULL);
disk->real->size = disk->real->cylinders * disk->real->heads
* disk->real->sectors;
}
return (CMD_CONT);
}
int
Xedit(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
int pn, num, ret;
prt_t *pp;
ret = CMD_CONT;
if (!isdigit(cmd->args[0])) {
printf("Invalid argument: %s <partition number>\n", cmd->cmd);
return (ret);
}
pn = atoi(cmd->args) - 1;
if (pn < 0 || pn > 3) {
printf("Invalid partition number.\n");
return (ret);
}
/* Print out current table entry */
pp = &mbr->part[pn];
PRT_print(0, NULL);
PRT_print(pn, pp);
#defineEDIT(p, f, v, n, m, h)\
if ((num = ask_num(p, f, v, n, m, h)) != v)\
ret = CMD_DIRTY;\
v = num;
/* Ask for partition type */
EDIT("Partition id ('0' to disable) ", ASK_HEX, pp->id, 0, 0xFF, PRT_printall);
/* Unused, so just zero out */
if (pp->id == DOSPTYP_UNUSED) {
memset(pp, 0, sizeof(*pp));
printf("Partition %d is disabled.\n", pn + 1);
return (ret);
}
/* Change table entry */
if (ask_yn("Do you wish to edit in CHS mode?", 0)) {
int maxcyl, maxhead, maxsect;
/* Shorter */
maxcyl = disk->real->cylinders - 1;
maxhead = disk->real->heads - 1;
maxsect = disk->real->sectors;
/* Get data */
EDIT("BIOS Starting cylinder", ASK_DEC, pp->scyl, 0, maxcyl, NULL);
EDIT("BIOS Starting head", ASK_DEC, pp->shead, 0, maxhead, NULL);
EDIT("BIOS Starting sector", ASK_DEC, pp->ssect, 1, maxsect, NULL);
EDIT("BIOS Ending cylinder", ASK_DEC, pp->ecyl, 0, maxcyl, NULL);
EDIT("BIOS Ending head", ASK_DEC, pp->ehead, 0, maxhead, NULL);
EDIT("BIOS Ending sector", ASK_DEC, pp->esect, 1, maxsect, NULL);
/* Fix up off/size values */
PRT_fix_BN(disk, pp, pn);
/* Fix up CHS values for LBA */
PRT_fix_CHS(disk, pp, pn);
} else {
u_int m;
if (pn == 0) {
pp->bs = 63 + offset;
} else {
if (mbr->part[pn-1].id != 0) {
pp->bs = mbr->part[pn-1].bs + mbr->part[pn-1].ns;
}
}
/* Get data */
EDIT("Partition offset", ASK_DEC, pp->bs, 0,
disk->real->size, NULL);
m = MAX(pp->ns, disk->real->size - pp->bs);
if ( m > disk->real->size - pp->bs) {
/* dont have default value extend beyond end of disk */
m = disk->real->size - pp->bs;
}
pp->ns = m;
EDIT("Partition size", ASK_DEC, pp->ns, 1,
m, NULL);
/* Fix up CHS values */
PRT_fix_CHS(disk, pp, pn);
}
#undef EDIT
return (ret);
}
int
Xsetpid(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
int pn, num, ret;
prt_t *pp;
ret = CMD_CONT;
if (!isdigit(cmd->args[0])) {
printf("Invalid argument: %s <partition number>\n", cmd->cmd);
return (ret);
}
pn = atoi(cmd->args) - 1;
if (pn < 0 || pn > 3) {
printf("Invalid partition number.\n");
return (ret);
}
/* Print out current table entry */
pp = &mbr->part[pn];
PRT_print(0, NULL);
PRT_print(pn, pp);
#defineEDIT(p, f, v, n, m, h)\
if ((num = ask_num(p, f, v, n, m, h)) != v)\
ret = CMD_DIRTY;\
v = num;
/* Ask for partition type */
EDIT("Partition id ('0' to disable) ", ASK_HEX, pp->id, 0, 0xFF, PRT_printall);
#undef EDIT
return (ret);
}
int
Xselect(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
static int firstoff = 0;
int off;
int pn;
if (!isdigit(cmd->args[0])) {
printf("Invalid argument: %s <partition number>\n", cmd->cmd);
return (CMD_CONT);
}
pn = atoi(cmd->args) - 1;
if (pn < 0 || pn > 3) {
printf("Invalid partition number.\n");
return (CMD_CONT);
}
off = mbr->part[pn].bs;
/* Sanity checks */
if ((mbr->part[pn].id != DOSPTYP_EXTEND) &&
(mbr->part[pn].id != DOSPTYP_EXTENDL)) {
printf("Partition %d is not an extended partition.\n", pn + 1);
return (CMD_CONT);
}
if (firstoff == 0)
firstoff = off;
if (!off) {
printf("Loop to offset 0! Not selected.\n");
return (CMD_CONT);
} else {
printf("Selected extended partition %d\n", pn + 1);
printf("New MBR at offset %d.\n", off);
}
/* Recursion is beautifull! */
USER_modify(disk, tt, off, firstoff);
return (CMD_CONT);
}
int
Xprint(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
DISK_printmetrics(disk);
printf("Offset: %d\t", offset);
MBR_print(mbr);
return (CMD_CONT);
}
int
Xwrite(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
int fd;
int shared = 0;
fd = DISK_openshared(disk->name, O_RDWR, &shared);
if(shared) {
if(!ask_yn("Device could not be accessed exclusively.\nA reboot will be needed for changes to take effect. OK?", 0)) {
close(fd);
printf("MBR unchanged\n");
return (CMD_CONT);
}
}
printf("Writing MBR at offset %d.\n", offset);
MBR_make(mbr);
MBR_write(disk, fd, mbr);
close(fd);
return (CMD_CLEAN);
}
int
Xquit(cmd, disk, r, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *r;
mbr_t *tt;
int offset;
{
/* Nothing to do here */
return (CMD_SAVE);
}
int
Xabort(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
exit(0);
/* NOTREACHED */
return (CMD_CONT);
}
int
Xexit(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
/* Nothing to do here */
return (CMD_EXIT);
}
int
Xhelp(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
cmd_table_t *cmd_table = cmd->table;
int i;
/* Hmm, print out cmd_table here... */
for (i = 0; cmd_table[i].cmd != NULL; i++)
printf("\t%s\t\t%s\n", cmd_table[i].cmd, cmd_table[i].help);
return (CMD_CONT);
}
int
Xupdate(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
extern char *mbr_binary;
/* Update code */
memcpy(mbr->code, mbr_binary, MBR_CODE_SIZE);
printf("Machine code updated.\n");
return (CMD_DIRTY);
}
int
Xflag(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
int i, pn = -1;
/* Parse partition table entry number */
if (!isdigit(cmd->args[0])) {
printf("Invalid argument: %s <partition number>\n", cmd->cmd);
return (CMD_CONT);
}
pn = atoi(cmd->args) - 1;
if (pn < 0 || pn > 3) {
printf("Invalid partition number.\n");
return (CMD_CONT);
}
/* Set active flag */
for (i = 0; i < 4; i++) {
if (i == pn)
mbr->part[i].flag = DOSACTIVE;
else
mbr->part[i].flag = 0x00;
}
printf("Partition %d marked active.\n", pn + 1);
return (CMD_DIRTY);
}
int
Xmanual(cmd, disk, mbr, tt, offset)
cmd_t *cmd;
disk_t *disk;
mbr_t *mbr;
mbr_t *tt;
int offset;
{
system("man 8 fdisk");
return (CMD_CONT);
}
branches/azimutz/Chazi/i386/util/fdisk/part.c
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* 2008-05-24:
* Tamas Kosarszky: changed caption for partition type 0x07
* and added caption for type 0xEE.
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <err.h>
#include <util.h>
#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <sys/fcntl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <machine/param.h>
#include "disk.h"
#include "misc.h"
#include "mbr.h"
static const struct part_type {
inttype;
charsname[14];
char*lname;
} part_types[] = {
{ 0x00, "unused ", "unused"},
{ 0x01, "DOS FAT-12 ", "Primary DOS with 12 bit FAT"},
{ 0x02, "XENIX / ", "XENIX / filesystem"},
{ 0x03, "XENIX /usr ", "XENIX /usr filesystem"},
{ 0x04, "DOS FAT-16 ", "Primary DOS with 16 bit FAT"},
{ 0x05, "Extended DOS", "Extended DOS"},
{ 0x06, "DOS > 32MB ", "Primary 'big' DOS (> 32MB)"},
{ 0x07, "NTFS ", "Windows NT NTFS"},
{ 0x08, "AIX fs ", "AIX filesystem"},
{ 0x09, "AIX/Coherent", "AIX boot partition or Coherent"},
{ 0x0A, "OS/2 Bootmgr", "OS/2 Boot Manager or OPUS"},
{ 0x0B, "Win95 FAT-32", "Primary Win95 w/ 32-bit FAT"},
{ 0x0C, "Win95 FAT32L", "Primary Win95 w/ 32-bit FAT LBA-mapped"},
{ 0x0E, "DOS FAT-16 ", "Primary DOS w/ 16-bit FAT, CHS-mapped"},
{ 0x0F, "Extended LBA", "Extended DOS LBA-mapped"},
{ 0x10, "OPUS ", "OPUS"},
{ 0x11, "OS/2 hidden ", "OS/2 BM: hidden DOS 12-bit FAT"},
{ 0x12, "Compaq Diag.", "Compaq Diagnostics"},
{ 0x14, "OS/2 hidden ", "OS/2 BM: hidden DOS 16-bit FAT <32M or Novell DOS 7.0 bug"},
{ 0x16, "OS/2 hidden ", "OS/2 BM: hidden DOS 16-bit FAT >=32M"},
{ 0x17, "OS/2 hidden ", "OS/2 BM: hidden IFS"},
{ 0x18, "AST swap ", "AST Windows swapfile"},
{ 0x19, "Willowtech ", "Willowtech Photon coS"},
{ 0x20, "Willowsoft ", "Willowsoft OFS1"},
{ 0x24, "NEC DOS ", "NEC DOS"},
{ 0x38, "Theos ", "Theos"},
{ 0x39, "Plan 9 ","Plan 9"},
{ 0x40, "VENIX 286 ", "VENIX 286 or LynxOS"},
{ 0x41, "Lin/Minux DR", "Linux/MINIX (sharing disk with DRDOS) or Personal RISC boot"},
{ 0x42, "LinuxSwap DR", "SFS or Linux swap (sharing disk with DRDOS)"},
{ 0x43, "Linux DR ", "Linux native (sharing disk with DRDOS)"},
{ 0x4D, "QNX 4.2 Pri ", "QNX 4.2 Primary"},
{ 0x4E, "QNX 4.2 Sec ", "QNX 4.2 Secondary"},
{ 0x4F, "QNX 4.2 Ter ", "QNX 4.2 Tertiary"},
{ 0x50, "DM ", "DM (disk manager)"},
{ 0x51, "DM ", "DM6 Aux1 (or Novell)"},
{ 0x52, "CP/M or SysV", "CP/M or Microport SysV/AT"},
{ 0x53, "DM ", "DM6 Aux3"},
{ 0x54, "Ontrack ", "Ontrack"},
{ 0x55, "EZ-Drive ", "EZ-Drive (disk manager)"},
{ 0x56, "Golden Bow ", "Golden Bow (disk manager)"},
{ 0x5C, "Priam ", "Priam Edisk (disk manager)"},
{ 0x61, "SpeedStor ", "SpeedStor"},
{ 0x63, "ISC, HURD, *", "ISC, System V/386, GNU HURD or Mach"},
{ 0x64, "Netware 2.xx", "Novell Netware 2.xx"},
{ 0x65, "Netware 3.xx", "Novell Netware 3.xx"},
{ 0x66, "Netware 386 ", "Novell 386 Netware"},
{ 0x67, "Novell ", "Novell"},
{ 0x68, "Novell ", "Novell"},
{ 0x69, "Novell ", "Novell"},
{ 0x70, "DiskSecure ", "DiskSecure Multi-Boot"},
{ 0x75, "PCIX ", "PCIX"},
{ 0x80, "Minix (old) ", "Minix 1.1 ... 1.4a"},
{ 0x81, "Minix (new) ", "Minix 1.4b ... 1.5.10"},
{ 0x82, "Linux swap ", "Linux swap"},
{ 0x83, "Linux files*", "Linux filesystem"},
{ 0x93, "Amoeba file*", "Amoeba filesystem"},
{ 0x94, "Amoeba BBT ", "Amoeba bad block table"},
{ 0x84, "OS/2 hidden ", "OS/2 hidden C: drive"},
{ 0x85, "Linux ext. ", "Linux extended"},
{ 0x86, "NT FAT VS ", "NT FAT volume set"},
{ 0x87, "NTFS VS ", "NTFS volume set or HPFS mirrored"},
{ 0x93, "Amoeba FS ", "Amoeba filesystem"},
{ 0x94, "Amoeba BBT ", "Amoeba bad block table"},
{ 0x99, "Mylex ", "Mylex EISA SCSI"},
{ 0x9F, "BSDI ", "BSDI BSD/OS"},
{ 0xA0, "NotebookSave", "Phoenix NoteBIOS save-to-disk"},
{ 0xA5, "FreeBSD ","FreeBSD"},
{ 0xA6, "OpenBSD ", "OpenBSD"},
{ 0xA7, "NEXTSTEP ", "NEXTSTEP"},
{ 0xA8, "Darwin UFS ","Darwin UFS partition"},
{ 0xA9, "NetBSD ","NetBSD"},
{ 0xAB, "Darwin Boot ","Darwin boot partition"},
{ 0xAF, "HFS+ ","Darwin HFS+ partition"},
{ 0xB7, "BSDI filesy*", "BSDI BSD/386 filesystem"},
{ 0xB8, "BSDI swap ", "BSDI BSD/386 swap"},
{ 0xC0, "CTOS ", "CTOS"},
{ 0xC1, "DRDOSs FAT12", "DRDOS/sec (FAT-12)"},
{ 0xC4, "DRDOSs < 32M", "DRDOS/sec (FAT-16, < 32M)"},
{ 0xC6, "DRDOSs >=32M", "DRDOS/sec (FAT-16, >= 32M)"},
{ 0xC7, "HPFS Disbled", "Syrinx (Cyrnix?) or HPFS disabled"},
{ 0xDB, "CPM/C.DOS/C*", "Concurrent CPM or C.DOS or CTOS"},
{ 0xE1, "SpeedStor ", "DOS access or SpeedStor 12-bit FAT extended partition"},
{ 0xE3, "SpeedStor ", "DOS R/O or SpeedStor or Storage Dimensions"},
{ 0xE4, "SpeedStor ", "SpeedStor 16-bit FAT extended partition < 1024 cyl."},
{ 0xEB, "BeOS/i386 ", "BeOS for Intel"},
{ 0xEE, "GPT ", "GPT protective partition"},
{ 0xF1, "SpeedStor ", "SpeedStor or Storage Dimensions"},
{ 0xF2, "DOS 3.3+ Sec", "DOS 3.3+ Secondary"},
{ 0xF4, "SpeedStor ", "SpeedStor >1024 cyl. or LANstep or IBM PS/2 IML"},
{ 0xFF, "Xenix BBT ", "Xenix Bad Block Table"},
};
void
PRT_printall()
{
int i, idrows;
idrows = ((sizeof(part_types)/sizeof(struct part_type))+3)/4;
printf("Choose from the following Partition id values:\n");
for (i = 0; i < idrows; i++) {
printf("%02X %s %02X %s %02X %s"
, part_types[i ].type, part_types[i ].sname
, part_types[i+idrows ].type, part_types[i+idrows ].sname
, part_types[i+idrows*2].type, part_types[i+idrows*2].sname
);
if ((i+idrows*3) < (sizeof(part_types)/sizeof(struct part_type))) {
printf(" %02X %s\n"
, part_types[i+idrows*3].type, part_types[i+idrows*3].sname );
}
else
printf( "\n" );
}
}
const char *
PRT_ascii_id(id)
int id;
{
static char unknown[] = "<Unknown ID>";
int i;
for (i = 0; i < sizeof(part_types)/sizeof(struct part_type); i++) {
if (part_types[i].type == id)
return (part_types[i].sname);
}
return (unknown);
}
void
PRT_parse(disk, prt, offset, reloff, partn, pn)
disk_t *disk;
void *prt;
off_t offset;
off_t reloff;
prt_t *partn;
int pn;
{
unsigned char *p = prt;
off_t off;
partn->flag = *p++;
partn->shead = *p++;
partn->ssect = (*p) & 0x3F;
partn->scyl = ((*p << 2) & 0xFF00) | (*(p+1));
p += 2;
partn->id = *p++;
partn->ehead = *p++;
partn->esect = (*p) & 0x3F;
partn->ecyl = ((*p << 2) & 0xFF00) | (*(p+1));
p += 2;
if ((partn->id == DOSPTYP_EXTEND) || (partn->id == DOSPTYP_EXTENDL))
off = reloff;
else
off = offset;
partn->bs = getlong(p) + off;
partn->ns = getlong(p+4);
/* Zero out entry if not used */
if (partn->id == DOSPTYP_UNUSED ) {
memset(partn, 0, sizeof(*partn));
}
}
int
PRT_check_chs(partn)
prt_t *partn;
{
if ( (partn->shead > 255) ||
(partn->ssect >63) ||
(partn->scyl > 1023) ||
(partn->ehead >255) ||
(partn->esect >63) ||
(partn->ecyl > 1023) )
{
return 0;
}
return 1;
}
void
PRT_make(partn, offset, reloff, prt)
prt_t *partn;
off_t offset;
off_t reloff;
void *prt;
{
unsigned char *p = prt;
prt_t tmp;
off_t off;
tmp.shead = partn->shead;
tmp.ssect = partn->ssect;
tmp.scyl = (partn->scyl > 1023)? 1023: partn->scyl;
tmp.ehead = partn->ehead;
tmp.esect = partn->esect;
tmp.ecyl = (partn->ecyl > 1023)? 1023: partn->ecyl;
if (!PRT_check_chs(partn) && PRT_check_chs(&tmp)) {
partn->shead = tmp.shead;
partn->ssect = tmp.ssect;
partn->scyl = tmp.scyl;
partn->ehead = tmp.ehead;
partn->esect = tmp.esect;
partn->ecyl = tmp.ecyl;
printf("Cylinder values are modified to fit in CHS.\n");
}
if ((partn->id == DOSPTYP_EXTEND) || (partn->id == DOSPTYP_EXTENDL))
off = reloff;
else
off = offset;
if (PRT_check_chs(partn)) {
*p++ = partn->flag & 0xFF;
*p++ = partn->shead & 0xFF;
*p++ = (partn->ssect & 0x3F) | ((partn->scyl & 0x300) >> 2);
*p++ = partn->scyl & 0xFF;
*p++ = partn->id & 0xFF;
*p++ = partn->ehead & 0xFF;
*p++ = (partn->esect & 0x3F) | ((partn->ecyl & 0x300) >> 2);
*p++ = partn->ecyl & 0xFF;
} else {
/* should this really keep flag, id and set others to 0xff? */
*p++ = partn->flag & 0xFF;
*p++ = 0xFF;
*p++ = 0xFF;
*p++ = 0xFF;
*p++ = partn->id & 0xFF;
*p++ = 0xFF;
*p++ = 0xFF;
*p++ = 0xFF;
printf("Warning CHS values out of bounds only saving LBA values\n");
}
putlong(p, partn->bs - off);
putlong(p+4, partn->ns);
}
void
PRT_print(num, partn)
int num;
prt_t *partn;
{
if (partn == NULL) {
printf(" Starting Ending\n");
printf(" #: id cyl hd sec - cyl hd sec [ start - size]\n");
printf("------------------------------------------------------------------------\n");
} else {
printf("%c%1d: %.2X %4d %3d %3d - %4d %3d %3d [%10d - %10d] %s\n",
(partn->flag == 0x80)?'*':' ',
num + 1, partn->id,
partn->scyl, partn->shead, partn->ssect,
partn->ecyl, partn->ehead, partn->esect,
partn->bs, partn->ns,
PRT_ascii_id(partn->id));
}
}
void
PRT_fix_BN(disk, part, pn)
disk_t *disk;
prt_t *part;
int pn;
{
int spt, tpc, spc;
int start = 0;
int end = 0;
/* Zero out entry if not used */
if (part->id == DOSPTYP_UNUSED ) {
memset(part, 0, sizeof(*part));
return;
}
/* Disk metrics */
spt = disk->real->sectors;
tpc = disk->real->heads;
spc = spt * tpc;
start += part->scyl * spc;
start += part->shead * spt;
start += part->ssect - 1;
end += part->ecyl * spc;
end += part->ehead * spt;
end += part->esect - 1;
/* XXX - Should handle this... */
if (start > end)
warn("Start of partition #%d after end!", pn);
part->bs = start;
part->ns = (end - start) + 1;
}
void
PRT_fix_CHS(disk, part, pn)
disk_t *disk;
prt_t *part;
int pn;
{
int spt, tpc, spc;
int start;
int cyl, head, sect;
/* Zero out entry if not used */
if (part->id == DOSPTYP_UNUSED ) {
memset(part, 0, sizeof(*part));
return;
}
/* Disk metrics */
spt = disk->real->sectors;
tpc = disk->real->heads;
spc = spt * tpc;
start = part->bs;
if(start <= spt) {
/* Figure out "real" starting CHS values */
cyl = (start / spc); start -= (cyl * spc);
head = (start / spt); start -= (head * spt);
sect = (start + 1);
} else {
cyl = 1023;
head = 254;
sect = 63;
}
part->scyl = cyl;
part->shead = head;
part->ssect = sect;
/* use fake geometry to trigger LBA mode */
cyl = 1023;
head = 254;
sect = 63;
part->ecyl = cyl;
part->ehead = head;
part->esect = sect;
}
branches/azimutz/Chazi/i386/util/fdisk/auto.c
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Auto partitioning code.
*/
#include <stdio.h>
#include <ctype.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <err.h>
#include "disk.h"
#include "mbr.h"
#include "auto.h"
int AUTO_boothfs __P((disk_t *, mbr_t *));
int AUTO_bootufs __P((disk_t *, mbr_t *));
int AUTO_hfs __P((disk_t *, mbr_t *));
int AUTO_ufs __P((disk_t *, mbr_t *));
int AUTO_dos __P((disk_t *, mbr_t *));
int AUTO_raid __P((disk_t *, mbr_t *));
/* The default style is the first one in the list */
struct _auto_style {
char *style_name;
int (*style_fn)(disk_t *, mbr_t *);
char *description;
} style_fns[] = {
{"boothfs", AUTO_boothfs, "8Mb boot plus HFS+ root partition"},
{"bootufs", AUTO_bootufs, "8Mb boot plus UFS root partition"},
{"hfs", AUTO_hfs, "Entire disk as one HFS+ partition"},
{"ufs", AUTO_ufs, "Entire disk as one UFS partition"},
{"dos", AUTO_dos, "Entire disk as one DOS partition"},
{"raid", AUTO_raid, "Entire disk as one 0xAC partition"},
{0,0}
};
void
AUTO_print_styles(FILE *f)
{
struct _auto_style *fp;
int i;
for (i=0, fp = &style_fns[0]; fp->style_name != NULL; i++, fp++) {
fprintf(f, " %-10s %s%s\n", fp->style_name, fp->description, (i==0) ? " (default)" : "");
}
}
int
AUTO_init(disk_t *disk, char *style, mbr_t *mbr)
{
struct _auto_style *fp;
for (fp = &style_fns[0]; fp->style_name != NULL; fp++) {
/* If style is NULL, use the first (default) style */
if (style == NULL || strcasecmp(style, fp->style_name) == 0) {
return (*fp->style_fn)(disk, mbr);
}
}
warnx("No such auto-partition style %s", style);
return AUTO_ERR;
}
static int
use_whole_disk(disk_t *disk, unsigned char id, mbr_t *mbr)
{
MBR_clear(mbr);
mbr->part[0].id = id;
mbr->part[0].bs = 63;
mbr->part[0].ns = disk->real->size - 63;
PRT_fix_CHS(disk, &mbr->part[0], 0);
return AUTO_OK;
}
/* DOS style: one partition for the whole disk */
int
AUTO_dos(disk_t *disk, mbr_t *mbr)
{
int cc;
cc = use_whole_disk(disk, 0x0C, mbr);
if (cc == AUTO_OK) {
mbr->part[0].flag = DOSACTIVE;
}
return cc;
}
/* HFS style: one partition for the whole disk */
int
AUTO_hfs(disk_t *disk, mbr_t *mbr)
{
int cc;
cc = use_whole_disk(disk, 0xAF, mbr);
if (cc == AUTO_OK) {
mbr->part[0].flag = DOSACTIVE;
}
return cc;
}
/* UFS style: one partition for the whole disk */
int
AUTO_ufs(disk_t *disk, mbr_t *mbr)
{
int cc;
cc = use_whole_disk(disk, 0xA8, mbr);
if (cc == AUTO_OK) {
mbr->part[0].flag = DOSACTIVE;
}
return cc;
}
/* One boot partition, one HFS+ root partition */
int
AUTO_boothfs (disk_t *disk, mbr_t *mbr)
{
/* Check disk size. */
if (disk->real->size < 16 * 2048) {
errx(1, "Disk size must be greater than 16Mb");
return AUTO_ERR;
}
MBR_clear(mbr);
/* 8MB boot partition */
mbr->part[0].id = 0xAB;
mbr->part[0].bs = 63;
mbr->part[0].ns = 8 * 1024 * 2;
mbr->part[0].flag = DOSACTIVE;
PRT_fix_CHS(disk, &mbr->part[0], 0);
/* Rest of the disk for rooting */
mbr->part[1].id = 0xAF;
mbr->part[1].bs = (mbr->part[0].bs + mbr->part[0].ns);
mbr->part[1].ns = disk->real->size - mbr->part[0].ns - 63;
PRT_fix_CHS(disk, &mbr->part[1], 1);
return AUTO_OK;
}
/* One boot partition, one UFS root partition */
int
AUTO_bootufs(disk_t *disk, mbr_t *mbr)
{
/* Check disk size. */
if (disk->real->size < 16 * 2048) {
errx(1, "Disk size must be greater than 16Mb");
return AUTO_ERR;
}
MBR_clear(mbr);
/* 8MB boot partition */
mbr->part[0].id = 0xAB;
mbr->part[0].bs = 63;
mbr->part[0].ns = 8 * 1024 * 2;
mbr->part[0].flag = DOSACTIVE;
PRT_fix_CHS(disk, &mbr->part[0], 0);
/* Rest of the disk for rooting */
mbr->part[1].id = 0xA8;
mbr->part[1].bs = (mbr->part[0].bs + mbr->part[0].ns);
mbr->part[1].ns = disk->real->size - mbr->part[0].ns - 63;
PRT_fix_CHS(disk, &mbr->part[1], 1);
return AUTO_OK;
}
/* RAID style: one 0xAC partition for the whole disk */
int
AUTO_raid(disk_t *disk, mbr_t *mbr)
{
return use_whole_disk(disk, 0xAC, mbr);
}
branches/azimutz/Chazi/i386/util/fdisk/cmd.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _CMD_H
#define _CMD_H
/* Includes */
#include "disk.h"
#include "mbr.h"
/* Constants (returned by cmd funs) */
#define CMD_EXIT0x0000
#define CMD_SAVE0x0001
#define CMD_CONT0x0002
#define CMD_CLEAN0x0003
#define CMD_DIRTY0x0004
/* Data types */
struct _cmd_table_t;
typedef struct _cmd_t {
struct _cmd_table_t *table;
char cmd[10];
char args[100];
} cmd_t;
typedef struct _cmd_table_t {
char *cmd;
int (*fcn)(cmd_t *, disk_t *, mbr_t *, mbr_t *, int);
char *help;
} cmd_table_t;
/* Prototypes */
int Xerase __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xreinit __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xauto __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xdisk __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xmanual __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xedit __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xsetpid __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xselect __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xprint __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xwrite __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xexit __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xquit __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xabort __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xhelp __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xflag __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
int Xupdate __P((cmd_t *, disk_t *, mbr_t *, mbr_t *, int));
#endif /* _CMD_H */
branches/azimutz/Chazi/i386/util/fdisk/part.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _PART_H
#define _PART_H
/* Partition type */
typedef struct _prt_t {
int shead, scyl, ssect;
int ehead, ecyl, esect;
int bs;
int ns;
unsigned char flag;
unsigned char id;
} prt_t;
/* Prototypes */
voidPRT_printall __P((void));
const char *PRT_ascii_id __P((int));
void PRT_parse __P((disk_t *, void *, off_t, off_t, prt_t *, int));
void PRT_make __P((prt_t *, off_t, off_t, void *));
void PRT_print __P((int, prt_t *));
/* This does CHS -> bs/ns */
void PRT_fix_BN __P((disk_t *, prt_t *, int));
/* This does bs/ns -> CHS */
void PRT_fix_CHS __P((disk_t *, prt_t *, int));
#endif /* _PART_H */
branches/azimutz/Chazi/i386/util/fdisk/auto.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
#include "mbr.h"
/* Prototypes */
void AUTO_print_styles __P((FILE *));
int AUTO_init __P((disk_t *, char *, mbr_t *));
#define AUTO_OK 0
#define AUTO_ERR -1
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <err.h>
#include <util.h>
#include <stdio.h>
#include <unistd.h>
#include <string.h>
#include <sys/fcntl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <machine/param.h>
#include "user.h"
#include "disk.h"
#include "misc.h"
#include "mbr.h"
#include "cmd.h"
/* Our command table */
static cmd_table_t cmd_table[] = {
{"help", Xhelp,"Command help list"},
{"manual", Xmanual,"Show entire man page for fdisk"},
{"reinit", Xreinit,"Re-initialize loaded MBR (to defaults)"},
{"auto", Xauto, "Auto-partition the disk with a partition style"},
{"setpid", Xsetpid,"Set the identifier of a given table entry"},
{"disk", Xdisk,"Edit current drive stats"},
{"edit", Xedit,"Edit given table entry"},
{"erase", Xerase, "Erase current MBR"},
{"flag", Xflag,"Flag given table entry as bootable"},
{"update", Xupdate,"Update machine code in loaded MBR"},
{"select", Xselect,"Select extended partition table entry MBR"},
{"print", Xprint,"Print loaded MBR partition table"},
{"write", Xwrite,"Write loaded MBR to disk"},
{"exit", Xexit,"Exit edit of current MBR, without saving changes"},
{"quit", Xquit,"Quit edit of current MBR, saving current changes"},
{"abort", Xabort,"Abort program without saving current changes"},
{NULL, NULL,NULL}
};
int
USER_write(disk, tt, preserve, force)
disk_t *disk;
mbr_t *tt; /* Template MBR to write */
int preserve; /* Preserve partition table and just write boot code */
int force; /* Don't ask any questions */
{
int fd, yn;
char *msgp = "\nDo you wish to write new MBR?";
char *msgk = "\nDo you wish to write new MBR and partition table?";
/* Write sector 0 */
if (force) {
yn = 1;
} else {
printf("\a\n"
"\t-----------------------------------------------------\n"
"\t------ ATTENTION - UPDATING MASTER BOOT RECORD ------\n"
"\t-----------------------------------------------------\n");
if (preserve)
yn = ask_yn(msgp, 0);
else
yn = ask_yn(msgk, 0);
}
if (yn) {
if (preserve) {
int shared;
/* Only write the first one, if there's more than one in an extended partition chain */
/* Since we're updating boot code, we don't require exclusive access */
fd = DISK_openshared(disk->name, O_RDWR, &shared);
MBR_make(tt);
MBR_write(disk, fd, tt);
DISK_close(fd);
} else {
MBR_write_all(disk, tt);
}
} else {
printf("MBR is unchanged\n");
}
return (0);
}
int
USER_modify(disk, tt, offset, reloff)
disk_t *disk;
mbr_t *tt;
off_t offset;
off_t reloff;
{
static int editlevel;
mbr_t *mbr;
cmd_t cmd;
int i, st, fd;
int modified = 0;
/* One level deeper */
editlevel += 1;
/* Set up command table pointer */
cmd.table = cmd_table;
/* Read MBR & partition */
mbr = MBR_alloc(NULL);
fd = DISK_open(disk->name, O_RDONLY);
MBR_read(disk, fd, offset, mbr);
DISK_close(fd);
/* Parse the sucker */
MBR_parse(disk, offset, reloff, mbr);
if (mbr->signature != MBR_SIGNATURE) {
int yn = ask_yn("The signature for this MBR is invalid.\nWould you like to initialize the partition table?", 1);
if (yn) {
strcpy(cmd.cmd, "erase");
cmd.args[0] = '\0';
st = Xerase(&cmd, disk, mbr, tt, offset);
modified = 1;
}
}
printf("Enter 'help' for information\n");
/* Edit cycle */
do {
again:
printf("fdisk:%c%d> ", (modified)?'*':' ', editlevel);
fflush(stdout);
ask_cmd(&cmd);
if (cmd.cmd[0] == '\0')
goto again;
for (i = 0; cmd_table[i].cmd != NULL; i++)
if (strstr(cmd_table[i].cmd, cmd.cmd)==cmd_table[i].cmd)
break;
/* Quick hack to put in '?' == 'help' */
if (!strcmp(cmd.cmd, "?"))
i = 0;
/* Check for valid command */
if (cmd_table[i].cmd == NULL) {
printf("Invalid command '%s'. Try 'help'.\n", cmd.cmd);
continue;
} else
strcpy(cmd.cmd, cmd_table[i].cmd);
/* Call function */
st = cmd_table[i].fcn(&cmd, disk, mbr, tt, offset);
/* Update status */
if (st == CMD_EXIT)
break;
if (st == CMD_SAVE)
break;
if (st == CMD_CLEAN)
modified = 0;
if (st == CMD_DIRTY)
modified = 1;
} while (1);
/* Write out MBR */
if (modified) {
if (st == CMD_SAVE) {
int shared = 0;
printf("Writing current MBR to disk.\n");
fd = DISK_openshared(disk->name, O_RDWR, &shared);
if(shared) {
if(!ask_yn("Device could not be accessed exclusively.\nA reboot will be needed for changes to take effect. OK?", 0)) {
close(fd);
goto again;
}
}
MBR_make(mbr);
MBR_write(disk, fd, mbr);
close(fd);
} else {
int yn = ask_yn("MBR was modified; really quit without saving?", 0);
if (yn) {
printf("Aborting changes to current MBR.\n");
} else {
goto again;
}
}
}
/* One level less */
editlevel -= 1;
MBR_free(mbr);
return (0);
}
int
USER_print_disk(disk, do_dump)
disk_t *disk;
int do_dump;
{
int fd, offset, firstoff;
mbr_t *mbr;
fd = DISK_open(disk->name, O_RDONLY);
offset = firstoff = 0;
if (!do_dump)
DISK_printmetrics(disk);
mbr = MBR_read_all(disk);
if (do_dump)
MBR_dump_all(mbr);
else
MBR_print_all(mbr);
MBR_free(mbr);
return (DISK_close(fd));
}
branches/azimutz/Chazi/i386/util/fdisk/mbr.c
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/*
* Copyright (c) 2002, 2005 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <err.h>
#include <util.h>
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <ctype.h>
#include <memory.h>
#include <sys/fcntl.h>
#include <sys/ioctl.h>
#include <sys/types.h>
#include <sys/stat.h>
#if 0
#include <sys/dkio.h>
#endif
#include <machine/param.h>
#include "disk.h"
#include "misc.h"
#include "mbr.h"
#include "part.h"
void
MBR_init(disk, mbr)
disk_t *disk;
mbr_t *mbr;
{
/* Fix up given mbr for this disk */
mbr->part[0].flag = 0;
mbr->part[1].flag = 0;
mbr->part[2].flag = 0;
#if !defined(DOSPTYP_OPENBSD)
mbr->part[3].flag = 0;
mbr->signature = MBR_SIGNATURE;
#else
mbr->part[3].flag = DOSACTIVE;
mbr->signature = DOSMBR_SIGNATURE;
/* Use whole disk, save for first head, on first cyl. */
mbr->part[3].id = DOSPTYP_OPENBSD;
mbr->part[3].scyl = 0;
mbr->part[3].shead = 1;
mbr->part[3].ssect = 1;
/* Go right to the end */
mbr->part[3].ecyl = disk->real->cylinders - 1;
mbr->part[3].ehead = disk->real->heads - 1;
mbr->part[3].esect = disk->real->sectors;
/* Fix up start/length fields */
PRT_fix_BN(disk, &mbr->part[3], 3);
#if defined(__powerpc__) || defined(__mips__)
/* Now fix up for the MS-DOS boot partition on PowerPC. */
mbr->part[0].flag = DOSACTIVE;/* Boot from dos part */
mbr->part[3].flag = 0;
mbr->part[3].ns += mbr->part[3].bs;
mbr->part[3].bs = mbr->part[0].bs + mbr->part[0].ns;
mbr->part[3].ns -= mbr->part[3].bs;
PRT_fix_CHS(disk, &mbr->part[3], 3);
if ((mbr->part[3].shead != 1) || (mbr->part[3].ssect != 1)) {
/* align the partition on a cylinder boundary */
mbr->part[3].shead = 0;
mbr->part[3].ssect = 1;
mbr->part[3].scyl += 1;
}
/* Fix up start/length fields */
PRT_fix_BN(disk, &mbr->part[3], 3);
#endif
#endif
}
void
MBR_parse(disk, offset, reloff, mbr)
disk_t *disk;
off_t offset;
off_t reloff;
mbr_t *mbr;
{
int i;
unsigned char *mbr_buf = mbr->buf;
memcpy(mbr->code, mbr_buf, MBR_CODE_SIZE);
mbr->offset = offset;
mbr->reloffset = reloff;
mbr->signature = getshort(&mbr_buf[MBR_SIG_OFF]);
for (i = 0; i < NDOSPART; i++)
PRT_parse(disk, &mbr_buf[MBR_PART_OFF + MBR_PART_SIZE * i],
offset, reloff, &mbr->part[i], i);
}
void
MBR_make(mbr)
mbr_t *mbr;
{
int i;
unsigned char *mbr_buf = mbr->buf;
memcpy(mbr_buf, mbr->code, MBR_CODE_SIZE);
putshort(&mbr_buf[MBR_SIG_OFF], mbr->signature);
for (i = 0; i < NDOSPART; i++)
PRT_make(&mbr->part[i], mbr->offset, mbr->reloffset,
&mbr_buf[MBR_PART_OFF + MBR_PART_SIZE * i]);
}
void
MBR_print(mbr)
mbr_t *mbr;
{
int i;
/* Header */
printf("Signature: 0x%X\n",
(int)mbr->signature);
PRT_print(0, NULL);
/* Entries */
for (i = 0; i < NDOSPART; i++)
PRT_print(i, &mbr->part[i]);
}
int
MBR_read(disk, fd, where, mbr)
disk_t *disk;
int fd;
off_t where;
mbr_t *mbr;
{
off_t off;
int len;
int size;
unsigned char *buf = mbr->buf;
size = disk->real->sector_size;
where *= size;
off = lseek(fd, where, SEEK_SET);
if (off != where)
return (off);
len = read(fd, buf, size);
if (len != size)
return (len);
return (0);
}
int
MBR_write(disk, fd, mbr)
disk_t *disk;
int fd;
mbr_t *mbr;
{
off_t off;
int len;
int size;
unsigned char *buf = mbr->buf;
off_t where;
size = disk->real->sector_size;
where = mbr->offset * size;
off = lseek(fd, where, SEEK_SET);
if (off != where)
return (off);
len = write(fd, buf, size);
if (len != size)
return (len);
#if defined(DIOCRLDINFO)
(void) ioctl(fd, DIOCRLDINFO, 0);
#endif
return (0);
}
void
MBR_pcopy(disk, mbr)
disk_t *disk;
mbr_t *mbr;
{
/*
* Copy partition table from the disk indicated
* to the supplied mbr structure
*/
int i, fd, offset = 0, reloff = 0;
mbr_t *mbrd;
mbrd = MBR_alloc(NULL);
fd = DISK_open(disk->name, O_RDONLY);
MBR_read(disk, fd, offset, mbrd);
DISK_close(fd);
MBR_parse(disk, offset, reloff, mbrd);
for (i = 0; i < NDOSPART; i++) {
PRT_parse(disk, &mbrd->buf[MBR_PART_OFF +
MBR_PART_SIZE * i],
offset, reloff, &mbr->part[i], i);
PRT_print(i, &mbr->part[i]);
}
MBR_free(mbrd);
}
static int
parse_number(char *str, int default_val, int base) {
if (str != NULL && *str != '\0') {
default_val = strtol(str, NULL, base);
}
return default_val;
}
static inline int
null_arg(char *arg) {
if (arg == NULL || *arg == 0)
return 1;
else
return 0;
}
/* Parse a partition spec into a partition structure.
* Spec is of the form:
* <start>,<size>,<id>,<bootable>[,<c,h,s>,<c,h,s>]
* We require passing in the disk and mbr so we can
* set reasonable defaults for values, e.g. "the whole disk"
* or "starting after the last partition."
*/
#define N_ARGS 10
static int
MBR_parse_one_spec(char *line, disk_t *disk, mbr_t *mbr, int pn)
{
int i;
char *args[N_ARGS];
prt_t *part = &mbr->part[pn];
int next_start, next_size;
/* There are up to 10 arguments. */
for (i=0; i<N_ARGS; i++) {
char *arg;
while (isspace(*line))
line++;
arg = strsep(&line, ",\n");
if (arg == NULL || line == NULL) {
break;
}
args[i] = arg;
}
for (; i<N_ARGS; i++) {
args[i] = NULL;
}
/* Set reasonable defaults. */
if (pn == 0) {
next_start = 0;
} else {
next_start = mbr->part[pn-1].bs + mbr->part[pn-1].ns;
}
next_size = disk->real->size;
for(i=0; i<pn; i++) {
next_size -= mbr->part[i].ns;
}
part->id = parse_number(args[2], 0xA8, 16);
if (!null_arg(args[3]) && *args[3] == '*') {
part->flag = 0x80;
} else {
part->flag = 0;
}
/* If you specify the start or end sector,
you have to give both. */
if ((null_arg(args[0]) && !null_arg(args[1])) ||
(!null_arg(args[0]) && null_arg(args[1]))) {
errx(1, "You must specify both start and size, or neither");
return -1;
}
/* If you specify one of the CHS args,
you have to give them all. */
if (!null_arg(args[4])) {
for (i=5; i<10; i++) {
if (null_arg(args[i])) {
errx(1, "Either all CHS arguments must be specified, or none");
return -1;
}
}
part->scyl = parse_number(args[4], 0, 10);
part->shead = parse_number(args[5], 0, 10);
part->ssect = parse_number(args[6], 0, 10);
part->scyl = parse_number(args[7], 0, 10);
part->shead = parse_number(args[8], 0, 10);
part->ssect = parse_number(args[9], 0, 10);
if (null_arg(args[0])) {
PRT_fix_BN(disk, part, pn);
}
} else {
/* See if they gave no CHS and no start/end */
if (null_arg(args[0])) {
errx(1, "You must specify either start sector and size or CHS");
return -1;
}
}
if (!null_arg(args[0])) {
part->bs = parse_number(args[0], next_start, 10);
part->ns = parse_number(args[1], next_size, 10);
PRT_fix_CHS(disk, part, pn);
}
return 0;
}
typedef struct _mbr_chain {
mbr_t mbr;
struct _mbr_chain *next;
} mbr_chain_t;
/* Parse some number of MBR spec lines.
* Spec is of the form:
* <start>,<size>,<id>,<bootable>[,<c,h,s>,<c,h,s>]
*
*/
mbr_t *
MBR_parse_spec(FILE *f, disk_t *disk)
{
int lineno;
int offset, firstoffset;
mbr_t *mbr, *head, *prev_mbr;
head = mbr = prev_mbr = NULL;
firstoffset = 0;
do {
offset = 0;
for (lineno = 0; lineno < NDOSPART && !feof(f); lineno++) {
char line[256];
char *str;
prt_t *part;
do {
str = fgets(line, 256, f);
} while ((str != NULL) && (*str == '\0'));
if (str == NULL) {
break;
}
if (mbr == NULL) {
mbr = MBR_alloc(prev_mbr);
if (head == NULL)
head = mbr;
}
if (MBR_parse_one_spec(line, disk, mbr, lineno)) {
/* MBR_parse_one_spec printed the error message. */
return NULL;
}
part = &mbr->part[lineno];
if ((part->id == DOSPTYP_EXTEND) || (part->id == DOSPTYP_EXTENDL)) {
offset = part->bs;
if (firstoffset == 0) firstoffset = offset;
}
}
/* If fewer lines than partitions, zero out the rest of the partitions */
if (mbr != NULL) {
for (; lineno < NDOSPART; lineno++) {
bzero(&mbr->part[lineno], sizeof(prt_t));
}
}
prev_mbr = mbr;
mbr = NULL;
} while (offset >= 0 && !feof(f));
return head;
}
void
MBR_dump(mbr_t *mbr)
{
int i;
prt_t *part;
for (i=0; i<NDOSPART; i++) {
part = &mbr->part[i];
printf("%d,%d,0x%02X,%c,%d,%d,%d,%d,%d,%d\n",
part->bs,
part->ns,
part->id,
(part->flag == 0x80) ? '*' : '-',
part->scyl,
part->shead,
part->ssect,
part->ecyl,
part->ehead,
part->esect);
}
}
mbr_t *
MBR_alloc(mbr_t *parent)
{
mbr_t *mbr = (mbr_t *)malloc(sizeof(mbr_t));
bzero(mbr, sizeof(mbr_t));
if (parent) {
parent->next = mbr;
}
mbr->signature = MBR_SIGNATURE;
return mbr;
}
void
MBR_free(mbr_t *mbr)
{
mbr_t *tmp;
while (mbr) {
tmp = mbr->next;
free(mbr);
mbr = tmp;
}
}
/* Read and parse all the partition tables on the disk,
* including extended partitions.
*/
mbr_t *
MBR_read_all(disk_t *disk)
{
mbr_t *mbr = NULL, *head = NULL;
int i, fd, offset, firstoff;
fd = DISK_open(disk->name, O_RDONLY);
firstoff = offset = 0;
do {
mbr = MBR_alloc(mbr);
if (head == NULL) {
head = mbr;
}
MBR_read(disk, fd, offset, mbr);
MBR_parse(disk, offset, firstoff, mbr);
if (mbr->signature != MBR_SIGNATURE) {
/* The MBR signature is invalid. */
break;
}
offset = 0;
for (i=0; i<NDOSPART; i++) {
prt_t *part = &mbr->part[i];
if ((part->id == DOSPTYP_EXTEND) || (part->id == DOSPTYP_EXTENDL)) {
offset = part->bs;
if (firstoff == 0) {
firstoff = offset;
}
}
}
} while (offset > 0);
DISK_close(fd);
return head;
}
int
MBR_write_all(disk_t *disk, mbr_t *mbr)
{
int result = 0;
int fd;
fd = DISK_open(disk->name, O_RDWR);
while (mbr) {
MBR_make(mbr);
result = MBR_write(disk, fd, mbr);
if (result)
break;
mbr = mbr->next;
}
DISK_close(fd);
return result;
}
void
MBR_print_all(mbr_t *mbr) {
while (mbr) {
MBR_print(mbr);
mbr = mbr->next;
}
}
void
MBR_dump_all(mbr_t *mbr) {
while (mbr) {
MBR_dump(mbr);
mbr = mbr->next;
}
}
void
MBR_clear(mbr_t *mbr) {
int i;
if (mbr->next) {
MBR_free(mbr->next);
mbr->next = NULL;
}
for (i=0; i<4; i++) {
bzero(&mbr->part[i], sizeof(mbr->part[i]));
}
bzero(&mbr->buf, sizeof(mbr->buf));
}
branches/azimutz/Chazi/i386/util/fdisk/mbrcode.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 2000 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Largely generated by:
* hexdump -ve '8/1 "0x%02x, " "\n"' /usr/mdec/mbr
*/
0xfa, 0xea, 0x06, 0x00, 0xc0, 0x07, 0x8c, 0xc8,
0x8e, 0xd8, 0x8e, 0xd0, 0xbc, 0xfc, 0xff, 0xfb,
0xb0, 0x53, 0xe8, 0xe2, 0x00, 0xb8, 0xa0, 0x07,
0x8e, 0xc0, 0x31, 0xf6, 0x31, 0xff, 0xb9, 0x00,
0x02, 0xfc, 0xf2, 0xa4, 0xea, 0x29, 0x00, 0xa0,
0x07, 0xb0, 0x52, 0xe8, 0xc9, 0x00, 0x1e, 0x07,
0x0e, 0x1f, 0xf6, 0xc2, 0x80, 0x75, 0x0b, 0x66,
0xbe, 0x13, 0x01, 0x00, 0x00, 0xe8, 0xab, 0x00,
0xb2, 0x80, 0x66, 0xbe, 0xbe, 0x01, 0x00, 0x00,
0x66, 0xb9, 0x04, 0x00, 0x00, 0x00, 0xb0, 0x4c,
0xe8, 0xa4, 0x00, 0x8a, 0x44, 0x00, 0x3c, 0x80,
0x74, 0x18, 0x66, 0x83, 0xc6, 0x10, 0xe2, 0xee,
0x66, 0xbe, 0x3c, 0x01, 0x00, 0x00, 0xe8, 0x82,
0x00, 0xfa, 0xf4, 0xb0, 0x2e, 0xe8, 0x87, 0x00,
0xeb, 0xf7, 0xb0, 0x42, 0xe8, 0x80, 0x00, 0x8b,
0x14, 0x8b, 0x4c, 0x02, 0x66, 0xb8, 0x01, 0x02,
0x00, 0x00, 0x31, 0xdb, 0xcd, 0x13, 0x73, 0x13,
0x80, 0xfa, 0x80, 0x75, 0xaa, 0x66, 0xbe, 0x2f,
0x01, 0x00, 0x00, 0xe8, 0x55, 0x00, 0xe8, 0x33,
0x00, 0xeb, 0xce, 0xb0, 0x43, 0xe8, 0x57, 0x00,
0x66, 0x31, 0xc0, 0x66, 0xbb, 0xfe, 0x01, 0x00,
0x00, 0x67, 0x8b, 0x03, 0x66, 0x3d, 0x55, 0xaa,
0x00, 0x00, 0x74, 0x0b, 0x66, 0xbe, 0x52, 0x01,
0x00, 0x00, 0xe8, 0x2e, 0x00, 0xeb, 0xaa, 0xb0,
0x47, 0xe8, 0x33, 0x00, 0x66, 0xea, 0x00, 0x7c,
0x00, 0x00, 0x00, 0x00, 0x50, 0x53, 0x66, 0xbb,
0x03, 0x01, 0x00, 0x00, 0x50, 0x88, 0xe0, 0x66,
0x83, 0xe0, 0x0f, 0xd7, 0xe8, 0x18, 0x00, 0x58,
0x66, 0x83, 0xe0, 0x0f, 0xd7, 0xe8, 0x0f, 0x00,
0x5b, 0x58, 0xc3, 0x50, 0xfc, 0xac, 0x84, 0xc0,
0x74, 0x0f, 0xe8, 0x02, 0x00, 0xeb, 0xf6, 0x50,
0x53, 0xb4, 0x0e, 0x31, 0xdb, 0x43, 0xcd, 0x10,
0x5b, 0x58, 0xc3, 0x30, 0x31, 0x32, 0x33, 0x34,
0x35, 0x36, 0x37, 0x38, 0x39, 0x41, 0x42, 0x43,
0x44, 0x45, 0x46, 0x4d, 0x42, 0x52, 0x20, 0x6f,
0x6e, 0x20, 0x66, 0x6c, 0x6f, 0x70, 0x70, 0x79,
0x20, 0x6f, 0x72, 0x20, 0x6f, 0x6c, 0x64, 0x20,
0x42, 0x49, 0x4f, 0x53, 0x0d, 0x0a, 0x00, 0x52,
0x65, 0x61, 0x64, 0x20, 0x65, 0x72, 0x72, 0x6f,
0x72, 0x0d, 0x0a, 0x00, 0x4e, 0x6f, 0x20, 0x61,
0x63, 0x74, 0x69, 0x76, 0x65, 0x20, 0x70, 0x61,
0x72, 0x74, 0x69, 0x74, 0x69, 0x6f, 0x6e, 0x0d,
0x0a, 0x00, 0x49, 0x6e, 0x76, 0x61, 0x6c, 0x69,
0x64, 0x20, 0x53, 0x69, 0x67, 0x6e, 0x61, 0x74,
0x75, 0x72, 0x65, 0x0d, 0x0a, 0x00, 0x90, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
0x01, 0x00, 0xa6, 0xff, 0xff, 0xff, 0x00, 0x00,
0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, 0x55, 0xaa,
branches/azimutz/Chazi/i386/util/fdisk/util.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*-
* Copyright (c) 1995
*The Regents of the University of California. All rights reserved.
* Portions Copyright (c) 1996, Jason Downs. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
*This product includes software developed by the University of
*California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef _UTIL_H_
#define _UTIL_H_
#include <sys/cdefs.h>
#include <sys/types.h>
/*
* fparseln() specific operation flags.
*/
#define FPARSELN_UNESCESC0x01
#define FPARSELN_UNESCCONT0x02
#define FPARSELN_UNESCCOMM0x04
#define FPARSELN_UNESCREST0x08
#define FPARSELN_UNESCALL0x0f
/*
* opendev() specific operation flags.
*/
#define OPENDEV_PART0x01/* Try to open the raw partition. */
#define OPENDEV_DRCT0x02/* Obsolete (now default behavior). */
#define OPENDEV_BLCK0x04/* Open block, not character device. */
/*
* uucplock(3) specific flags.
*/
#define UU_LOCK_INUSE (1)
#define UU_LOCK_OK (0)
#define UU_LOCK_OPEN_ERR (-1)
#define UU_LOCK_READ_ERR (-2)
#define UU_LOCK_CREAT_ERR (-3)
#define UU_LOCK_WRITE_ERR (-4)
#define UU_LOCK_LINK_ERR (-5)
#define UU_LOCK_TRY_ERR (-6)
#define UU_LOCK_OWNER_ERR (-7)
/*
* stub struct definitions.
*/
struct __sFILE;
struct login_cap;
struct passwd;
struct termios;
struct winsize;
__BEGIN_DECLS
char *fparseln __P((struct __sFILE *, size_t *, size_t *, const char[3], int));
intlogin_tty __P((int));
intlogout __P((const char *));
voidlogwtmp __P((const char *, const char *, const char *));
intopendev __P((char *, int, int, char **));
intpidfile __P((const char *));
voidpw_setdir __P((const char *));
char *pw_file __P((const char *));
intpw_lock __P((int retries));
intpw_mkdb __P((char *, int));
intpw_abort __P((void));
voidpw_init __P((void));
voidpw_edit __P((int, const char *));
voidpw_prompt __P((void));
voidpw_copy __P((int, int, struct passwd *));
voidpw_getconf __P((char *, size_t, const char *, const char *));
intpw_scan __P((char *, struct passwd *, int *));
voidpw_error __P((const char *, int, int));
intopenpty __P((int *, int *, char *, struct termios *,
struct winsize *));
intopendisk __P((const char *path, int flags, char *buf, size_t buflen,
int iscooked));
pid_tforkpty __P((int *, char *, struct termios *, struct winsize *));
intgetmaxpartitions __P((void));
intgetrawpartition __P((void));
voidlogin_fbtab __P((char *, uid_t, gid_t));
intlogin_check_expire __P((struct __sFILE *, struct passwd *, char *, int));
char *readlabelfs __P((char *, int));
const char *uu_lockerr __P((int _uu_lockresult));
int uu_lock __P((const char *_ttyname));
intuu_lock_txfr __P((const char *_ttyname, pid_t _pid));
int uu_unlock __P((const char *_ttyname));
__END_DECLS
#endif /* !_UTIL_H_ */
branches/azimutz/Chazi/i386/util/fdisk/user.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _USER_H
#define _USER_H
#include "disk.h"
#include "mbr.h"
/* Prototypes */
int USER_write __P((disk_t *, mbr_t *, int, int));
int USER_modify __P((disk_t *, mbr_t *, off_t, off_t));
int USER_print_disk __P((disk_t *, int));
#endif /* _USER_H */
branches/azimutz/Chazi/i386/util/fdisk/getrawpartition.c
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
#if defined(LIBC_SCCS) && !defined(lint)
__RCSID("$NetBSD: getrawpartition.c,v 1.4 1999/07/02 15:49:12 simonb Exp $");
#endif
#include <sys/param.h>
#include <sys/sysctl.h>
#include <util.h>
int
getrawpartition()
{
#if 0
int rawpart, mib[2];
size_t varlen;
mib[0] = CTL_KERN;
mib[1] = KERN_RAWPARTITION;
varlen = sizeof(rawpart);
if (sysctl(mib, 2, &rawpart, &varlen, NULL, 0) < 0)
return (-1);
return (rawpart);
#else
return 0 - 'a';
#endif
}
branches/azimutz/Chazi/i386/util/fdisk/mbr.h
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* 2008-05-24:
* Tamas Kosarszky: changed MBR_CODE_SIZE to 0x1B8 to make fdisk
* compatible with Vista and GPT specifications.
*
* Credits goes to Dense for the idea of this modification and
* Kabyl for findig this piece of source.
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _MBR_H
#define _MBR_H
#include "part.h"
#ifndef NDOSPART
#define NDOSPART 4
#define DOSPTYP_UNUSED 0
#define DOSPTYP_EXTEND 5
#define DOSPTYP_EXTENDL 15
#define DOSACTIVE 128
#endif
/* Various constants */
#define MBR_CODE_SIZE 0x1B8
#define MBR_PART_SIZE0x10
#define MBR_PART_OFF 0x1BE
#define MBR_SIG_OFF 0x1FE
/* MBR_BUF_SIZE is the largest sector size we support */
#define MBR_BUF_SIZE 4096
#define MBR_SIGNATURE 0xAA55
/* MBR type */
typedef struct _mbr_t {
off_t reloffset; /* the offset of the first extended partition that contains all the rest */
off_t offset; /* the absolute offset of this partition */
struct _mbr_t *next; /* pointer to the next MBR in an extended partition chain */
unsigned char code[MBR_CODE_SIZE];
unsigned short signature;
prt_t part[NDOSPART];
unsigned char buf[MBR_BUF_SIZE];
} mbr_t;
/* Prototypes */
void MBR_print_disk __P((char *));
void MBR_print __P((mbr_t *));
void MBR_print_all __P((mbr_t *));
void MBR_parse __P((disk_t *, off_t, off_t, mbr_t *));
void MBR_make __P((mbr_t *));
void MBR_init __P((disk_t *, mbr_t *));
int MBR_read __P((disk_t *,int, off_t, mbr_t *));
int MBR_write __P((disk_t *,int, mbr_t *));
void MBR_pcopy __P((disk_t *, mbr_t *));
mbr_t * MBR_parse_spec __P((FILE *, disk_t *));
void MBR_dump __P((mbr_t *));
void MBR_dump_all __P((mbr_t *));
mbr_t *MBR_alloc __P((mbr_t *));
void MBR_free __P((mbr_t *));
mbr_t * MBR_read_all __P((disk_t *));
int MBR_write_all __P((disk_t *, mbr_t *));
void MBR_clear __P((mbr_t *));
/* Sanity check */
#include <machine/param.h>
#if (DEV_BSIZE != 512)
#error "DEV_BSIZE != 512, somebody better fix me!"
#endif
#endif /* _MBR_H */
branches/azimutz/Chazi/i386/util/fdisk/fdisk.8
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.\"$OpenBSD: fdisk.8,v 1.38 2002/01/04 21:20:56 kjell Exp $
.\"
.\" Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
.\"
.\" "Portions Copyright (c) 2002 Apple Computer, Inc. All Rights
.\" Reserved. This file contains Original Code and/or Modifications of
.\" Original Code as defined in and that are subject to the Apple Public
.\" Source License Version 1.2 (the 'License'). You may not use this file
.\" except in compliance with the License. Please obtain a copy of the
.\" License at http://www.apple.com/publicsource and read it before using
.\" this file.
.\"
.\" The Original Code and all software distributed under the License are
.\" distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
.\" EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
.\" INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
.\" FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
.\" License for the specific language governing rights and limitations
.\" under the License."
.\"
.\" Copyright (c) 1997 Tobias Weingartner
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\" 3. All advertising materials mentioning features or use of this software
.\" must display the following acknowledgement:
.\" This product includes software developed by Tobias Weingartner.
.\" 4. The name of the author may not be used to endorse or promote products
.\" derived from this software without specific prior written permission.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.\"
.Dd January 3, 2002
.Dt FDISK 8
.Os
.Sh NAME
.Nm fdisk
.Nd DOS partition maintenance program
.Sh SYNOPSIS
.Nm fdisk
.Op Fl ieu
.Op Fl f Ar mbrname
.Op Fl c Ar cylinders
.Op Fl h Ar heads
.Op Fl s Ar sectors
.Op Fl S Ar size
.Op Fl b Ar size
.Ar device
.Sh DESCRIPTION
In order for the BIOS to boot the kernel, certain conventions must be
adhered to.
Sector 0 of a bootable hard disk must contain boot code,
an MBR partition table, and a magic number (0xAA55).
These MBR partitions (also
known as BIOS partitions) can be used to break the disk up into several
pieces.
.Pp
The BIOS loads sector 0 of the boot disk into memory, verifies
the magic number, and begins executing the code at the first byte.
The normal DOS MBR boot code searches the MBR partition table for an
.Dq active
partition (indicated by a
.Ql \&*
in the first column), and if one
is found, the boot block from that partition is loaded and executed in
place of the original (MBR) boot block.
.Pp
The options are as follows:
.Bl -tag -width Ds
.It Fl i
Initialize the MBR sector.
.It Fl a Ar style
Specify an automatic partitioning style.
.It Fl e
Edit existing MBR sectors.
.It Fl f Ar mbrname
Specifies an alternate MBR template file.
.It Fl u
Update MBR code, preserving existing partition table.
.It Fl y
Do not ask for confirmation before writing.
.It Fl d
Dump partition table in a format readable by the -r option.
.It Fl r
Read a partition table from the standard input.
.It Fl t
Test if the disk is partitioned.
.It Xo Fl c Ar cylinders ,
.Fl h Ar heads ,
.Fl s Ar sectors
.Xc
Specifies an alternate BIOS geometry for
.Nm
to use.
.It Fl S Ar size
Specify the disk size in blocks.
.It Fl b Ar size
Specify the number of bytes per disk block.
.El
.Pp
The DOS
.Nm
program can be used to divide space on the disk into partitions and set
one active.
This
.Nm
program serves a similar purpose to the DOS program.
When called with no special flags, it prints the MBR partition
table of the specified device, i.e.,
.Bd -literal
# fdisk fd0
Disk: fd0 geometry: 80/2/18 [2880 sectors]
Offset: 0 Signature: 0xAA55
Starting Ending
#: id cyl hd sec - cyl hd sec [ start - size]
----------------------------------------------------------------------
*1: A6 0 0 1 - 79 1 18 [ 0 - 2880] OpenBSD
2: 00 0 0 0 - 0 0 0 [ 0 - 0] unused
3: A7 0 0 2 - 79 1 18 [ 1 - 2879] NEXTSTEP
4: 00 0 0 0 - 0 0 0 [ 0 - 0] unused
.Ed
.Pp
The geometry displayed is a synthetic geometry unless another geometry
has been selected using the
.Fl c ,
.Fl h ,
.Fl s ,
.Fl S ,
and
.Fl b
options.
In the future,
.Nm
will read the BIOS geometry from the IOKit registry.
.Pp
In this example,
the disk is divided into two partitions that happen to fill the disk.
The first partition overlaps the third partition.
(Used for debugging purposes.)
.Bl -tag -width "start/size"
.It Em "#"
Number of partition table entry.
A
.Dq \&*
denotes the bootable partition.
.It Em "id"
System identifier.
.Ox
reserves the
magic number 166 decimal (A6 in hex).
If no 166 partition is found, it will use an older
.Fx
partition (with a magic number of 165 or A5 in hex).
.It Em "cyl/hd/sec"
These fields provide the starting and ending address of the partition
in BIOS geometry
.It Em "start/size"
These fields provide the starting sector and size in sectors of the
partition in linear block addresses.
.El
.Pp
.Em NOTE :
The sectors field is
.Dq 1 based ,
and the start field is
.Dq 0 based .
The CHS values may need to be in the BIOS's geometry
for older systems to be able to boot and use the drive correctly;
most modern systems prefer the starting sector and size
in preference to the CHS values.
.Pp
The
.Fl i
flag is used to indicate that the partition data is to be initialized.
In this mode,
.Nm
will completely overwrite the primary MBR and partition table, either
using the default MBR template, or the one specified by the
.Fl f
flag.
.Pp
In the default template, partition number 1 will be configured as a
Darwin boot
partition spanning from cylinder 0, head 1, sector 1, and extending
for 8 megabytes.
Partition number 2 will be configured as a
Darwin HFS
partition spanning the rest of the disk.
This mode is designed to initialize an MBR the very first time,
or when it has been corrupted beyond repair.
.Pp
You can specify other default partition styles with the
.Fl a
flag. The available styles are:
.Bl -tag -width "start/size"
.It Em "boothfs"
Creates an 8Mb boot partition (type AB hex)
and makes the rest of the disk
a Darwin HFS partition (type AF hex).
.It Em "bootufs"
Creates an 8Mb boot partition (type AB hex)
and makes the rest of the disk
a Darwin UFS partition (type A8 hex).
.It Em "ufs"
Makes the entire disk one Darwin UFS partition (type A8 hex).
.It Em "hfs"
Makes the entire disk one HFS+ partition (type AF hex).
.It Em "dos"
Makes the entire disk one DOS partition (type 0C hex).
.It Em "raid"
Makes the entire disk one type AC hex partition.
.El
.Pp
The
.Fl u
flag is used to update the MBR code on a given drive.
The MBR code extends from offset 0x000 to the start of the partition table
at offset 0x1BE.
It is similar to the
.Fl i
flag, except the existing partition table is preserved. This
is useful for writing new MBR code onto an existing drive, and is
equivalent to the DOS command
.Dq FDISK /MBR .
Note that this option will overwrite the NT disk signature, if present.
The
.Fl u
and
.Fl i
flags may not be specified together.
.Pp
The flag
.Fl e
is used to modify a partition table using a interactive edit mode of the
.Nm
program.
This mode is designed to allow you to change any partition on the
drive you choose, including extended partitions.
It is a very powerful mode,
but is safe as long as you do not execute the
.Em write
command, or answer in the negative (the default) when
.Nm
asks you about writing out changes.
.Sh COMMAND MODE
When you first enter this mode, you are presented with a prompt, that looks
like so:
.Em "fdisk: 0>" .
This prompt has two important pieces of information for you.
It will tell
you if the in-memory copy of the boot block has been modified or not.
If it has been modified, the prompt will change to look like:
.Em "fdisk:*0>" .
The second piece of information pertains to the number given in the prompt.
This number specifies the disk offset of the currently selected boot block
you are editing.
This number could be something different that zero when
you are editing extended partitions.
The list of commands and their explanations are given below.
.Bl -tag -width "update"
.It Em help
Display a list of commands that
.Nm
understands in the interactive edit mode.
.It Em manual
Display this manual page.
.It Em reinit
Initialize the currently selected, in-memory copy of the
boot block.
.It Em auto
Partition the disk with one of the automatic partition styles.
.It Em disk
Display the current drive geometry that
.Nm
has
probed.
You are given a chance to edit it if you wish.
.It Em edit
Edit a given table entry in the memory copy of
the current boot block.
You may edit either in BIOS geometry mode,
or in sector offsets and sizes.
.It Em setpid
Change the partition
identifier of the given partition table entry.
This command is particularly useful for reassigning
an existing partition to OpenBSD.
.It Em flag
Make the given partition table entry bootable.
Only one entry can be marked bootable.
If you wish to boot from an extended
partition, you will need to mark the partition table entry for the
extended partition as bootable.
.It Em update
Update the machine code in the memory copy of the currently selected
boot block.
Note that this option will overwrite the NT disk
signature, if present.
.It Em select
Select and load into memory the boot block pointed
to by the extended partition table entry in the current boot block.
.It Em print
Print the currently selected in-memory copy of the boot
block and its MBR table to the terminal.
.It Em write
Write the in-memory copy of the boot block to disk.
You will be asked to confirm this operation.
.It Em exit
Exit the current level of
.Nm fdisk ,
either returning to the
previously selected in-memory copy of a boot block, or exiting the
program if there is none.
.It Em quit
Exit the current level of
.Nm fdisk ,
either returning to the
previously selected in-memory copy of a boot block, or exiting the
program if there is none.
Unlike
.Em exit
it does write the modified block out.
.It Em abort
Quit program without saving current changes.
.El
.Sh NOTES
The automatic calculation of starting cylinder etc. uses
a set of figures that represent what the BIOS thinks is the
geometry of the drive.
These figures are by default taken from the in-core disklabel, or
values that
.Em /boot
has passed to the kernel, but
.Nm
gives you an opportunity to change them if there is a need to.
This allows the user to create a bootblock that can work with drives
that use geometry translation under a potentially different BIOS.
.Pp
If you hand craft your disk layout,
please make sure that the
.Ox
partition starts on a cylinder boundary.
(This restriction may be changed in the future.)
.Pp
Editing an existing partition is risky, and may cause you to
lose all the data in that partition.
.Pp
You should run this program interactively once or twice to see how it works.
This is completely safe as long as you answer the
.Dq write
questions in the
negative.
.Sh FILES
.Bl -tag -width /usr/mdec/mbr -compact
.It Pa /usr/mdec/mbr
default MBR template
.El
.Sh SEE ALSO
.Xr gpt 8 ,
.Xr pdisk 8
.Sh BUGS
There are subtleties
.Nm
detects that are not explained in this manual page.
As well, chances are that some of the subtleties it should detect are being
steamrolled.
Caveat Emptor.
branches/azimutz/Chazi/i386/util/fdisk/Cconfig
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config FDISK440
bool "fdisk440 utility"
default y
help
Say Y here if you want to compile the fdisk440 utility.
fdisk440 is used to update the boot0 file on the partition by replacing the first 440 bytes, instead of the first 446 bytes as with frisk.
When in doubt, say "Y".
branches/azimutz/Chazi/i386/util/fdisk/disk.c
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997, 2001 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <err.h>
#include <util.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <sys/fcntl.h>
#include <sys/ioctl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/reboot.h>
#include <sys/disk.h>
#include <sys/param.h>
#include <sys/sysctl.h>
#ifdef __i386__
#include <pexpert/i386/boot.h>
#endif
#include "disk.h"
int
DISK_open(disk, mode)
char *disk;
int mode;
{
int fd;
struct stat st;
fd = open(disk, mode);
if (fd == -1)
err(1, "%s", disk);
if (fstat(fd, &st) == -1)
err(1, "%s", disk);
/* Don't be so picky about needing a character device */
if (!S_ISCHR(st.st_mode) && !S_ISBLK(st.st_mode) && !S_ISREG(st.st_mode))
errx(1, "%s is not a character device or a regular file", disk);
return (fd);
}
int
DISK_openshared(disk, mode, shared)
char *disk;
int mode;
int *shared;
{
int fd;
struct stat st;
*shared = 0;
fd = open(disk, mode|O_EXLOCK);
if (fd == -1) {
// if we can't have exclusive access, attempt
// to gracefully degrade to shared access
fd = open(disk, mode|O_SHLOCK);
if(fd == -1)
err(1, "%s", disk);
*shared = 1;
}
if (fstat(fd, &st) == -1)
err(1, "%s", disk);
/* Don't be so picky about needing a character device */
if (!S_ISCHR(st.st_mode) && !S_ISBLK(st.st_mode) && !S_ISREG(st.st_mode))
errx(1, "%s is not a character device or a regular file", disk);
return (fd);
}
int
DISK_close(fd)
int fd;
{
return (close(fd));
}
/* Given a size in the metrics,
* fake up a CHS geometry.
*/
void
DISK_fake_CHS(DISK_metrics *lm)
{
int heads = 4;
int spt = 63;
int cylinders = (lm->size / heads / spt);
while (cylinders > 1024 && heads < 256) {
heads *= 2;
cylinders /= 2;
}
if (heads == 256) {
heads = 255;
cylinders = (lm->size / heads / spt);
}
lm->cylinders = cylinders;
lm->heads = heads;
lm->sectors = spt;
}
/* Routine to go after the disklabel for geometry
* information. This should work everywhere, but
* in the land of PC, things are not always what
* they seem.
*/
DISK_metrics *
DISK_getlabelmetrics(name)
char *name;
{
DISK_metrics *lm = NULL;
long long size;
uint32_t sector_size;
int fd;
struct stat st;
/* Get label metrics */
if ((fd = DISK_open(name, O_RDONLY)) != -1) {
lm = malloc(sizeof(DISK_metrics));
if (fstat(fd, &st) == -1)
err(1, "%s", name);
if (!S_ISREG(st.st_mode) || S_ISBLK(st.st_mode)) {
if (ioctl(fd, DKIOCGETBLOCKCOUNT, &size) == -1) {
err(1, "Could not get disk block count");
free(lm);
return NULL;
}
if (ioctl(fd, DKIOCGETBLOCKSIZE, &sector_size) == -1) {
err(1, "Could not get disk block size");
free(lm);
return NULL;
}
} else {
sector_size = 512;
size = st.st_size / sector_size;
}
lm->sector_size = sector_size;
lm->size = size;
DISK_fake_CHS(lm);
DISK_close(fd);
}
return (lm);
}
/*
* Don't try to get BIOS disk metrics.
*/
DISK_metrics *
DISK_getbiosmetrics(name)
char *name;
{
return (NULL);
}
/* This is ugly, and convoluted. All the magic
* for disk geo/size happens here. Basically,
* the real size is the one we will use in the
* rest of the program, the label size is what we
* got from the disklabel. If the disklabel fails,
* we assume we are working with a normal file,
* and should request the user to specify the
* geometry he/she wishes to use.
*/
int
DISK_getmetrics(disk, user)
disk_t *disk;
DISK_metrics *user;
{
disk->label = DISK_getlabelmetrics(disk->name);
disk->bios = DISK_getbiosmetrics(disk->name);
/* If user supplied, use that */
if (user) {
disk->real = user;
return (0);
}
/* Fixup bios metrics to include cylinders past 1023 boundary */
if(disk->label && disk->bios){
int cyls, secs;
cyls = disk->label->size / (disk->bios->heads * disk->bios->sectors);
secs = cyls * (disk->bios->heads * disk->bios->sectors);
if ((disk->label->size - secs) < 0)
errx(1, "BIOS fixup botch (%d sectors)", disk->label->size - secs);
disk->bios->cylinders = cyls;
disk->bios->size = secs;
}
/* If we have a (fixed) BIOS geometry, use that */
if (disk->bios) {
disk->real = disk->bios;
return (0);
}
/* If we have a label, use that */
if (disk->label) {
disk->real = disk->label;
return (0);
}
/* Can not get geometry, punt */
disk->real = NULL;
return (1);
}
/* Get the disk's native sector size, updating the metrics' sector_size field.
*/
int
DISK_get_sector_size(disk, user)
disk_t *disk;
DISK_metrics *user;
{
int ret;
int fd;
uint32_t sector_size;
/* Default to 512 bytes per sector, in case of failure. */
user->sector_size = 512;
ret = 1;
fd = DISK_open(disk->name, O_RDONLY);
if (fd == -1) {
err(1, "Could not open %s", disk->name);
} else {
if (ioctl(fd, DKIOCGETBLOCKSIZE, &sector_size) == -1) {
err(1, "Could not get disk block size");
} else {
user->sector_size = sector_size;
ret = 0;
}
}
return ret;
}
int
DISK_printmetrics(disk)
disk_t *disk;
{
printf("Disk: %s\t", disk->name);
if (disk->real) {
printf("geometry: %d/%d/%d [%d sectors]\n", disk->real->cylinders,
disk->real->heads, disk->real->sectors, disk->real->size);
if (disk->real->sector_size != 512)
printf("Sector size: %d bytes\n", disk->real->sector_size);
} else {
printf("geometry: <none>\n");
}
return (0);
}
branches/azimutz/Chazi/i386/util/fdisk/misc.c
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/*
* Copyright (c) 2002 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* This file contains Original Code and/or Modifications of Original Code
* as defined in and that are subject to the Apple Public Source License
* Version 2.0 (the 'License'). You may not use this file except in
* compliance with the License. Please obtain a copy of the License at
* http://www.opensource.apple.com/apsl/ and read it before using this
* file.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
* Please see the License for the specific language governing rights and
* limitations under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1997 Tobias Weingartner
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Tobias Weingartner.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <err.h>
#include <stdio.h>
#include <ctype.h>
#include <stdlib.h>
#include <string.h>
#include "misc.h"
int
ask_cmd(cmd)
cmd_t *cmd;
{
char lbuf[100], *cp, *buf;
/* Get input */
if (fgets(lbuf, sizeof lbuf, stdin) == NULL)
errx(1, "eof");
lbuf[strlen(lbuf)-1] = '\0';
/* Parse input */
buf = lbuf;
buf = &buf[strspn(buf, " \t")];
cp = &buf[strcspn(buf, " \t")];
*cp++ = '\0';
strncpy(cmd->cmd, buf, 10);
buf = &cp[strspn(cp, " \t")];
strncpy(cmd->args, buf, 100);
return (0);
}
int
ask_num(str, flags, dflt, low, high, help)
const char *str;
int flags;
int dflt;
int low;
int high;
void (*help) __P((void));
{
char lbuf[100], *cp;
int num;
do {
again:
num = dflt;
if (flags == ASK_HEX)
printf("%s [%X - %X]: [%X] ", str, low, high, num);
else
printf("%s [%d - %d]: [%d] ", str, low, high, num);
if (help)
printf("(? for help) ");
if (fgets(lbuf, sizeof lbuf, stdin) == NULL)
errx(1, "eof");
lbuf[strlen(lbuf)-1] = '\0';
if (help && lbuf[0] == '?') {
(*help)();
goto again;
}
/* Convert */
cp = lbuf;
num = strtol(lbuf, &cp, ((flags==ASK_HEX)?16:10));
/* Make sure only number present */
if (cp == lbuf)
num = dflt;
if (*cp != '\0') {
printf("'%s' is not a valid number.\n", lbuf);
num = low - 1;
} else if (num < low || num > high) {
printf("'%d' is out of range.\n", num);
}
} while (num < low || num > high);
return (num);
}
int
ask_yn(str, default_answer)
const char *str;
int default_answer;
{
int ch, first;
printf("%s [%c] ", str, default_answer ? 'y' : 'n');
fflush(stdout);
first = ch = getchar();
while (ch != '\n' && ch != EOF)
ch = getchar();
if (ch == EOF || first == EOF)
errx(1, "eof");
if (first == '\n')
return default_answer;
return (first == 'y' || first == 'Y');
}
u_int16_t
getshort(p)
void *p;
{
unsigned char *cp = p;
return (cp[0] | (cp[1] << 8));
}
void
putshort(p, l)
void *p;
u_int16_t l;
{
unsigned char *cp = p;
*cp++ = l;
*cp++ = l >> 8;
}
u_int32_t
getlong(p)
void *p;
{
unsigned char *cp = p;
return (cp[0] | (cp[1] << 8) | (cp[2] << 16) | (cp[3] << 24));
}
void
putlong(p, l)
void *p;
u_int32_t l;
{
unsigned char *cp = p;
*cp++ = l;
*cp++ = l >> 8;
*cp++ = l >> 16;
*cp++ = l >> 24;
}
branches/azimutz/Chazi/i386/util/fdisk/Makefile
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SRCROOT = $(shell pwd)/../../../
OBJROOT = $(SRCROOT)/obj/i386/util/fdisk
SYMROOT = $(SRCROOT)/sym/i386
DSTROOT = $(SRCROOT)/dst/i386
DOCROOT = $(SRCROOT)/doc
IMGROOT = $(SRCROOT)/sym/cache
IMGSKELROOT = $(SRCROOT)/imgskel
CDBOOT = ${IMGROOT}/usr/standalone/i386/cdboot
DIR = fdisk
include ${SRCROOT}/Make.rules
LDFLAGS := $(LDFALGS) -mmacosx-version-min=10.5
OBJS = cmd.o32 disk.o32 fdisk.o32 getrawpartition.o32 mbr.o32 misc.o32 opendev.o32 part.o32 user.o32 auto.o32 \
cmd.o64 disk.o64 fdisk.o64 getrawpartition.o64 mbr.o64 misc.o64 opendev.o64 part.o64 user.o64 auto.o64
PROGRAM = fdisk440
PROGRAM:= $(addprefix $(SYMROOT)/, $(PROGRAM))
ifeq ($(CONFIG_FDISK440),y)
all: $(SYMROOT) $(OBJROOT) $(PROGRAM)
$(PROGRAM): $(addprefix $(OBJROOT)/, $(OBJS))
@echo "\t[LD32] $@_32"
@$(CC) $(CFLAGS) $(LDFLAGS) $(DEFINES) -arch i386 -o $@_32 $(filter %.o32,$^)
@echo "\t[LD64] $@_64"
@$(CC) $(CFLAGS) $(LDFLAGS) $(DEFINES) -arch x86_64 -o $@_64 $(filter %.o64,$^)
@echo "\t[LIPO] $@"
@lipo -create -arch i386 $@_32 -arch x86_64 $@_64 -output $@
@rm $@_32 $@_64
else
all:
endif
#dependencies
-include $(OBJROOT)/Makedep
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int main(int argc, char *argv[])
{
if(argc != 3)
if(argc < 3)
{
fprintf(stderr, "usage: dyldsymboltool bootFile loadAddr outfile\n");
fprintf(stderr, "usage: dyldsymboltool obj1 [obj2 ...] outfile\n");
exit(-1);
}
char line[256];
char* command = malloc(strlen(argv[1]) + sizeof("nm -g "));
FILE *fpipe;
symbols_dylib_t dylib;
symbolList_t*symbols = NULL;
int i;
for(i = 1; i < argc-1; i++)
{
char line[256];
char* command = malloc(strlen(argv[1]) + sizeof("nm -g "));
FILE *fpipe;
// Parse boot.sys (arg1) to get symtab
sprintf(command, "nm -g %s", argv[i]);// TODO: read boot.sym directly, no need for nm
if ( !(fpipe = (FILE*)popen(command,"r")) )
{ // If fpipe is NULL
perror("Problems with pipe");
exit(1);
}
while ( fgets( line, sizeof line, fpipe))
{
if((strlen(line) < strlen(argv[i]) ||
strncmp(line, argv[i], strlen(argv[i])) != 0)
&& line[0] != ' ')
{
uint32_t address = 0;
char* addr = strtok(line, " ");
strtok(NULL, " ");
char* name = strtok(NULL, " ");
name[strlen(name)-1] = 0;// remove newline
sscanf(addr, "%x", &address);
if(strcmp(name, VOID_SYMBOL) == 0) start_addr = address;
add_symbol(&symbols, name, address);
}
}
pclose(fpipe);
free(command);
}
// Parse boot.sys (arg1) to get symtab
sprintf(command, "nm -g %s", argv[1]);// TODO: read boot.sym directly, no need for nm
if ( !(fpipe = (FILE*)popen(command,"r")) )
{ // If fpipe is NULL
perror("Problems with pipe");
exit(1);
}
while ( fgets( line, sizeof line, fpipe))
{
uint32_t address = 0;
char* addr = strtok(line, " ");
strtok(NULL, " ");
char* name = strtok(NULL, " ");
name[strlen(name)-1] = 0;// remove newline
sscanf(addr, "%x", &address);
if(strcmp(name, VOID_SYMBOL) == 0) start_addr = address;
add_symbol(&symbols, name, address);
}
pclose(fpipe);
if(start_addr == 0)
{
fprintf(stderr, "Unable to locate Symbol.dylib start function\n");
exit(1);
//exit(1);
}
else
{
add_symbol(&symbols, START_SYMBOL, start_addr);
}
add_symbol(&symbols, START_SYMBOL, start_addr);
/* Header command info */
dylib.header.ncmds = 2;
dylib.header.sizeofcmds = sizeof(dylib) - sizeof(struct mach_header);// + dylib.symtab.nsyms * sizeof(struct nlist) + dylib.symtab.strsize;
FILE* outfile = fopen(argv[2], "w");
FILE* outfile = fopen(argv[argc-1], "w");
fwrite(&dylib,sizeof(dylib)/* Sizeof header + module name */
, 1, outfile);
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io_registry_entry_t root = IORegistryEntryFromPath(kIOMasterPortDefault, "IOService:/");
if (!root)
{
printf("IORegistryEntry \"IOService:/\" not found.\n");
printf("IORegistryEntry \"IOIOService:/\" not found.\n");
return 0;
}
branches/azimutz/Chazi/i386/util/openUp.c
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/*
* Copyright (c) 2001 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* The contents of this file constitute Original Code as defined in and
* are subject to the Apple Public Source License Version 1.1 (the
* "License"). You may not use this file except in compliance with the
* License. Please obtain a copy of the License at
* http://www.apple.com/publicsource and read it before using this file.
*
* This Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Shantonu Sen <<EMAIL REMOVED>>
* openUp.c - program to set the "first-open-window" field of a volume
*
* Get the directory ID for the first argument, and set it as word 2
* of the Finder Info fields for the volume it lives on
*
* cc -o openUp openUp.c
* Usage: openUp /Volumes/Foo/OpenMe/
*
*/
#include <stdio.h>
#include <unistd.h>
#include <stdlib.h>
#include <sys/attr.h>
#include <sys/stat.h>
#include <sys/mount.h>
#include <memory.h>
struct directoryinfo {
long unsigned length;
uintptr_t dirid; // changed from: u_int32_t dirid;
};
struct volumeinfo {
long unsigned length;
uintptr_t finderinfo[8]; // changed from: u_int32_t finderinfo[8];
};
int main(int argc, char *argv[]) {
char *path = NULL;
struct attrlist alist;
struct directoryinfo dirinfo;
struct volumeinfo volinfo;
struct statfs sfs;
path = argv[1];
bzero(&alist, sizeof(alist));
alist.bitmapcount = 5;
alist.commonattr = ATTR_CMN_OBJID;
getattrlist(path, &alist, &dirinfo, sizeof(dirinfo), 0);
printf("directory id: %lu\n", dirinfo.dirid);
statfs(path, &sfs);
printf("mountpoint: %s\n", sfs.f_mntonname);
alist.commonattr = ATTR_CMN_FNDRINFO;
alist.volattr = ATTR_VOL_INFO;
getattrlist(sfs.f_mntonname, &alist, &volinfo, sizeof(volinfo), 0);
volinfo.finderinfo[2] = dirinfo.dirid;
setattrlist(sfs.f_mntonname, &alist, volinfo.finderinfo, sizeof(volinfo.finderinfo), 0);
return EXIT_SUCCESS;
}
branches/azimutz/Chazi/i386/util/Cconfig
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bdmesg is used to dump any messages thrown during the
chameleon boot sequence.
When in doubt, say "Y".
source "i386/util/fdisk/Cconfig"
config OPENUP
bool "openUp utility"
default n
help
Say Y here if you want to compile the openUp utility.
openUp is used to set the "first-open-window" field of a volume.
When in doubt, say "N".

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Revision: 980