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Root/trunk/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 * 2010 mojodojo, 2012 slice
4 */
5
6#include "libsaio.h"
7#include "boot.h"
8#include "bootstruct.h"
9#include "acpi.h"
10#include "efi_tables.h"
11#include "fake_efi.h"
12#include "acpi_patcher.h"
13#include "platform.h"
14#include "cpu.h"
15#include "aml_generator.h"
16
17#ifndef DEBUG_ACPI
18#define DEBUG_ACPI 0
19#endif
20
21#if DEBUG_ACPI==2
22#define DBG(x...) {printf(x); sleep(1);}
23#elif DEBUG_ACPI==1
24#define DBG(x...) printf(x)
25#else
26#define DBG(x...) msglog(x)
27#endif
28
29// Slice: New signature compare function
30boolean_t tableSign(char *table, const char *sgn)
31{
32int i;
33for (i=0; i<4; i++)
34{
35if ((table[i] &~0x20) != (sgn[i] &~0x20))
36{
37return false;
38}
39}
40return true;
41}
42
43/* Gets the ACPI 1.0 RSDP address */
44static struct acpi_2_rsdp* getAddressOfAcpiTable()
45{
46/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
47
48void *acpi_addr = (void*)ACPI_RANGE_START;
49for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
50{
51if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
52{
53uint8_t csum = checksum8(acpi_addr, 20);
54if(csum == 0)
55{
56// Only return the table if it is a true version 1.0 table (Revision 0)
57if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
58return acpi_addr;
59}
60}
61}
62return NULL;
63}
64
65/* Gets the ACPI 2.0 RSDP address */
66static struct acpi_2_rsdp* getAddressOfAcpi20Table()
67{
68/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
69
70void *acpi_addr = (void*)ACPI_RANGE_START;
71for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
72{
73if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
74{
75uint8_t csum = checksum8(acpi_addr, 20);
76
77/* Only assume this is a 2.0 or better table if the revision is greater than 0
78 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
79 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
80 */
81
82if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
83{
84uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
85if(csum2 == 0)
86{
87return acpi_addr;
88}
89}
90}
91}
92return NULL;
93}
94
95/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
96/* WARNING: outDirspec string will be overwritten by subsequent calls! */
97int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
98{
99int fd = 0;
100static char dirSpec[512];
101
102// Try finding 'filename' in the usual places
103// Start searching any potential location for ACPI Table
104snprintf(dirSpec, sizeof(dirSpec), "%s", filename);
105fd = open(dirSpec, 0);
106if (fd < 0) {
107snprintf(dirSpec, sizeof(dirSpec), "/Extra/%s", filename);
108fd = open(dirSpec, 0);
109if (fd < 0)
110{
111snprintf(dirSpec, sizeof(dirSpec), "bt(0,0)/Extra/%s", filename);
112fd = open(dirSpec, 0);
113if (fd < 0) {
114// NOT FOUND:
115DBG("ACPI Table not found: %s\n", filename);
116*dirSpec = '\0';
117}
118}
119}
120
121if (outDirspec) *outDirspec = dirSpec;
122return fd;
123}
124
125void *loadACPITable (const char * filename)
126{
127void *tableAddr;
128const char * dirspec=NULL;
129
130int fd = search_and_get_acpi_fd(filename, &dirspec);
131
132if (fd>=0)
133{
134tableAddr=(void*)AllocateKernelMemory(file_size (fd));
135if (tableAddr)
136{
137if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
138{
139DBG("Couldn't read table %s\n",dirspec);
140free (tableAddr);
141close (fd);
142return NULL;
143}
144
145DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
146close (fd);
147return tableAddr;
148}
149close (fd);
150DBG("Couldn't allocate memory for table \n", dirspec);
151}
152//printf("Couldn't find table %s\n", filename);
153return NULL;
154}
155
156uint8_tacpi_cpu_count = 0;
157char* acpi_cpu_name[32];
158uint32_t acpi_cpu_p_blk = 0;
159
160void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
161{
162uint32_t i;
163
164DBG("Start finding cpu names. length %d\n", length);
165
166for (i=0; i<length-7; i++)
167{
168if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
169{
170DBG("DSDT: %x%x\n", dsdt[i], dsdt[i+1]);
171
172uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
173
174bool add_name = true;
175
176uint8_t j;
177
178for (j=0; j<4; j++)
179{
180char c = dsdt[offset+j];
181
182if (!aml_isvalidchar(c))
183{
184add_name = false;
185DBG("Invalid character found in ProcessorOP 0x%x!\n", c);
186break;
187}
188}
189
190if (add_name)
191{
192acpi_cpu_name[acpi_cpu_count] = malloc(4);
193memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
194i = offset + 5;
195
196if (acpi_cpu_count == 0)
197acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
198
199DBG("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
200
201if (++acpi_cpu_count == 32) {
202return;
203}
204}
205}
206}
207
208DBG("End finding cpu names: cpu names found: %d\n", acpi_cpu_count);
209}
210
211struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
212{
213char ssdt_header[] =
214{
2150x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2160x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2170x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2180x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2190x31, 0x03, 0x10, 0x20/* 1.._*/
220};
221
222char resource_template_register_fixedhw[] =
223{
2240x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2250x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2260x00, 0x00, 0x01, 0x79, 0x00
227};
228
229char resource_template_register_systemio[] =
230{
2310x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2320x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2330x00, 0x00, 0x00, 0x79, 0x00,
234};
235
236if (Platform.CPU.Vendor != 0x756E6547) {
237DBG("Not an Intel platform: C-States will not be generated !!!\n");
238return NULL;
239}
240
241if (fadt == NULL) {
242DBG("FACP not exists: C-States will not be generated !!!\n");
243return NULL;
244}
245
246struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
247
248if (dsdt == NULL) {
249DBG("DSDT not found: C-States will not be generated !!!\n");
250return NULL;
251}
252
253if (acpi_cpu_count == 0)
254get_acpi_cpu_names((void*)dsdt, dsdt->Length);
255
256if (acpi_cpu_count > 0)
257{
258bool c2_enabled = false;
259bool c3_enabled = false;
260bool c4_enabled = false;
261bool cst_using_systemio = false;
262
263getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
264getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
265getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
266getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
267
268c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
269c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
270
271unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
272
273AML_CHUNK* root = aml_create_node(NULL);
274aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
275AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
276AML_CHUNK* name = aml_add_name(scop, "CST_");
277AML_CHUNK* pack = aml_add_package(name);
278aml_add_byte(pack, cstates_count);
279
280AML_CHUNK* tmpl = aml_add_package(pack);
281if (cst_using_systemio) {
282// C1
283resource_template_register_fixedhw[8] = 0x00;
284resource_template_register_fixedhw[9] = 0x00;
285resource_template_register_fixedhw[18] = 0x00;
286aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
287aml_add_byte(tmpl, 0x01);// C1
288aml_add_word(tmpl, 0x0001);// Latency
289aml_add_dword(tmpl, 0x000003e8);// Power
290
291uint8_t p_blk_lo, p_blk_hi;
292
293if (c2_enabled) // C2
294{
295p_blk_lo = acpi_cpu_p_blk + 4;
296p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
297
298tmpl = aml_add_package(pack);
299resource_template_register_systemio[11] = p_blk_lo; // C2
300resource_template_register_systemio[12] = p_blk_hi; // C2
301aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
302aml_add_byte(tmpl, 0x02);// C2
303aml_add_word(tmpl, 0x0040);// Latency
304aml_add_dword(tmpl, 0x000001f4);// Power
305}
306
307if (c4_enabled) // C4
308{
309p_blk_lo = acpi_cpu_p_blk + 5;
310p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
311
312tmpl = aml_add_package(pack);
313resource_template_register_systemio[11] = p_blk_lo; // C4
314resource_template_register_systemio[12] = p_blk_hi; // C4
315aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
316aml_add_byte(tmpl, 0x04);// C4
317aml_add_word(tmpl, 0x0080);// Latency
318aml_add_dword(tmpl, 0x000000C8);// Power
319}
320else if (c3_enabled) // C3
321{
322p_blk_lo = acpi_cpu_p_blk + 5;
323p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
324
325tmpl = aml_add_package(pack);
326resource_template_register_systemio[11] = p_blk_lo; // C3
327resource_template_register_systemio[12] = p_blk_hi; // C3
328aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
329aml_add_byte(tmpl, 0x03);// C3
330aml_add_word(tmpl, 0x0060);// Latency
331aml_add_dword(tmpl, 0x0000015e);// Power
332}
333}
334else
335{
336// C1
337resource_template_register_fixedhw[11] = 0x00; // C1
338aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
339aml_add_byte(tmpl, 0x01);// C1
340aml_add_word(tmpl, 0x0001);// Latency
341aml_add_dword(tmpl, 0x000003e8);// Power
342
343resource_template_register_fixedhw[18] = 0x03;
344
345if (c2_enabled) // C2
346{
347tmpl = aml_add_package(pack);
348resource_template_register_fixedhw[11] = 0x10; // C2
349aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
350aml_add_byte(tmpl, 0x02);// C2
351aml_add_word(tmpl, 0x0040);// Latency
352aml_add_dword(tmpl, 0x000001f4);// Power
353}
354
355if (c4_enabled) // C4
356{
357tmpl = aml_add_package(pack);
358resource_template_register_fixedhw[11] = 0x30; // C4
359aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
360aml_add_byte(tmpl, 0x04);// C4
361aml_add_word(tmpl, 0x0080);// Latency
362aml_add_dword(tmpl, 0x000000C8);// Power
363}
364else if (c3_enabled)
365{
366tmpl = aml_add_package(pack);
367resource_template_register_fixedhw[11] = 0x20; // C3
368aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
369aml_add_byte(tmpl, 0x03);// C3
370aml_add_word(tmpl, 0x0060);// Latency
371aml_add_dword(tmpl, 0x0000015e);// Power
372}
373}
374
375// Aliaces
376int i;
377for (i = 0; i < acpi_cpu_count; i++)
378{
379char name[9];
380sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
381
382scop = aml_add_scope(root, name);
383aml_add_alias(scop, "CST_", "_CST");
384}
385
386aml_calculate_size(root);
387
388struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
389
390aml_write_node(root, (void*)ssdt, 0);
391
392ssdt->Length = root->Size;
393ssdt->Checksum = 0;
394ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
395
396aml_destroy_node(root);
397
398// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
399
400DBG("SSDT with CPU C-States generated successfully\n");
401
402return ssdt;
403} else {
404DBG("ACPI CPUs not found: C-States not generated !!!\n");
405}
406
407return NULL;
408}
409
410struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
411{
412char ssdt_header[] =
413{
4140x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4150x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4160x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4170x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4180x31, 0x03, 0x10, 0x20,/* 1.._*/
419};
420
421if (Platform.CPU.Vendor != 0x756E6547) {
422DBG("Not an Intel platform: P-States will not be generated !!!\n");
423return NULL;
424}
425
426if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
427DBG("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
428return NULL;
429}
430
431if (acpi_cpu_count == 0)
432get_acpi_cpu_names((void*)dsdt, dsdt->Length);
433
434if (acpi_cpu_count > 0)
435{
436struct p_state initial, maximum, minimum, p_states[32];
437uint8_t p_states_count = 0;
438
439// Retrieving P-States, ported from code by superhai (c)
440switch (Platform.CPU.Family) {
441case 0x06:
442{
443switch (Platform.CPU.Model)
444{
445case CPU_MODEL_DOTHAN:// Intel Pentium M
446case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
447case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
448case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
449case CPU_MODEL_ATOM:// Intel Atom (45nm)
450{
451bool cpu_dynamic_fsb = false;
452
453if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
454{
455wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
456delay(1);
457cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
458}
459
460bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
461
462initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
463
464maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
465maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
466
467minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
468minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
469
470if (minimum.FID == 0)
471{
472uint64_t msr;
473uint8_t i;
474// Probe for lowest fid
475for (i = maximum.FID; i >= 0x6; i--)
476{
477msr = rdmsr64(MSR_IA32_PERF_CONTROL);
478wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
479intel_waitforsts();
480minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
481delay(1);
482}
483
484msr = rdmsr64(MSR_IA32_PERF_CONTROL);
485wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
486intel_waitforsts();
487}
488
489if (minimum.VID == maximum.VID)
490{
491uint64_t msr;
492uint8_t i;
493// Probe for lowest vid
494for (i = maximum.VID; i > 0xA; i--)
495{
496msr = rdmsr64(MSR_IA32_PERF_CONTROL);
497wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
498intel_waitforsts();
499minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
500delay(1);
501}
502
503msr = rdmsr64(MSR_IA32_PERF_CONTROL);
504wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
505intel_waitforsts();
506}
507
508minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
509
510// Sanity check
511if (maximum.CID < minimum.CID) {
512DBG("P-States: Insane FID values!");
513p_states_count = 0;
514} else {
515uint8_t vidstep;
516uint8_t i = 0, u, invalid = 0;
517// Finalize P-States
518// Find how many P-States machine supports
519p_states_count = (uint8_t)(maximum.CID - minimum.CID + 1);
520
521if (p_states_count > 32) {
522p_states_count = 32;
523}
524
525vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
526
527for (u = 0; u < p_states_count; u++) {
528i = u - invalid;
529
530p_states[i].CID = maximum.CID - u;
531p_states[i].FID = (uint8_t)(p_states[i].CID >> 1);
532
533if (p_states[i].FID < 0x6) {
534if (cpu_dynamic_fsb) {
535p_states[i].FID = (p_states[i].FID << 1) | 0x80;
536}
537} else if (cpu_noninteger_bus_ratio) {
538p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
539}
540
541if (i && p_states[i].FID == p_states[i-1].FID) {
542invalid++;
543}
544p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
545uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
546bool half = p_states[i].FID & 0x40;// = 0x01
547bool dfsb = p_states[i].FID & 0x80;// = 0x00
548uint32_t fsb = (uint32_t)(Platform.CPU.FSBFrequency / 1000000); // = 400
549uint32_t halffsb = (fsb + 1) >> 1;// = 200
550uint32_t frequency = (multiplier * fsb);// = 3200
551
552p_states[i].Frequency = (uint32_t)(frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
553}
554
555p_states_count -= invalid;
556}
557
558break;
559}
560case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
561case CPU_MODEL_DALES:
562case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
563case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
564case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
565case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
566case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
567case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
568case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
569case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
570case CPU_MODEL_HASWELL://
571case CPU_MODEL_IVYBRIDGE_XEON: //
572//case CPU_MODEL_HASWELL_H://
573case CPU_MODEL_HASWELL_SVR://
574case CPU_MODEL_HASWELL_ULT://
575case CPU_MODEL_CRYSTALWELL://
576
577{
578if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
579(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||
580(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_SVR) ||
581(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_CRYSTALWELL))
582{
583maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
584} else {
585maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
586}
587
588minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
589
590DBG("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
591
592// Sanity check
593if (maximum.Control < minimum.Control) {
594DBG("Insane control values!");
595p_states_count = 0;
596} else {
597uint8_t i;
598p_states_count = 0;
599
600for (i = maximum.Control; i >= minimum.Control; i--) {
601p_states[p_states_count].Control = i;
602p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
603p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
604p_states_count++;
605}
606}
607
608break;
609}
610default:
611DBG("Unsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
612break;
613}
614}
615}
616
617// Generating SSDT
618if (p_states_count > 0) {
619int i;
620
621AML_CHUNK* root = aml_create_node(NULL);
622aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
623AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
624AML_CHUNK* name = aml_add_name(scop, "PSS_");
625AML_CHUNK* pack = aml_add_package(name);
626
627for (i = 0; i < p_states_count; i++) {
628AML_CHUNK* pstt = aml_add_package(pack);
629
630aml_add_dword(pstt, p_states[i].Frequency);
631aml_add_dword(pstt, 0x00000000); // Power
632aml_add_dword(pstt, 0x0000000A); // Latency
633aml_add_dword(pstt, 0x0000000A); // Latency
634aml_add_dword(pstt, p_states[i].Control);
635aml_add_dword(pstt, i+1); // Status
636}
637
638// Add aliaces
639for (i = 0; i < acpi_cpu_count; i++) {
640char name[9];
641sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
642
643scop = aml_add_scope(root, name);
644aml_add_alias(scop, "PSS_", "_PSS");
645}
646
647aml_calculate_size(root);
648
649struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
650
651aml_write_node(root, (void*)ssdt, 0);
652
653ssdt->Length = root->Size;
654ssdt->Checksum = 0;
655ssdt->Checksum = 256 - (uint8_t)(checksum8(ssdt, ssdt->Length));
656
657aml_destroy_node(root);
658
659//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
660
661DBG("SSDT with CPU P-States generated successfully\n");
662
663return ssdt;
664}
665} else {
666DBG("ACPI CPUs not found: P-States not generated !!!\n");
667}
668
669return NULL;
670}
671
672struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
673{
674extern void setupSystemType();
675
676struct acpi_2_fadt *fadt_mod = NULL;
677bool fadt_rev2_needed = false;
678bool fix_restart;
679bool fix_restart_ps2;
680int value = 1;
681
682// Restart Fix
683if (Platform.CPU.Vendor == 0x756E6547) { /* Intel */
684fix_restart = true;
685fix_restart_ps2 = false;
686if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2) {
687fix_restart = true;
688} else {
689getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
690}
691} else {
692DBG("Not an Intel platform: Restart Fix not applied !!!\n");
693fix_restart = false;
694}
695
696if (fix_restart) {
697fadt_rev2_needed = true;
698}
699
700// Allocate new fadt table
701if (fadt->Length < 0x84 && fadt_rev2_needed)
702{
703fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
704memcpy(fadt_mod, fadt, fadt->Length);
705fadt_mod->Length = 0x84;
706fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
707} else {
708fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
709memcpy(fadt_mod, fadt, fadt->Length);
710}
711
712// Determine PM Profile
713if (getIntForKey(kSystemType, &value, &bootInfo->chameleonConfig)) {
714DBG("FADT: changing PM Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, (unsigned char)value);
715// user has overriden the PM Profile so take care of it in FACP
716fadt_mod->PM_Profile = (unsigned char)value;
717} else {
718DBG("FADT: PM Profile=0x%02x\n", fadt_mod->PM_Profile);
719}
720// Check if PM Profile is correct (1..3), otherwise set it to value
721switch (fadt_mod->PM_Profile) {
722case 1: break;
723case 2: break;
724case 3: break;
725default:
726value = 1;
727DBG("FADT: wrong PM Profile (0x%02x), must be 1..3. Defaulting to 0x%02x!\n", fadt_mod->PM_Profile, (unsigned char)value);
728fadt_mod->PM_Profile = (unsigned char)value;
729}
730// Setup system-type
731Platform.Type = fadt_mod->PM_Profile;
732
733// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
734// because we need to take care of FACP original content, if it is correct.
735setupSystemType();
736
737// Patch FADT to fix restart
738if (fix_restart) {
739if (fix_restart_ps2) {
740fadt_mod->Flags|= 0x400;
741fadt_mod->Reset_SpaceID= 0x01; // System I/O
742fadt_mod->Reset_BitWidth= 0x08; // 1 byte
743fadt_mod->Reset_BitOffset= 0x00; // Offset 0
744fadt_mod->Reset_AccessWidth= 0x01; // Byte access
745fadt_mod->Reset_Address= 0x64; // Address of the register
746fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
747DBG("FADT: PS2 Restart Fix applied!\n");
748} else {
749fadt_mod->Flags|= 0x400;
750fadt_mod->Reset_SpaceID= 0x01; // System I/O
751fadt_mod->Reset_BitWidth= 0x08; // 1 byte
752fadt_mod->Reset_BitOffset= 0x00; // Offset 0
753fadt_mod->Reset_AccessWidth= 0x01; // Byte access
754fadt_mod->Reset_Address= 0x0cf9; // Address of the register
755fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
756DBG("FADT: ACPI Restart Fix applied!\n");
757}
758
759}
760
761// Patch DSDT Address if we have loaded DSDT.aml
762if(new_dsdt) {
763DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
764
765fadt_mod->DSDT=(uint32_t)new_dsdt;
766if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length) {
767fadt_mod->X_DSDT=(uint32_t)new_dsdt;
768}
769
770DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
771
772DBG("FADT: Using custom DSDT!\n");
773}
774
775// Correct the checksum
776fadt_mod->Checksum=0;
777fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
778
779return fadt_mod;
780}
781
782/* Setup ACPI without replacing DSDT. */
783int setupAcpiNoMod()
784{
785//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
786//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
787/* XXX aserebln why uint32 cast if pointer is uint64 ? */
788acpi10_p = (uint64_t)(uint32_t)getAddressOfAcpiTable();
789acpi20_p = (uint64_t)(uint32_t)getAddressOfAcpi20Table();
790addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
791if(acpi20_p) {
792addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
793} else {
794DBG("No ACPI 2.\n");
795}
796return 1;
797}
798
799/* Setup ACPI. Replace DSDT if DSDT.aml is found */
800int setupAcpi(void)
801{
802int version;
803void *new_dsdt = NULL; // DSDT.aml DSDT
804void *new_table;
805
806
807const char *filename;
808char dirSpec[128];
809int len = 0;
810
811// always reset cpu count to 0 when injecting new acpi
812acpi_cpu_count = 0;
813
814/* Try using the file specified with the DSDT option */
815if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig)) {
816snprintf(dirSpec, sizeof(dirSpec), filename);
817} else {
818sprintf(dirSpec, "DSDT.aml");
819//verbose("dirSpec, DSDT.aml");
820}
821
822// Load replacement DSDT
823new_dsdt = loadACPITable(dirSpec);
824
825// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
826/*if (!new_dsdt)
827 {
828 return setupAcpiNoMod();
829 }*/
830
831// Mozodojo: Load additional SSDTs
832struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
833int ssdt_count=0;
834
835// SSDT Options
836bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
837
838getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
839getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
840getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
841
842DBG("Generating P-States config: %s\n", generate_pstates ? "YES" : "NO");
843DBG("Generating C-States config: %s\n", generate_cstates ? "YES" : "NO");
844//DBG("Generating T-States config: %s\n", generate_tstates ? "YES" : "NO");
845
846{
847int i;
848
849for (i = 0; i < 30; i++) {
850char filename[512];
851
852sprintf(filename, i > 0 ? "SSDT-%d.aml" : "SSDT.aml", i);
853
854if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) ) {
855ssdt_count++;
856} else {
857break;
858}
859}
860}
861
862// Load new table
863sprintf(dirSpec, "ECDT.aml");
864new_table = loadACPITable(dirSpec);
865
866// Do the same procedure for both versions of ACPI
867for (version = 0; version < 2; version++) {
868struct acpi_2_rsdp *rsdp, *rsdp_mod;
869struct acpi_2_rsdt *rsdt, *rsdt_mod;
870int rsdplength;
871
872// Find original rsdp
873rsdp=(struct acpi_2_rsdp *)(version ? getAddressOfAcpi20Table() : getAddressOfAcpiTable());
874if (!rsdp) {
875DBG("No ACPI version %d found. Ignoring\n", version+1);
876if (version) {
877addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
878} else {
879addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
880}
881continue;
882}
883rsdplength=version ? rsdp->Length : 20;
884
885DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
886
887/* FIXME: no check that memory allocation succeeded
888 * Copy and patch RSDP,RSDT, XSDT and FADT
889 * For more info see ACPI Specification pages 110 and following
890 */
891
892rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
893memcpy(rsdp_mod, rsdp, rsdplength);
894
895rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
896
897DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
898
899if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000) {
900uint32_t *rsdt_entries;
901int rsdt_entries_num;
902int dropoffset=0, i, j;
903
904// mozo: using malloc cos I didn't found how to free already allocated kernel memory
905rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
906memcpy (rsdt_mod, rsdt, rsdt->Length);
907rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
908rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
909rsdt_entries=(uint32_t *)(rsdt_mod+1);
910for (i=0;i<rsdt_entries_num;i++) {
911char *table=(char *)(rsdt_entries[i]);
912if (!table) {
913continue;
914}
915
916DBG("TABLE %c%c%c%c@%x: ", table[0],table[1],table[2],table[3],rsdt_entries[i]);
917
918rsdt_entries[i-dropoffset]=rsdt_entries[i];
919
920if (drop_ssdt && tableSign(table, "SSDT")) {
921DBG("dropped (OEM)\n");
922dropoffset++;
923continue;
924}
925
926if (tableSign(table, "DSDT")) {
927if(new_dsdt) {
928rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
929DBG("custom table added\n");
930}
931continue;
932}
933
934if (tableSign(table, "FACP")) {
935struct acpi_2_fadt *fadt, *fadt_mod;
936fadt=(struct acpi_2_fadt *)rsdt_entries[i];
937
938DBG("found, Length %d\n",fadt->Length);
939
940if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000) {
941DBG("FADT incorrect. Not modified\n");
942continue;
943}
944
945fadt_mod = patch_fadt(fadt, new_dsdt);
946rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
947
948// Generate _CST SSDT
949if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
950DBG("C-States generated\n");
951generate_cstates = false; // Generate SSDT only once!
952ssdt_count++;
953}
954
955// Generating _PSS SSDT
956if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
957DBG("P-States generated\n");
958generate_pstates = false; // Generate SSDT only once!
959ssdt_count++;
960}
961continue;
962}
963DBG("copied (OEM)\n");
964}
965
966// Mozodojo: Insert additional SSDTs into RSDT
967if(ssdt_count > 0) {
968for (j=0; j<ssdt_count; j++) {
969rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
970}
971DBG("RSDT: Added %d SSDT table(s)\n", ssdt_count);
972}
973
974if (new_table) {
975rsdt_entries[i-dropoffset+j]=(uint32_t)new_table;
976DBG("RSDT: Added custom table %s @%x\n", "ECDT", new_table);
977}
978
979// Allocate rsdt in Kernel memory area
980rsdt_mod->Length += 4*ssdt_count + 4 - 4*dropoffset;
981struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
982memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
983free(rsdt_mod);
984rsdt_mod = rsdt_copy;
985rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
986rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
987rsdt_entries=(uint32_t *)(rsdt_mod+1);
988
989// Correct the checksum of RSDT
990DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
991
992rsdt_mod->Checksum=0;
993rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
994
995DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
996} else {
997rsdp_mod->RsdtAddress=0;
998DBG("RSDT not found or RSDT incorrect\n");
999}
1000DBG("\n");
1001
1002if (version) {
1003struct acpi_2_xsdt *xsdt, *xsdt_mod;
1004
1005// FIXME: handle 64-bit address correctly
1006
1007xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1008DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
1009
1010if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000) {
1011uint64_t *xsdt_entries;
1012int xsdt_entries_num, i, j;
1013int dropoffset=0;
1014
1015// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1016xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1017memcpy(xsdt_mod, xsdt, xsdt->Length);
1018
1019rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1020xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1021xsdt_entries=(uint64_t *)(xsdt_mod+1);
1022for (i=0;i<xsdt_entries_num;i++) {
1023char *table=(char *)((uint32_t)(xsdt_entries[i]));
1024if (!table) {
1025continue;
1026}
1027
1028DBG("TABLE %c%c%c%c@%x: ", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1029
1030xsdt_entries[i-dropoffset]=xsdt_entries[i];
1031
1032if (drop_ssdt && tableSign(table, "SSDT")) {
1033DBG("dropped (OEM)\n");
1034dropoffset++;
1035continue;
1036}
1037
1038if (tableSign(table, "DSDT")) {
1039if (new_dsdt) {
1040xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1041DBG("custom table added\n");
1042}
1043continue;
1044}
1045if (tableSign(table, "FACP")) {
1046struct acpi_2_fadt *fadt, *fadt_mod;
1047fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1048
1049DBG("found, Length %d\n",(uint32_t)(xsdt_entries[i]>>32), fadt->Length);
1050
1051if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000) {
1052DBG("FADT incorrect or after 4GB. Dropping XSDT\n");
1053goto drop_xsdt;
1054}
1055
1056fadt_mod = patch_fadt(fadt, new_dsdt);
1057xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1058
1059// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1060
1061// Generate _CST SSDT
1062if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
1063DBG("C-States generated\n");
1064generate_cstates = false; // Generate SSDT only once!
1065ssdt_count++;
1066}
1067
1068// Generating _PSS SSDT
1069if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
1070DBG("P-States generated\n");
1071generate_pstates = false; // Generate SSDT only once!
1072ssdt_count++;
1073}
1074
1075continue;
1076}
1077DBG("copied (OEM)\n");
1078// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1079}
1080
1081// Mozodojo: Insert additional SSDTs into XSDT
1082if(ssdt_count > 0) {
1083for (j=0; j<ssdt_count; j++) {
1084xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1085}
1086DBG("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1087}
1088
1089if (new_table) {
1090xsdt_entries[i-dropoffset+j]=(uint32_t)new_table;
1091DBG("XSDT: Added custom table %s @%x\n", "ECDT", new_table);
1092}
1093
1094// Allocate xsdt in Kernel memory area
1095xsdt_mod->Length += 8*ssdt_count + 8 - 8*dropoffset;
1096struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1097memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1098free(xsdt_mod); xsdt_mod = xsdt_copy;
1099rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1100xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1101xsdt_entries=(uint64_t *)(xsdt_mod+1);
1102
1103// Correct the checksum of XSDT
1104DBG("XSDT: Original checksum %d, ", xsdt_mod->Checksum);
1105xsdt_mod->Checksum=0;
1106xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1107DBG("New checksum %d\n", xsdt_mod->Checksum);
1108} else {
1109drop_xsdt:
1110DBG("About to drop XSDT\n");
1111/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1112 * A Better strategy would be to generate
1113 */
1114rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1115verbose("XSDT not found or XSDT incorrect\n");
1116}
1117}
1118DBG("\n");
1119
1120// Correct the checksum of RSDP
1121DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1122rsdp_mod->Checksum=0;
1123rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1124DBG("New checksum %d\n", rsdp_mod->Checksum);
1125
1126if (version) {
1127DBG("RSDP: Original extended checksum %d, ", rsdp_mod->ExtendedChecksum);
1128rsdp_mod->ExtendedChecksum=0;
1129rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1130DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1131}
1132
1133if (version) {
1134/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1135acpi20_p = (uint64_t)(uint32_t)rsdp_mod;
1136addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1137} else {
1138/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1139acpi10_p = (uint64_t)(uint32_t)rsdp_mod;
1140addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1141}
1142DBG("ACPI version %d patching finished\n\n", version+1);
1143}
1144#if DEBUG_ACPI
1145printf("Press a key to continue... (DEBUG_ACPI)\n");
1146getchar();
1147#endif
1148return 1;
1149}
1150

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