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Root/trunk/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 * 2010 mojodojo, 2012 slice
4 */
5
6#include "libsaio.h"
7#include "boot.h"
8#include "bootstruct.h"
9#include "acpi.h"
10#include "efi_tables.h"
11#include "fake_efi.h"
12#include "acpi_patcher.h"
13#include "platform.h"
14#include "cpu.h"
15#include "aml_generator.h"
16
17#ifndef DEBUG_ACPI
18#define DEBUG_ACPI 0
19#endif
20
21#if DEBUG_ACPI==2
22#define DBG(x...) {printf(x); sleep(1);}
23#elif DEBUG_ACPI==1
24#define DBG(x...) printf(x)
25#else
26#define DBG(x...) msglog(x)
27#endif
28
29// Slice: New signature compare function
30boolean_t tableSign(char *table, const char *sgn)
31{
32int i;
33for (i = 0; i < 4; i++)
34{
35if ((table[i] &~0x20) != (sgn[i] &~0x20))
36{
37return false;
38}
39}
40return true;
41}
42
43/* Gets the ACPI 1.0 RSDP address */
44static struct acpi_2_rsdp* getAddressOfAcpiTable()
45{
46/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
47
48void *acpi_addr = (void*)ACPI_RANGE_START;
49
50for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
51{
52if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
53{
54uint8_t csum = checksum8(acpi_addr, 20);
55if(csum == 0)
56{
57// Only return the table if it is a true version 1.0 table (Revision 0)
58if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
59return acpi_addr;
60}
61}
62}
63return NULL;
64}
65
66/* Gets the ACPI 2.0 RSDP address */
67static struct acpi_2_rsdp* getAddressOfAcpi20Table()
68{
69/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
70
71void *acpi_addr = (void*)ACPI_RANGE_START;
72
73for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
74{
75if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
76{
77uint8_t csum = checksum8(acpi_addr, 20);
78
79/* Only assume this is a 2.0 or better table if the revision is greater than 0
80 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
81 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
82 */
83
84if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
85{
86uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
87if(csum2 == 0)
88{
89return acpi_addr;
90}
91}
92}
93}
94return NULL;
95}
96
97/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
98/* WARNING: outDirspec string will be overwritten by subsequent calls! */
99int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
100{
101int fd = 0;
102static char dirSpec[512];
103
104// Try finding 'filename' in the usual places
105// Start searching any potential location for ACPI Table
106snprintf(dirSpec, sizeof(dirSpec), "%s", filename);
107fd = open(dirSpec, 0);
108if (fd < 0) {
109snprintf(dirSpec, sizeof(dirSpec), "/Extra/%s", filename);
110fd = open(dirSpec, 0);
111if (fd < 0)
112{
113snprintf(dirSpec, sizeof(dirSpec), "bt(0,0)/Extra/%s", filename);
114fd = open(dirSpec, 0);
115if (fd < 0) {
116// NOT FOUND:
117DBG("ACPI Table not found: %s\n", filename);
118*dirSpec = '\0';
119}
120}
121}
122
123if (outDirspec) *outDirspec = dirSpec;
124return fd;
125}
126
127void *loadACPITable (const char * filename)
128{
129void *tableAddr;
130const char * dirspec=NULL;
131
132int fd = search_and_get_acpi_fd(filename, &dirspec);
133
134if (fd>=0)
135{
136tableAddr=(void*)AllocateKernelMemory(file_size (fd));
137if (tableAddr)
138{
139if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
140{
141DBG("Couldn't read table %s\n",dirspec);
142free (tableAddr);
143close (fd);
144return NULL;
145}
146
147DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
148close (fd);
149return tableAddr;
150}
151close (fd);
152DBG("Couldn't allocate memory for table \n", dirspec);
153}
154//printf("Couldn't find table %s\n", filename);
155return NULL;
156}
157
158uint8_tacpi_cpu_count = 0;
159char* acpi_cpu_name[32];
160uint32_t acpi_cpu_p_blk = 0;
161
162void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
163{
164uint32_t i;
165
166DBG("Start finding cpu names. length %d\n", length);
167
168for (i=0; i<length-7; i++)
169{
170if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
171{
172DBG("DSDT: %x%x\n", dsdt[i], dsdt[i+1]);
173
174uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
175
176bool add_name = true;
177
178uint8_t j;
179
180for (j=0; j<4; j++)
181{
182char c = dsdt[offset+j];
183
184if (!aml_isvalidchar(c))
185{
186add_name = false;
187DBG("Invalid character found in ProcessorOP 0x%x!\n", c);
188break;
189}
190}
191
192if (add_name)
193{
194acpi_cpu_name[acpi_cpu_count] = malloc(4);
195memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
196i = offset + 5;
197
198if (acpi_cpu_count == 0)
199acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
200
201DBG("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
202
203if (++acpi_cpu_count == 32) {
204return;
205}
206}
207}
208}
209
210DBG("End finding cpu names: cpu names found: %d\n", acpi_cpu_count);
211}
212
213struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
214{
215char ssdt_header[] = // cst_ssdt_header
216{
2170x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2180x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2190x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2200x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2210x31, 0x03, 0x10, 0x20/* 1.._*/
222};
223
224char resource_template_register_fixedhw[] =
225{
2260x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2270x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2280x00, 0x00, 0x01, 0x79, 0x00
229};
230
231char resource_template_register_systemio[] =
232{
2330x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2340x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2350x00, 0x00, 0x00, 0x79, 0x00,
236};
237
238if (Platform.CPU.Vendor != 0x756E6547) {
239DBG("Not an Intel platform: C-States will not be generated !!!\n");
240return NULL;
241}
242
243if (fadt == NULL) {
244DBG("FACP not exists: C-States will not be generated !!!\n");
245return NULL;
246}
247
248struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
249
250if (dsdt == NULL) {
251DBG("DSDT not found: C-States will not be generated !!!\n");
252return NULL;
253}
254
255if (acpi_cpu_count == 0)
256get_acpi_cpu_names((void*)dsdt, dsdt->Length);
257
258if (acpi_cpu_count > 0)
259{
260bool c2_enabled = false;
261bool c3_enabled = false;
262bool c4_enabled = false;
263bool cst_using_systemio = false;
264
265getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
266getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
267getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
268getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
269
270c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
271c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
272
273unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
274
275AML_CHUNK* root = aml_create_node(NULL);
276aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
277AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
278AML_CHUNK* name = aml_add_name(scop, "CST_");
279AML_CHUNK* pack = aml_add_package(name);
280aml_add_byte(pack, cstates_count);
281
282AML_CHUNK* tmpl = aml_add_package(pack);
283if (cst_using_systemio) {
284// C1
285resource_template_register_fixedhw[8] = 0x00;
286resource_template_register_fixedhw[9] = 0x00;
287resource_template_register_fixedhw[18] = 0x00;
288aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
289aml_add_byte(tmpl, 0x01);// C1
290aml_add_word(tmpl, 0x0001);// Latency
291aml_add_dword(tmpl, 0x000003e8);// Power
292
293uint8_t p_blk_lo, p_blk_hi;
294
295if (c2_enabled) // C2
296{
297p_blk_lo = acpi_cpu_p_blk + 4;
298p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
299
300tmpl = aml_add_package(pack);
301resource_template_register_systemio[11] = p_blk_lo; // C2
302resource_template_register_systemio[12] = p_blk_hi; // C2
303aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
304aml_add_byte(tmpl, 0x02);// C2
305aml_add_word(tmpl, 0x0040);// Latency
306aml_add_dword(tmpl, 0x000001f4);// Power
307}
308
309if (c4_enabled) // C4
310{
311p_blk_lo = acpi_cpu_p_blk + 5;
312p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
313
314tmpl = aml_add_package(pack);
315resource_template_register_systemio[11] = p_blk_lo; // C4
316resource_template_register_systemio[12] = p_blk_hi; // C4
317aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
318aml_add_byte(tmpl, 0x04);// C4
319aml_add_word(tmpl, 0x0080);// Latency
320aml_add_dword(tmpl, 0x000000C8);// Power
321}
322else if (c3_enabled) // C3
323{
324p_blk_lo = acpi_cpu_p_blk + 5;
325p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
326
327tmpl = aml_add_package(pack);
328resource_template_register_systemio[11] = p_blk_lo; // C3
329resource_template_register_systemio[12] = p_blk_hi; // C3
330aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
331aml_add_byte(tmpl, 0x03);// C3
332aml_add_word(tmpl, 0x0060);// Latency
333aml_add_dword(tmpl, 0x0000015e);// Power
334}
335}
336else
337{
338// C1
339resource_template_register_fixedhw[11] = 0x00; // C1
340aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
341aml_add_byte(tmpl, 0x01);// C1
342aml_add_word(tmpl, 0x0001);// Latency
343aml_add_dword(tmpl, 0x000003e8);// Power
344
345resource_template_register_fixedhw[18] = 0x03;
346
347if (c2_enabled) // C2
348{
349tmpl = aml_add_package(pack);
350resource_template_register_fixedhw[11] = 0x10; // C2
351aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
352aml_add_byte(tmpl, 0x02);// C2
353aml_add_word(tmpl, 0x0040);// Latency
354aml_add_dword(tmpl, 0x000001f4);// Power
355}
356
357if (c4_enabled) // C4
358{
359tmpl = aml_add_package(pack);
360resource_template_register_fixedhw[11] = 0x30; // C4
361aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
362aml_add_byte(tmpl, 0x04);// C4
363aml_add_word(tmpl, 0x0080);// Latency
364aml_add_dword(tmpl, 0x000000C8);// Power
365}
366else if (c3_enabled)
367{
368tmpl = aml_add_package(pack);
369resource_template_register_fixedhw[11] = 0x20; // C3
370aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
371aml_add_byte(tmpl, 0x03);// C3
372aml_add_word(tmpl, 0x0060);// Latency
373aml_add_dword(tmpl, 0x0000015e);// Power
374}
375}
376
377// Aliaces
378int i;
379for (i = 0; i < acpi_cpu_count; i++)
380{
381char name[9];
382sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
383
384scop = aml_add_scope(root, name);
385aml_add_alias(scop, "CST_", "_CST");
386}
387
388aml_calculate_size(root);
389
390struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
391
392aml_write_node(root, (void*)ssdt, 0);
393
394ssdt->Length = root->Size;
395ssdt->Checksum = 0;
396ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
397
398aml_destroy_node(root);
399
400// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
401
402DBG("SSDT with CPU C-States generated successfully\n");
403
404return ssdt;
405} else {
406DBG("ACPI CPUs not found: C-States not generated !!!\n");
407}
408
409return NULL;
410}
411
412struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
413{
414char ssdt_header[] = // pss_ssdt_header
415{
4160x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4170x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4180x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4190x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4200x31, 0x03, 0x10, 0x20,/* 1.._*/
421};
422
423if (Platform.CPU.Vendor != 0x756E6547) {
424DBG("Not an Intel platform: P-States will not be generated !!!\n");
425return NULL;
426}
427
428if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
429DBG("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
430return NULL;
431}
432
433if (acpi_cpu_count == 0)
434get_acpi_cpu_names((void*)dsdt, dsdt->Length);
435
436if (acpi_cpu_count > 0)
437{
438struct p_state initial, maximum, minimum, p_states[32];
439uint8_t p_states_count = 0;
440
441// Retrieving P-States, ported from code by superhai (c)
442switch (Platform.CPU.Family) {
443case 0x06:
444{
445switch (Platform.CPU.Model)
446{
447case CPU_MODEL_DOTHAN:// Intel Pentium M
448case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
449case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
450case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
451case CPU_MODEL_ATOM:// Intel Atom (45nm)
452{
453bool cpu_dynamic_fsb = false;
454
455if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
456{
457wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
458delay(1);
459cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
460}
461
462bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
463
464initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
465
466maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
467maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
468
469minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
470minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
471
472if (minimum.FID == 0)
473{
474uint64_t msr;
475uint8_t i;
476// Probe for lowest fid
477for (i = maximum.FID; i >= 0x6; i--)
478{
479msr = rdmsr64(MSR_IA32_PERF_CONTROL);
480wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
481intel_waitforsts();
482minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
483delay(1);
484}
485
486msr = rdmsr64(MSR_IA32_PERF_CONTROL);
487wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
488intel_waitforsts();
489}
490
491if (minimum.VID == maximum.VID)
492{
493uint64_t msr;
494uint8_t i;
495// Probe for lowest vid
496for (i = maximum.VID; i > 0xA; i--)
497{
498msr = rdmsr64(MSR_IA32_PERF_CONTROL);
499wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
500intel_waitforsts();
501minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
502delay(1);
503}
504
505msr = rdmsr64(MSR_IA32_PERF_CONTROL);
506wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
507intel_waitforsts();
508}
509
510minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
511
512// Sanity check
513if (maximum.CID < minimum.CID) {
514DBG("P-States: Insane FID values!");
515p_states_count = 0;
516} else {
517uint8_t vidstep;
518uint8_t i = 0, u, invalid = 0;
519// Finalize P-States
520// Find how many P-States machine supports
521p_states_count = (uint8_t)(maximum.CID - minimum.CID + 1);
522
523if (p_states_count > 32) {
524p_states_count = 32;
525}
526
527vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
528
529for (u = 0; u < p_states_count; u++) {
530i = u - invalid;
531
532p_states[i].CID = maximum.CID - u;
533p_states[i].FID = (uint8_t)(p_states[i].CID >> 1);
534
535if (p_states[i].FID < 0x6) {
536if (cpu_dynamic_fsb) {
537p_states[i].FID = (p_states[i].FID << 1) | 0x80;
538}
539} else if (cpu_noninteger_bus_ratio) {
540p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
541}
542
543if (i && p_states[i].FID == p_states[i-1].FID) {
544invalid++;
545}
546p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
547uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
548bool half = p_states[i].FID & 0x40;// = 0x01
549bool dfsb = p_states[i].FID & 0x80;// = 0x00
550uint32_t fsb = (uint32_t)(Platform.CPU.FSBFrequency / 1000000); // = 400
551uint32_t halffsb = (fsb + 1) >> 1;// = 200
552uint32_t frequency = (multiplier * fsb);// = 3200
553
554p_states[i].Frequency = (uint32_t)(frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
555}
556
557p_states_count -= invalid;
558}
559
560break;
561}
562case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
563case CPU_MODEL_DALES:
564case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
565case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
566case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
567case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
568case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
569case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
570case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
571case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
572case CPU_MODEL_HASWELL://
573case CPU_MODEL_IVYBRIDGE_XEON: //
574//case CPU_MODEL_HASWELL_H://
575case CPU_MODEL_HASWELL_SVR://
576case CPU_MODEL_HASWELL_ULT://
577case CPU_MODEL_CRYSTALWELL://
578
579{
580if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
581(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||
582(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_SVR) ||
583(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_CRYSTALWELL))
584{
585maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
586} else {
587maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
588}
589
590minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
591
592DBG("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
593
594// Sanity check
595if (maximum.Control < minimum.Control) {
596DBG("Insane control values!");
597p_states_count = 0;
598} else {
599uint8_t i;
600p_states_count = 0;
601
602for (i = maximum.Control; i >= minimum.Control; i--) {
603p_states[p_states_count].Control = i;
604p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
605p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
606p_states_count++;
607}
608}
609
610break;
611}
612default:
613DBG("Unsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
614break;
615}
616}
617}
618
619// Generating SSDT
620if (p_states_count > 0) {
621int i;
622
623AML_CHUNK* root = aml_create_node(NULL);
624aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
625AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
626AML_CHUNK* name = aml_add_name(scop, "PSS_");
627AML_CHUNK* pack = aml_add_package(name);
628
629for (i = 0; i < p_states_count; i++) {
630AML_CHUNK* pstt = aml_add_package(pack);
631
632aml_add_dword(pstt, p_states[i].Frequency);
633aml_add_dword(pstt, 0x00000000); // Power
634aml_add_dword(pstt, 0x0000000A); // Latency
635aml_add_dword(pstt, 0x0000000A); // Latency
636aml_add_dword(pstt, p_states[i].Control);
637aml_add_dword(pstt, i+1); // Status
638}
639
640// Add aliaces
641for (i = 0; i < acpi_cpu_count; i++) {
642char name[9];
643sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
644
645scop = aml_add_scope(root, name);
646aml_add_alias(scop, "PSS_", "_PSS");
647}
648
649aml_calculate_size(root);
650
651struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
652
653aml_write_node(root, (void*)ssdt, 0);
654
655ssdt->Length = root->Size;
656ssdt->Checksum = 0;
657ssdt->Checksum = 256 - (uint8_t)(checksum8(ssdt, ssdt->Length));
658
659aml_destroy_node(root);
660
661//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
662
663DBG("SSDT with CPU P-States generated successfully\n");
664
665return ssdt;
666}
667} else {
668DBG("ACPI CPUs not found: P-States not generated !!!\n");
669}
670
671return NULL;
672}
673
674struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
675{
676extern void setupSystemType();
677
678struct acpi_2_fadt *fadt_mod = NULL;
679bool fadt_rev2_needed = false;
680bool fix_restart;
681bool fix_restart_ps2;
682const char * value;
683
684// Restart Fix
685if (Platform.CPU.Vendor == 0x756E6547) { /* Intel */
686fix_restart = true;
687fix_restart_ps2 = false;
688if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2) {
689fix_restart = true;
690} else {
691getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
692}
693} else {
694DBG("Not an Intel platform: Restart Fix not applied !!!\n");
695fix_restart = false;
696}
697
698if (fix_restart) {
699fadt_rev2_needed = true;
700}
701
702// Allocate new fadt table
703if (fadt->Length < 0x84 && fadt_rev2_needed)
704{
705fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
706memcpy(fadt_mod, fadt, fadt->Length);
707fadt_mod->Length = 0x84;
708fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
709} else {
710fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
711memcpy(fadt_mod, fadt, fadt->Length);
712}
713// Determine system type / PM_Model
714if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
715{
716if (Platform.Type > 6) {
717if(fadt_mod->PM_Profile<=6) {
718Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
719} else {
720Platform.Type = 1;/* Set a fixed value (Desktop) */
721}
722DBG("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
723} else {
724Platform.Type = (unsigned char) strtoul(value, NULL, 10);
725}
726}
727// Set PM_Profile from System-type if only user wanted this value to be forced
728if (fadt_mod->PM_Profile != Platform.Type) {
729if (value) {
730// user has overriden the SystemType so take care of it in FACP
731DBG("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
732fadt_mod->PM_Profile = Platform.Type;
733} else {
734// PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
735Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
736}
737}
738// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
739// because we need to take care of FACP original content, if it is correct.
740setupSystemType();
741
742// Patch FADT to fix restart
743if (fix_restart) {
744if (fix_restart_ps2) {
745fadt_mod->Flags|= 0x400;
746fadt_mod->Reset_SpaceID= 0x01; // System I/O
747fadt_mod->Reset_BitWidth= 0x08; // 1 byte
748fadt_mod->Reset_BitOffset= 0x00; // Offset 0
749fadt_mod->Reset_AccessWidth= 0x01; // Byte access
750fadt_mod->Reset_Address= 0x64; // Address of the register
751fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
752DBG("FADT: PS2 Restart Fix applied!\n");
753} else {
754fadt_mod->Flags|= 0x400;
755fadt_mod->Reset_SpaceID= 0x01; // System I/O
756fadt_mod->Reset_BitWidth= 0x08; // 1 byte
757fadt_mod->Reset_BitOffset= 0x00; // Offset 0
758fadt_mod->Reset_AccessWidth= 0x01; // Byte access
759fadt_mod->Reset_Address= 0x0cf9; // Address of the register
760fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
761DBG("FADT: ACPI Restart Fix applied!\n");
762}
763
764}
765
766// Patch DSDT Address if we have loaded DSDT.aml
767if(new_dsdt) {
768DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
769
770fadt_mod->DSDT=(uint32_t)new_dsdt;
771if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length) {
772fadt_mod->X_DSDT=(uint32_t)new_dsdt;
773}
774
775DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
776
777DBG("FADT: Using custom DSDT!\n");
778}
779
780// Correct the checksum
781fadt_mod->Checksum=0;
782fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
783
784return fadt_mod;
785}
786
787/* Setup ACPI without replacing DSDT. */
788int setupAcpiNoMod()
789{
790//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
791//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
792/* XXX aserebln why uint32 cast if pointer is uint64 ? */
793acpi10_p = (uint64_t)(uint32_t)getAddressOfAcpiTable();
794acpi20_p = (uint64_t)(uint32_t)getAddressOfAcpi20Table();
795addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
796if(acpi20_p) {
797addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
798} else {
799DBG("No ACPI 2.\n");
800}
801return 1;
802}
803
804/* Setup ACPI. Replace DSDT if DSDT.aml is found */
805int setupAcpi(void)
806{
807int version;
808void *new_dsdt = NULL;
809
810
811const char *filename;
812char dirSpec[128];
813int len = 0;
814
815// always reset cpu count to 0 when injecting new acpi
816acpi_cpu_count = 0;
817
818/* Try using the file specified with the DSDT option */
819if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig)) {
820snprintf(dirSpec, sizeof(dirSpec), filename);
821} else {
822sprintf(dirSpec, "DSDT.aml");
823//verbose("dirSpec, DSDT.aml");
824}
825
826// Load replacement DSDT
827new_dsdt = loadACPITable(dirSpec);
828
829// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
830/*if (!new_dsdt)
831 {
832 return setupAcpiNoMod();
833 }*/
834
835// Mozodojo: Load additional SSDTs
836struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
837int ssdt_count=0;
838
839// SSDT Options
840bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
841
842getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
843getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
844getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
845
846DBG("Generating P-States config: %s\n", generate_pstates ? "YES" : "NO");
847DBG("Generating C-States config: %s\n", generate_cstates ? "YES" : "NO");
848
849{
850int i;
851
852for (i = 0; i < 30; i++) {
853char filename[512];
854
855sprintf(filename, i > 0 ? "SSDT-%d.aml" : "SSDT.aml", i);
856
857if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) ) {
858ssdt_count++;
859} else {
860break;
861}
862}
863}
864
865// Do the same procedure for both versions of ACPI
866for (version = 0; version < 2; version++) {
867struct acpi_2_rsdp *rsdp, *rsdp_mod;
868struct acpi_2_rsdt *rsdt, *rsdt_mod;
869int rsdplength;
870
871// Find original rsdp
872rsdp=(struct acpi_2_rsdp *)(version ? getAddressOfAcpi20Table() : getAddressOfAcpiTable());
873if (!rsdp) {
874DBG("No ACPI version %d found. Ignoring\n", version+1);
875if (version) {
876addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
877} else {
878addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
879}
880continue;
881}
882rsdplength=version ? rsdp->Length : 20;
883
884DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
885
886/* FIXME: no check that memory allocation succeeded
887 * Copy and patch RSDP,RSDT, XSDT and FADT
888 * For more info see ACPI Specification pages 110 and following
889 */
890
891rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
892memcpy(rsdp_mod, rsdp, rsdplength);
893
894rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
895
896DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
897
898if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000) {
899uint32_t *rsdt_entries;
900int rsdt_entries_num;
901int dropoffset=0, i;
902
903// mozo: using malloc cos I didn't found how to free already allocated kernel memory
904rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
905memcpy (rsdt_mod, rsdt, rsdt->Length);
906rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
907rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
908rsdt_entries=(uint32_t *)(rsdt_mod+1);
909for (i=0;i<rsdt_entries_num;i++) {
910char *table=(char *)(rsdt_entries[i]);
911if (!table) {
912continue;
913}
914
915DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
916
917rsdt_entries[i-dropoffset]=rsdt_entries[i];
918
919if (drop_ssdt && tableSign(table, "SSDT")) {
920DBG("OEM SSDT tables was dropped\n");
921dropoffset++;
922continue;
923}
924
925if (tableSign(table, "DSDT")) {
926DBG("DSDT found\n");
927verbose("Custom DSDT table was found\n");
928if(new_dsdt) {
929rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
930}
931continue;
932}
933
934if (tableSign(table, "FACP")) {
935struct acpi_2_fadt *fadt, *fadt_mod;
936fadt=(struct acpi_2_fadt *)rsdt_entries[i];
937
938DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
939
940if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000) {
941DBG("FADT incorrect. Not modified\n");
942continue;
943}
944
945fadt_mod = patch_fadt(fadt, new_dsdt);
946rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
947
948// Generate _CST SSDT
949if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
950DBG("C-States generated\n");
951generate_cstates = false; // Generate SSDT only once!
952ssdt_count++;
953}
954
955// Generating _PSS SSDT
956if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
957DBG("P-States generated\n");
958generate_pstates = false; // Generate SSDT only once!
959ssdt_count++;
960}
961continue;
962}
963}
964DBG("\n");
965
966// Allocate rsdt in Kernel memory area
967rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
968struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
969memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
970free(rsdt_mod); rsdt_mod = rsdt_copy;
971rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
972rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
973rsdt_entries=(uint32_t *)(rsdt_mod+1);
974
975// Mozodojo: Insert additional SSDTs into RSDT
976if(ssdt_count > 0) {
977int j;
978
979for (j=0; j<ssdt_count; j++) {
980rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
981}
982DBG("RSDT: Added %d SSDT table(s)\n", ssdt_count);
983
984}
985
986// Correct the checksum of RSDT
987DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
988
989rsdt_mod->Checksum=0;
990rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
991
992DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
993} else {
994rsdp_mod->RsdtAddress=0;
995DBG("RSDT not found or RSDT incorrect\n");
996}
997DBG("\n");
998
999if (version) {
1000struct acpi_2_xsdt *xsdt, *xsdt_mod;
1001
1002// FIXME: handle 64-bit address correctly
1003
1004xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1005DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
1006
1007if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000) {
1008uint64_t *xsdt_entries;
1009int xsdt_entries_num, i;
1010int dropoffset=0;
1011
1012// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1013xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1014memcpy(xsdt_mod, xsdt, xsdt->Length);
1015
1016rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1017xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1018xsdt_entries=(uint64_t *)(xsdt_mod+1);
1019for (i=0;i<xsdt_entries_num;i++) {
1020char *table=(char *)((uint32_t)(xsdt_entries[i]));
1021if (!table) {
1022continue;
1023}
1024xsdt_entries[i-dropoffset]=xsdt_entries[i];
1025
1026if (drop_ssdt && tableSign(table, "SSDT")) {
1027DBG("dropped (OEM)\n");
1028dropoffset++;
1029continue;
1030}
1031if (tableSign(table, "DSDT")) {
1032DBG("DSDT found\n");
1033
1034if (new_dsdt) {
1035xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1036DBG("custom table added\n");
1037}
1038
1039DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1040
1041continue;
1042}
1043if (tableSign(table, "FACP")) {
1044struct acpi_2_fadt *fadt, *fadt_mod;
1045fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1046
1047DBG("FADT found @%x%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1048fadt->Length);
1049
1050if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000) {
1051DBG("FADT incorrect or after 4GB. Dropping XSDT\n");
1052goto drop_xsdt;
1053}
1054
1055fadt_mod = patch_fadt(fadt, new_dsdt);
1056xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1057
1058// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1059
1060// Generate _CST SSDT
1061if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
1062DBG("C-States generated\n");
1063generate_cstates = false; // Generate SSDT only once!
1064ssdt_count++;
1065}
1066
1067// Generating _PSS SSDT
1068if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
1069DBG("P-States generated\n");
1070generate_pstates = false; // Generate SSDT only once!
1071ssdt_count++;
1072}
1073
1074continue;
1075}
1076DBG("copied (OEM)\n");
1077// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1078}
1079
1080// Allocate xsdt in Kernel memory area
1081xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1082struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1083memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1084free(xsdt_mod); xsdt_mod = xsdt_copy;
1085rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1086xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1087xsdt_entries=(uint64_t *)(xsdt_mod+1);
1088
1089// Mozodojo: Insert additional SSDTs into XSDT
1090if(ssdt_count > 0) {
1091int j;
1092
1093for (j=0; j<ssdt_count; j++) {
1094xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1095}
1096
1097verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1098}
1099
1100// Correct the checksum of XSDT
1101xsdt_mod->Checksum=0;
1102xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1103} else {
1104drop_xsdt:
1105
1106DBG("About to drop XSDT\n");
1107
1108/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1109 * A Better strategy would be to generate
1110 */
1111
1112rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1113verbose("XSDT not found or XSDT incorrect\n");
1114}
1115}
1116DBG("\n");
1117
1118// Correct the checksum of RSDP
1119
1120DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1121rsdp_mod->Checksum=0;
1122rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1123DBG("New checksum %d\n", rsdp_mod->Checksum);
1124
1125if (version) {
1126DBG("RSDP: Original extended checksum %d, ", rsdp_mod->ExtendedChecksum);
1127rsdp_mod->ExtendedChecksum=0;
1128rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1129DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1130}
1131
1132if (version)
1133{
1134/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1135acpi20_p = (uint64_t)(uint32_t)rsdp_mod;
1136addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1137}
1138else
1139{
1140/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1141acpi10_p = (uint64_t)(uint32_t)rsdp_mod;
1142addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1143}
1144DBG("ACPI version %d patching finished\n\n", version+1);
1145}
1146#if DEBUG_ACPI
1147printf("Press a key to continue... (DEBUG_ACPI)\n");
1148getchar();
1149#endif
1150return 1;
1151}
1152

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