Chameleon

Chameleon Svn Source Tree

Root/trunk/i386/libsaio/nvidia.c

1/*
2 *NVidia injector
3 *
4 *Copyright (C) 2009Jasmin Fazlic, iNDi
5 *
6 *NVidia injector modified by Fabio (ErmaC) on May 2012,
7 *for allow the cosmetics injection also based on SubVendorID and SubDeviceID.
8 *
9 *NVidia injector is free software: you can redistribute it and/or modify
10 *it under the terms of the GNU General Public License as published by
11 *the Free Software Foundation, either version 3 of the License, or
12 *(at your option) any later version.
13 *
14 *NVidia driver and injector is distributed in the hope that it will be useful,
15 *but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 *GNU General Public License for more details.
18 *
19 *You should have received a copy of the GNU General Public License
20 *along with NVidia injector. If not, see <http://www.gnu.org/licenses/>.
21 *
22 *Alternatively you can choose to comply with APSL
23 *
24 *DCB-Table parsing is based on software (nouveau driver) originally distributed under following license:
25 *
26 *
27 *Copyright 2005-2006 Erik Waling
28 *Copyright 2006 Stephane Marchesin
29 *Copyright 2007-2009 Stuart Bennett
30 *
31 *Permission is hereby granted, free of charge, to any person obtaining a
32 *copy of this software and associated documentation files (the "Software"),
33 *to deal in the Software without restriction, including without limitation
34 *the rights to use, copy, modify, merge, publish, distribute, sublicense,
35 *and/or sell copies of the Software, and to permit persons to whom the
36 *Software is furnished to do so, subject to the following conditions:
37 *
38 *The above copyright notice and this permission notice shall be included in
39 *all copies or substantial portions of the Software.
40 *
41 *THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
42 *IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
43 *FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
44 *THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 *WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
46 *OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
47 *SOFTWARE.
48 */
49
50#include "boot.h"
51#include "bootstruct.h"
52#include "pci.h"
53#include "platform.h"
54#include "device_inject.h"
55#include "convert.h"
56#include "nvidia.h"
57#include "nvidia_helper.h"
58
59#ifndef DEBUG_NVIDIA
60#define DEBUG_NVIDIA 0
61#endif
62
63#if DEBUG_NVIDIA
64#define DBG(x...)printf(x)
65#else
66#define DBG(x...)
67#endif
68
69#define NVIDIA_ROM_SIZE0x20000
70#define PATCH_ROM_SUCCESS1
71#define PATCH_ROM_SUCCESS_HAS_LVDS2
72#define PATCH_ROM_FAILED0
73#define MAX_NUM_DCB_ENTRIES16
74#define TYPE_GROUPED0xff
75#define READ_BYTE(rom, offset) (*(u_char *)(rom + offset))
76#define READ_LE_SHORT(rom, offset) (READ_BYTE(rom, offset+1) << 8 | READ_BYTE(rom, offset))
77#define READ_LE_INT(rom, offset) (READ_LE_SHORT(rom, offset+2) << 16 | READ_LE_SHORT(rom, offset))
78#define WRITE_LE_SHORT(data) (((data) << 8 & 0xff00) | ((data) >> 8 & 0x00ff ))
79#define WRITE_LE_INT(data) (WRITE_LE_SHORT(data) << 16 | WRITE_LE_SHORT(data >> 16))
80
81static boolshowGeneric= false;
82static boolnvidiaSingle= true;
83static booldoit= false;
84char generic_name[128];
85extern uint32_t devices_number;
86
87const char *nvidia_compatible_0[] ={ "@0,compatible","NVDA,NVMac" };
88const char *nvidia_compatible_1[] ={ "@1,compatible","NVDA,NVMac" };
89const char *nvidia_device_type_0[] ={ "@0,device_type","display" };
90const char *nvidia_device_type_1[] ={ "@1,device_type","display" };
91const char *nvidia_device_type_parent[] ={ "device_type","NVDA,Parent" };
92const char *nvidia_device_type_child[]={ "device_type","NVDA,Child" };
93const char *nvidia_name_0[] ={ "@0,name","NVDA,Display-A" };
94const char *nvidia_name_1[] ={ "@1,name","NVDA,Display-B" };
95//const char *nvidia_slot_name[] ={ "AAPL,slot-name", "Slot-1" };
96
97static uint8_t default_NVCAP[]= {
980x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00,
990x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
1000x00, 0x00, 0x00, 0x00
101};
102
103#define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )
104
105static uint8_t default_dcfg_0[]={0x03, 0x01, 0x03, 0x00};
106static uint8_t default_dcfg_1[]={0xff, 0xff, 0x00, 0x01};
107
108#define DCFG0_LEN ( sizeof(default_dcfg_0) / sizeof(uint8_t) )
109#define DCFG1_LEN ( sizeof(default_dcfg_1) / sizeof(uint8_t) )
110
111static uint8_t default_NVPM[]= {
1120x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1130x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1140x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1150x00, 0x00, 0x00, 0x00
116};
117
118#define NVPM_LEN ( sizeof(default_NVPM) / sizeof(uint8_t) )
119
120static nvidia_pci_info_t nvidia_card_vendors[] = {
121{ 0x10190000,"Elitegroup" },
122{ 0x10250000,"Acer" },
123{ 0x10280000,"Dell" },
124{ 0x10330000,"NEC" },
125{ 0x103C0000,"HP" },
126{ 0x10430000,"Asus" },
127{ 0x104D0000,"Sony" },
128{ 0x105B0000,"Foxconn" },
129{ 0x106B0000,"Apple" },
130{ 0x10710000,"Mitac" },
131{ 0x107B0000,"Gateway" },
132{ 0x107D0000,"Leadtek" },
133{ 0x109F0000,"Trigem" },
134{ 0x10B00000,"Gainward" },
135{ 0x10CF0000,"Fujitsu" },
136{ 0x10DE0000,"nVidia" },
137{ 0x11790000,"Toshiba" },
138{ 0x12970000,"Shuttle" },
139{ 0x13DC0000,"Netbost" },
140{ 0x144D0000,"Samsung" },
141{ 0x14580000,"Gigabyte" },
142{ 0x14620000,"MSi" },
143{ 0x14C00000,"Compal" },
144{ 0x152D0000,"Quanta" },
145{ 0x15540000,"Prolink" },
146{ 0x15580000,"Clevo" },
147{ 0x15690000,"Palit" },
148{ 0x161F0000,"Arima" },
149 { 0x16310000,"NEC" },
150{ 0x16420000,"Bitland" },
151{ 0x16820000,"XFX" },
152{ 0x17340000,"Fujitsu" },
153{ 0x174B0000,"PC Partner" },
154{ 0x17AA0000,"Lenovo" },
155 { 0x17C00000,"Wistron" },
156{ 0x17FF0000,"Benq" },
157{ 0x18490000,"ASRock" },
158{ 0x18540000,"LG" },
159{ 0x18640000,"LG" },
160{ 0x18940000,"LG" },
161{ 0x19610000,"ESS" },
162{ 0x196E0000,"PNY" },
163{ 0x19910000,"Topstar" },
164{ 0x19DA0000,"Zotac" },
165{ 0x19F10000,"BFG" },
166{ 0x1ACC0000,"Point of View" },
167{ 0x1B0A0000,"Pegatron" },
168{ 0x1B130000,"Jaton" },
169{ 0x34420000,"Bihl" },
170{ 0x38420000,"EVGA" },
171{ 0x73770000,"Colorful" },
172};
173
174static nvidia_pci_info_t nvidia_card_generic[] = {
175// 0000 - 0040
176{ 0x10DE0000,"Unknown" },
177// 0040 - 004F
178/*
179{ 0x10DE0040,"GeForce 6800 Ultra" },
180{ 0x10DE0041,"GeForce 6800" },
181{ 0x10DE0042,"GeForce 6800 LE" },
182{ 0x10DE0043,"GeForce 6800 XE" },
183{ 0x10DE0044,"GeForce 6800 XT" },
184{ 0x10DE0045,"GeForce 6800 GT" },
185{ 0x10DE0046,"GeForce 6800 GT" },
186{ 0x10DE0047,"GeForce 6800 GS" },
187{ 0x10DE0048,"GeForce 6800 XT" },
188{ 0x10DE0049,"NV40GL" },
189{ 0x10DE004D,"Quadro FX 3400" },
190{ 0x10DE004E,"Quadro FX 4000" },
191*/
192// 0050 - 005F
193// 0060 - 006F
194// 0070 - 007F
195// 0080 - 008F
196// 0090 - 009F
197{ 0x10DE0090,"GeForce 7800 GTX" },
198{ 0x10DE0091,"GeForce 7800 GTX" },
199{ 0x10DE0092,"GeForce 7800 GT" },
200{ 0x10DE0093,"GeForce 7800 GS" },
201{ 0x10DE0094,"GeForce 7800SE/XT/LE/LT/ZT" },
202{ 0x10DE0095,"GeForce 7800 SLI" },
203{ 0x10DE0098,"GeForce Go 7800" },
204{ 0x10DE0099,"GeForce Go 7800 GTX" },
205{ 0x10DE009D,"Quadro FX 4500" },
206// 00A0 - 00AF
207// 00B0 - 00BF
208// 00C0 - 00CF
209/*
210{ 0x10DE00C0,"GeForce 6800 GS" },
211{ 0x10DE00C1,"GeForce 6800" },
212{ 0x10DE00C2,"GeForce 6800 LE" },
213{ 0x10DE00C3,"GeForce 6800 XT" },
214{ 0x10DE00C8,"GeForce Go 6800" },
215{ 0x10DE00C9,"GeForce Go 6800 Ultra" },
216{ 0x10DE00CC,"Quadro FX Go1400" },
217{ 0x10DE00CD,"Quadro FX 3450/4000 SDI" },
218{ 0x10DE00CE,"Quadro FX 1400" },
219// 00D0 - 00DF
220// 00E0 - 00EF
221// 00F0 - 00FF
222{ 0x10DE00F1,"GeForce 6600 GT" },
223{ 0x10DE00F2,"GeForce 6600" },
224{ 0x10DE00F3,"GeForce 6200" },
225{ 0x10DE00F4,"GeForce 6600 LE" },
226{ 0x10DE00F5,"GeForce 7800 GS" },
227{ 0x10DE00F6,"GeForce 6800 GS/XT" },
228{ 0x10DE00F8,"Quadro FX 3400/4400" },
229{ 0x10DE00F9,"GeForce 6800 Series GPU" },
230*/
231// 0100 - 010F
232// 0110 - 011F
233// 0120 - 012F
234// 0130 - 013F
235// 0140 - 014F
236/*
237{ 0x10DE0140,"GeForce 6600 GT" },
238{ 0x10DE0141,"GeForce 6600" },
239{ 0x10DE0142,"GeForce 6600 LE" },
240{ 0x10DE0143,"GeForce 6600 VE" },
241{ 0x10DE0144,"GeForce Go 6600" },
242{ 0x10DE0145,"GeForce 6610 XL" },
243{ 0x10DE0146,"GeForce Go 6600 TE/6200 TE" },
244{ 0x10DE0147,"GeForce 6700 XL" },
245{ 0x10DE0148,"GeForce Go 6600" },
246{ 0x10DE0149,"GeForce Go 6600 GT" },
247{ 0x10DE014A,"Quadro NVS 440" },
248{ 0x10DE014B,"NV43" },
249{ 0x10DE014C,"Quadro FX 550" },
250{ 0x10DE014D,"Quadro FX 550" },
251{ 0x10DE014E,"Quadro FX 540" },
252{ 0x10DE014F,"GeForce 6200" },
253// 0150 - 015F
254// 0160 - 016F
255{ 0x10DE0160,"GeForce 6500" },
256{ 0x10DE0161,"GeForce 6200 TurboCache(TM)" },
257{ 0x10DE0162,"GeForce 6200SE TurboCache(TM)" },
258{ 0x10DE0163,"GeForce 6200 LE" },
259{ 0x10DE0164,"GeForce Go 6200" },
260{ 0x10DE0165,"Quadro NVS 285" },
261{ 0x10DE0166,"GeForce Go 6400" },
262{ 0x10DE0167,"GeForce Go 6200" },
263{ 0x10DE0168,"GeForce Go 6400" },
264{ 0x10DE0169,"GeForce 6250" },
265{ 0x10DE016A,"GeForce 7100 GS" },
266{ 0x10DE016C,"NVIDIA NV44GLM" },
267{ 0x10DE016D,"NVIDIA NV44GLM" },
268*/
269// 0170 - 017F
270// 0180 - 018F
271// 0190 - 019F
272{ 0x10DE0190,"GeForce 8800" },
273{ 0x10DE0191,"GeForce 8800 GTX" },
274{ 0x10DE0192,"GeForce 8800" },
275{ 0x10DE0193,"GeForce 8800 GTS" },
276{ 0x10DE0194,"GeForce 8800 Ultra" },
277{ 0x10DE0197,"Tesla C870" },
278{ 0x10DE019D,"Quadro FX 5600" },
279{ 0x10DE019E,"Quadro FX 4600" },
280// 01A0 - 01AF
281// 01B0 - 01BF
282// 01C0 - 01CF
283// 01D0 - 01DF
284{ 0x10DE01D0,"GeForce 7350 LE" },
285{ 0x10DE01D1,"GeForce 7300 LE" },
286{ 0x10DE01D2,"GeForce 7550 LE" },
287{ 0x10DE01D3,"GeForce 7300 SE/7200 GS" },
288{ 0x10DE01D6,"GeForce Go 7200" },
289{ 0x10DE01D7,"GeForce Go 7300" },
290{ 0x10DE01D8,"GeForce Go 7400" },
291{ 0x10DE01D9,"GeForce Go 7450" },
292{ 0x10DE01DA,"Quadro NVS 110M" },
293{ 0x10DE01DB,"Quadro NVS 120M" },
294{ 0x10DE01DC,"Quadro FX 350M" },
295{ 0x10DE01DD,"GeForce 7500 LE" },
296{ 0x10DE01DE,"Quadro FX 350" },
297{ 0x10DE01DF,"GeForce 7300 GS" },
298// 01E0 - 01EF
299// 01F0 - 01FF
300/*
301{ 0x10DE01F0,"GeForce4 MX" },
302// 0200 - 020F
303// 0210 - 021F
304{ 0x10DE0211,"GeForce 6800" },
305{ 0x10DE0212,"GeForce 6800 LE" },
306{ 0x10DE0215,"GeForce 6800 GT" },
307{ 0x10DE0218,"GeForce 6800 XT" },
308// 0220 - 022F
309{ 0x10DE0221,"GeForce 6200" },
310{ 0x10DE0222,"GeForce 6200 A-LE" },
311{ 0x10DE0228,"NVIDIA NV44M" },
312// 0230 - 023F
313// 0240 - 024F
314{ 0x10DE0240,"GeForce 6150" },
315{ 0x10DE0241,"GeForce 6150 LE" },
316{ 0x10DE0242,"GeForce 6100" },
317{ 0x10DE0243,"NVIDIA C51" },
318{ 0x10DE0244,"GeForce Go 6150" },
319{ 0x10DE0245,"Quadro NVS 210S / GeForce 6150LE" },
320{ 0x10DE0247,"GeForce Go 6100" },
321// 0250 - 025F
322{ 0x10DE025B,"Quadro4 700 XGL" },
323*/
324// 0260 - 026F
325// 0270 - 027F
326// 0280 - 028F
327// 0290 - 029F
328{ 0x10DE0290,"GeForce 7900 GTX" },
329{ 0x10DE0291,"GeForce 7900 GT/GTO" },
330{ 0x10DE0292,"GeForce 7900 GS" },
331{ 0x10DE0293,"GeForce 7950 GX2" },
332{ 0x10DE0294,"GeForce 7950 GX2" },
333{ 0x10DE0295,"GeForce 7950 GT" },
334{ 0x10DE0296,"G71" },
335{ 0x10DE0297,"GeForce Go 7950 GTX" },
336{ 0x10DE0298,"GeForce Go 7900 GS" },
337{ 0x10DE0299,"GeForce Go 7900 GTX" },
338{ 0x10DE029A,"Quadro FX 2500M" },
339{ 0x10DE029B,"Quadro FX 1500M" },
340{ 0x10DE029C,"Quadro FX 5500" },
341{ 0x10DE029D,"Quadro FX 3500" },
342{ 0x10DE029E,"Quadro FX 1500" },
343{ 0x10DE029F,"Quadro FX 4500 X2" },
344// 02A0 - 02AF
345// 02B0 - 02BF
346// 02C0 - 02CF
347// 02D0 - 02DF
348// 02E0 - 02EF
349{ 0x10DE02E0,"GeForce 7600 GT" },
350{ 0x10DE02E1,"GeForce 7600 GS" },
351{ 0x10DE02E2,"GeForce 7300 GT" },
352{ 0x10DE02E3,"GeForce 7900 GS" },
353{ 0x10DE02E4,"GeForce 7950 GT" },
354// 02F0 - 02FF
355// 0300 - 030F
356/*
357{ 0x10DE0301,"GeForce FX 5800 Ultra" },
358{ 0x10DE0302,"GeForce FX 5800" },
359{ 0x10DE0308,"Quadro FX 2000" },
360{ 0x10DE0309,"Quadro FX 1000" },
361// 0310 - 031F
362{ 0x10DE0311,"GeForce FX 5600 Ultra" },
363{ 0x10DE0312,"GeForce FX 5600" },
364{ 0x10DE0314,"GeForce FX 5600XT" },
365{ 0x10DE031A,"GeForce FX Go5600" },
366{ 0x10DE031B,"GeForce FX Go5650" },
367{ 0x10DE031C,"Quadro FX Go700" },
368// 0320 - 032F
369{ 0x10DE0320,"GeForce FX 5200" },
370{ 0x10DE0321,"GeForce FX 5200 Ultra" },
371{ 0x10DE0322,"GeForce FX 5200" },
372{ 0x10DE0323,"GeForce FX 5200 LE" },
373{ 0x10DE0324,"GeForce FX Go5200" },
374{ 0x10DE0325,"GeForce FX Go5250" },
375{ 0x10DE0326,"GeForce FX 5500" },
376{ 0x10DE0328,"GeForce FX Go5200 32M/64M" },
377{ 0x10DE0329,"GeForce FX Go5200" },
378{ 0x10DE032A,"Quadro NVS 55/280 PCI" },
379{ 0x10DE032B,"Quadro FX 500/600 PCI" },
380{ 0x10DE032C,"GeForce FX Go53xx Series" },
381{ 0x10DE032D,"GeForce FX Go5100" },
382{ 0x10DE032F,"NV34GL" },
383// 0330 - 033F
384{ 0x10DE0330,"GeForce FX 5900 Ultra" },
385{ 0x10DE0331,"GeForce FX 5900" },
386{ 0x10DE0332,"GeForce FX 5900XT" },
387{ 0x10DE0333,"GeForce FX 5950 Ultra" },
388{ 0x10DE0334,"GeForce FX 5900ZT" },
389{ 0x10DE0338,"Quadro FX 3000" },
390{ 0x10DE033F,"Quadro FX 700" },
391// 0340 - 034F
392{ 0x10DE0341,"GeForce FX 5700 Ultra" },
393{ 0x10DE0342,"GeForce FX 5700" },
394{ 0x10DE0343,"GeForce FX 5700LE" },
395{ 0x10DE0344,"GeForce FX 5700VE" },
396{ 0x10DE0345,"NV36.5" },
397{ 0x10DE0347,"GeForce FX Go5700" },
398{ 0x10DE0348,"GeForce FX Go5700" },
399{ 0x10DE0349,"NV36M Pro" },
400{ 0x10DE034B,"NV36MAP" },
401{ 0x10DE034C,"Quadro FX Go1000" },
402{ 0x10DE034E,"Quadro FX 1100" },
403{ 0x10DE034F,"NV36GL" },
404*/
405// 0350 - 035F
406// 0360 - 036F
407// 0370 - 037F
408// 0380 - 038F
409{ 0x10DE038B,"GeForce 7650 GS" },
410// 0390 - 039F
411{ 0x10DE0390,"GeForce 7650 GS" },
412{ 0x10DE0391,"GeForce 7600 GT" },
413{ 0x10DE0392,"GeForce 7600 GS" },
414{ 0x10DE0393,"GeForce 7300 GT" },
415{ 0x10DE0394,"GeForce 7600 LE" },
416{ 0x10DE0395,"GeForce 7300 GT" },
417{ 0x10DE0397,"GeForce Go 7700" },
418{ 0x10DE0398,"GeForce Go 7600" },
419{ 0x10DE0399,"GeForce Go 7600 GT"},
420{ 0x10DE039A,"Quadro NVS 300M" },
421{ 0x10DE039B,"GeForce Go 7900 SE" },
422{ 0x10DE039C,"Quadro FX 560M" },
423{ 0x10DE039E,"Quadro FX 560" },
424// 03A0 - 03AF
425// 03B0 - 03BF
426// 03C0 - 03CF
427// 03D0 - 03DF
428{ 0x10DE03D0,"GeForce 6150SE nForce 430" },
429{ 0x10DE03D1,"GeForce 6100 nForce 405" },
430{ 0x10DE03D2,"GeForce 6100 nForce 400" },
431{ 0x10DE03D5,"GeForce 6100 nForce 420" },
432{ 0x10DE03D6,"GeForce 7025 / nForce 630a" },
433// 03E0 - 03EF
434// 03F0 - 03FF
435// 0400 - 040F
436{ 0x10DE0400,"GeForce 8600 GTS" },
437{ 0x10DE0401,"GeForce 8600 GT" },
438{ 0x10DE0402,"GeForce 8600 GT" },
439{ 0x10DE0403,"GeForce 8600 GS" },
440{ 0x10DE0404,"GeForce 8400 GS" },
441{ 0x10DE0405,"GeForce 9500M GS" },
442{ 0x10DE0406,"GeForce 8300 GS" },
443{ 0x10DE0407,"GeForce 8600M GT" },
444{ 0x10DE0408,"GeForce 9650M GS" },
445{ 0x10DE0409,"GeForce 8700M GT" },
446{ 0x10DE040A,"Quadro FX 370" },
447{ 0x10DE040B,"Quadro NVS 320M" },
448{ 0x10DE040C,"Quadro FX 570M" },
449{ 0x10DE040D,"Quadro FX 1600M" },
450{ 0x10DE040E,"Quadro FX 570" },
451{ 0x10DE040F,"Quadro FX 1700" },
452// 0410 - 041F
453{ 0x10DE0410,"GeForce GT 330" },
454// 0420 - 042F
455{ 0x10DE0420,"GeForce 8400 SE" },
456{ 0x10DE0421,"GeForce 8500 GT" },
457{ 0x10DE0422,"GeForce 8400 GS" },
458{ 0x10DE0423,"GeForce 8300 GS" },
459{ 0x10DE0424,"GeForce 8400 GS" },
460{ 0x10DE0425,"GeForce 8600M GS" },
461{ 0x10DE0426,"GeForce 8400M GT" },
462{ 0x10DE0427,"GeForce 8400M GS" },
463{ 0x10DE0428,"GeForce 8400M G" },
464{ 0x10DE0429,"Quadro NVS 140M" },
465{ 0x10DE042A,"Quadro NVS 130M" },
466{ 0x10DE042B,"Quadro NVS 135M" },
467{ 0x10DE042C,"GeForce 9400 GT" },
468{ 0x10DE042D,"Quadro FX 360M" },
469{ 0x10DE042E,"GeForce 9300M G" },
470{ 0x10DE042F,"Quadro NVS 290" },
471// 0430 - 043F
472// 0440 - 044F
473// 0450 - 045F
474// 0460 - 046F
475// 0470 - 047F
476// 0480 - 048F
477// 0490 - 049F
478// 04A0 - 04AF
479// 04B0 - 04BF
480// 04C0 - 04CF
481{ 0x10DE04C0,"NVIDIA G78" },
482{ 0x10DE04C1,"NVIDIA G78" },
483{ 0x10DE04C2,"NVIDIA G78" },
484{ 0x10DE04C3,"NVIDIA G78" },
485{ 0x10DE04C4,"NVIDIA G78" },
486{ 0x10DE04C5,"NVIDIA G78" },
487{ 0x10DE04C6,"NVIDIA G78" },
488{ 0x10DE04C7,"NVIDIA G78" },
489{ 0x10DE04C8,"NVIDIA G78" },
490{ 0x10DE04C9,"NVIDIA G78" },
491{ 0x10DE04CA,"NVIDIA G78" },
492{ 0x10DE04CB,"NVIDIA G78" },
493{ 0x10DE04CC,"NVIDIA G78" },
494{ 0x10DE04CD,"NVIDIA G78" },
495{ 0x10DE04CE,"NVIDIA G78" },
496{ 0x10DE04CF,"NVIDIA G78" },
497// 04D0 - 04DF
498// 04E0 - 04EF
499// 04F0 - 04FF
500// 0500 - 050F
501// 0510 - 051F
502// 0520 - 052F
503// 0530 - 053F
504{ 0x10DE0530,"GeForce 7190M / nForce 650M" },
505{ 0x10DE0531,"GeForce 7150M / nForce 630M" },
506{ 0x10DE0533,"GeForce 7000M / nForce 610M" },
507{ 0x10DE053A,"GeForce 7050 PV / nForce 630a" },
508{ 0x10DE053B,"GeForce 7050 PV / nForce 630a" },
509{ 0x10DE053E,"GeForce 7025 / nForce 630a" },
510// 0540 - 054F
511// 0550 - 055F
512// 0560 - 056F
513// 0570 - 057F
514// 0580 - 058F
515// 0590 - 059F
516// 05A0 - 05AF
517// 05B0 - 05BF
518// 05C0 - 05CF
519// 05D0 - 05DF
520// 05E0 - 05EF
521{ 0x10DE05E0,"GeForce GTX 295" },
522{ 0x10DE05E1,"GeForce GTX 280" },
523{ 0x10DE05E2,"GeForce GTX 260" },
524{ 0x10DE05E3,"GeForce GTX 285" },
525{ 0x10DE05E4,"NVIDIA GT200" },
526{ 0x10DE05E5,"NVIDIA GT200" },
527{ 0x10DE05E6,"GeForce GTX 275" },
528{ 0x10DE05E7,"nVidia Tesla C1060" },
529{ 0x10DE05E8,"NVIDIA GT200" },
530{ 0x10DE05E9,"NVIDIA GT200" },
531{ 0x10DE05EA,"GeForce GTX 260" },
532{ 0x10DE05EB,"GeForce GTX 295" },
533{ 0x10DE05EC,"NVIDIA GT200" },
534{ 0x10DE05ED,"Quadroplex 2200 D2" },
535{ 0x10DE05EE,"NVIDIA GT200" },
536{ 0x10DE05EF,"NVIDIA GT200" },
537// 05F0 - 05FF
538{ 0x10DE05F0,"NVIDIA GT200" },
539{ 0x10DE05F1,"NVIDIA GT200" },
540{ 0x10DE05F2,"NVIDIA GT200" },
541{ 0x10DE05F3,"NVIDIA GT200" },
542{ 0x10DE05F4,"NVIDIA GT200" },
543{ 0x10DE05F5,"NVIDIA GT200" },
544{ 0x10DE05F6,"NVIDIA GT200" },
545{ 0x10DE05F7,"NVIDIA GT200" },
546{ 0x10DE05F8,"Quadroplex 2200 S4" },
547{ 0x10DE05F9,"NVIDIA Quadro CX" },
548{ 0x10DE05FA,"NVIDIA GT200" },
549{ 0x10DE05FB,"NVIDIA GT200" },
550{ 0x10DE05FC,"NVIDIA GT200" },
551{ 0x10DE05FD,"Quadro FX 5800" },
552{ 0x10DE05FE,"Quadro FX 4800" },
553{ 0x10DE05FF,"Quadro FX 3800" },
554// 0600 - 060F
555{ 0x10DE0600,"GeForce 8800 GTS" },
556{ 0x10DE0601,"GeForce 9800 GT" },
557{ 0x10DE0602,"GeForce 8800 GT" },
558{ 0x10DE0603,"GeForce GT 230" },
559{ 0x10DE0604,"GeForce 9800 GX2" },
560{ 0x10DE0605,"GeForce 9800 GT" },
561{ 0x10DE0606,"GeForce 8800 GS" },
562{ 0x10DE0607,"GeForce GTS 240" },
563{ 0x10DE0608,"GeForce 9800M GTX" },
564{ 0x10DE0609,"GeForce 8800M GTS" },
565{ 0x10DE060A,"GeForce GTX 280M" },
566{ 0x10DE060B,"GeForce 9800M GT" },
567{ 0x10DE060C,"GeForce 8800M GTX" },
568{ 0x10DE060D,"GeForce 8800 GS" },
569{ 0x10DE060F,"GeForce GTX 285M" },
570// 0610 - 061F
571{ 0x10DE0610,"GeForce 9600 GSO" },
572{ 0x10DE0611,"GeForce 8800 GT" },
573{ 0x10DE0612,"GeForce 9800 GTX" },
574{ 0x10DE0613,"GeForce 9800 GTX+" },
575{ 0x10DE0614,"GeForce 9800 GT" },
576{ 0x10DE0615,"GeForce GTS 250" },
577{ 0x10DE0617,"GeForce 9800M GTX" },
578{ 0x10DE0618,"GeForce GTX 260M" },
579{ 0x10DE0619,"Quadro FX 4700 X2" },
580{ 0x10DE061A,"Quadro FX 3700" },
581{ 0x10DE061B,"Quadro VX 200" },
582{ 0x10DE061C,"Quadro FX 3600M" },
583{ 0x10DE061D,"Quadro FX 2800M" },
584{ 0x10DE061E,"Quadro FX 3700M" },
585{ 0x10DE061F,"Quadro FX 3800M" },
586// 0620 - 062F
587{ 0x10DE0620,"NVIDIA G94" },
588{ 0x10DE0621,"GeForce GT 230" },
589{ 0x10DE0622,"GeForce 9600 GT" },
590{ 0x10DE0623,"GeForce 9600 GS" },
591{ 0x10DE0624,"NVIDIA G94" },
592{ 0x10DE0625,"GeForce 9600 GSO 512"},
593{ 0x10DE0626,"GeForce GT 130" },
594{ 0x10DE0627,"GeForce GT 140" },
595{ 0x10DE0628,"GeForce 9800M GTS" },
596{ 0x10DE0629,"NVIDIA G94" },
597{ 0x10DE062A,"GeForce 9700M GTS" },
598{ 0x10DE062B,"GeForce 9800M GS" },
599{ 0x10DE062C,"GeForce 9800M GTS" },
600{ 0x10DE062D,"GeForce 9600 GT" },
601{ 0x10DE062E,"GeForce 9600 GT" },
602{ 0x10DE062F,"GeForce 9800 S" },
603// 0630 - 063F
604{ 0x10DE0630,"GeForce 9700 S" },
605{ 0x10DE0631,"GeForce GTS 160M" },
606{ 0x10DE0632,"GeForce GTS 150M" },
607{ 0x10DE0633,"NVIDIA G94" },
608{ 0x10DE0634,"NVIDIA G94" },
609{ 0x10DE0635,"GeForce 9600 GSO" },
610{ 0x10DE0636,"NVIDIA G94" },
611{ 0x10DE0637,"GeForce 9600 GT" },
612{ 0x10DE0638,"Quadro FX 1800" },
613{ 0x10DE0639,"NVIDIA G94" },
614{ 0x10DE063A,"Quadro FX 2700M" },
615{ 0x10DE063B,"NVIDIA G94" },
616{ 0x10DE063C,"NVIDIA G94" },
617{ 0x10DE063D,"NVIDIA G94" },
618{ 0x10DE063E,"NVIDIA G94" },
619{ 0x10DE063F,"NVIDIA G94" },
620// 0640 - 064F
621{ 0x10DE0640,"GeForce 9500 GT" },
622{ 0x10DE0641,"GeForce 9400 GT" },
623{ 0x10DE0642,"GeForce 8400 GS" },
624{ 0x10DE0643,"GeForce 9500 GT" },
625{ 0x10DE0644,"GeForce 9500 GS" },
626{ 0x10DE0645,"GeForce 9500 GS" },
627{ 0x10DE0646,"GeForce GT 120" },
628{ 0x10DE0647,"GeForce 9600M GT" },
629{ 0x10DE0648,"GeForce 9600M GS" },
630{ 0x10DE0649,"GeForce 9600M GT" },
631{ 0x10DE064A,"GeForce 9700M GT" },
632{ 0x10DE064B,"GeForce 9500M G" },
633{ 0x10DE064C,"GeForce 9650M GT" },
634// 0650 - 065F
635{ 0x10DE0650,"NVIDIA G96-825" },
636{ 0x10DE0651,"GeForce G 110M" },
637{ 0x10DE0652,"GeForce GT 130M" },
638{ 0x10DE0653,"GeForce GT 120M" },
639{ 0x10DE0654,"GeForce GT 220M" },
640{ 0x10DE0655,"GeForce GT 120" },
641{ 0x10DE0656,"GeForce 9650 S" },
642{ 0x10DE0657,"NVIDIA G96" },
643{ 0x10DE0658,"Quadro FX 380" },
644{ 0x10DE0659,"Quadro FX 580" },
645{ 0x10DE065A,"Quadro FX 1700M" },
646{ 0x10DE065B,"GeForce 9400 GT" },
647{ 0x10DE065C,"Quadro FX 770M" },
648{ 0x10DE065D,"NVIDIA G96" },
649{ 0x10DE065E,"NVIDIA G96" },
650{ 0x10DE065F,"GeForce G210" },
651// 0660 - 066F
652// 0670 - 067F
653// 0680 - 068F
654// 0690 - 069F
655// 06A0 - 06AF
656{ 0x10DE06A0,"NVIDIA GT214" },
657// 06B0 - 06BF
658{ 0x10DE06B0,"NVIDIA GT214" },
659// 06C0 - 06CF
660{ 0x10DE06C0,"GeForce GTX 480" },
661{ 0x10DE06C3,"GeForce GTX D12U" },
662{ 0x10DE06C4,"GeForce GTX 465" },
663{ 0x10DE06CA,"GeForce GTX 480M" },
664{ 0x10DE06CD,"GeForce GTX 470" },
665// 06D0 - 06DF
666{ 0x10DE06D1,"Tesla C2050" },
667{ 0x10DE06D2,"Tesla M2070" },
668{ 0x10DE06D8,"Quadro 6000" },
669{ 0x10DE06D9,"Quadro 5000" },
670{ 0x10DE06DA,"Quadro 5000M" },
671{ 0x10DE06DC,"Quadro 6000" },
672{ 0x10DE06DD,"Quadro 4000" },
673{ 0x10DE06DE,"Tesla M2050" },
674{ 0x10DE06DF,"Tesla M2070-Q" },
675// 06E0 - 06EF
676{ 0x10DE06E0,"GeForce 9300 GE" },
677{ 0x10DE06E1,"GeForce 9300 GS" },
678{ 0x10DE06E2,"GeForce 8400" },
679{ 0x10DE06E3,"GeForce 8400 SE" },
680{ 0x10DE06E4,"GeForce 8400 GS" },
681{ 0x10DE06E5,"GeForce 9300M GS" },
682{ 0x10DE06E6,"GeForce G100" },
683{ 0x10DE06E7,"GeForce 9300 SE" },
684{ 0x10DE06E8,"GeForce 9200M GE" },
685{ 0x10DE06E9,"GeForce 9300M GS" },
686{ 0x10DE06EA,"Quadro NVS 150M" },
687{ 0x10DE06EB,"Quadro NVS 160M" },
688{ 0x10DE06EC,"GeForce G 105M" },
689{ 0x10DE06ED,"NVIDIA G98" },
690{ 0x10DE06EF,"GeForce G 103M" },
691// 06F0 - 06FF
692{ 0x10DE06F0,"NVIDIA G98" },
693{ 0x10DE06F1,"GeForce G105M" },
694{ 0x10DE06F2,"NVIDIA G98" },
695{ 0x10DE06F3,"NVIDIA G98" },
696{ 0x10DE06F4,"NVIDIA G98" },
697{ 0x10DE06F5,"NVIDIA G98" },
698{ 0x10DE06F6,"NVIDIA G98" },
699{ 0x10DE06F7,"NVIDIA G98" },
700{ 0x10DE06F8,"Quadro NVS 420" },
701{ 0x10DE06F9,"Quadro FX 370 LP" },
702{ 0x10DE06FA,"Quadro NVS 450" },
703{ 0x10DE06FB,"Quadro FX 370M" },
704{ 0x10DE06FC,"NVIDIA G98" },
705{ 0x10DE06FD,"Quadro NVS 295" },
706{ 0x10DE06FE,"NVIDIA G98" },
707{ 0x10DE06FF,"HICx16 + Graphics" },
708// 0700 - 070F
709// 0710 - 071F
710// 0720 - 072F
711// 0730 - 073F
712// 0740 - 074F
713// 0750 - 075F
714// 0760 - 076F
715// 0770 - 077F
716// 0780 - 078F
717// 0790 - 079F
718// 07A0 - 07AF
719// 07B0 - 07BF
720// 07C0 - 07CF
721// 07D0 - 07DF
722// 07E0 - 07EF
723{ 0x10DE07E0,"GeForce 7150 / nForce 630i" },
724{ 0x10DE07E1,"GeForce 7100 / nForce 630i" },
725{ 0x10DE07E2,"GeForce 7050 / nForce 630i" },
726{ 0x10DE07E3,"GeForce 7050 / nForce 610i" },
727{ 0x10DE07E5,"GeForce 7050 / nForce 620i" },
728// 07F0 - 07FF
729// 0800 - 080F
730// 0810 - 081F
731// 0820 - 082F
732// 0830 - 083F
733// 0840 - 084F
734{ 0x10DE0840,"GeForce 8200M" },
735{ 0x10DE0844,"GeForce 9100M G" },
736{ 0x10DE0845,"GeForce 8200M G" },
737{ 0x10DE0846,"GeForce 9200" },
738{ 0x10DE0847,"GeForce 9100" },
739{ 0x10DE0848,"GeForce 8300" },
740{ 0x10DE0849,"GeForce 8200" },
741{ 0x10DE084A,"nForce 730a" },
742{ 0x10DE084B,"GeForce 9200" },
743{ 0x10DE084C,"nForce 980a/780a SLI" },
744{ 0x10DE084D,"nForce 750a SLI" },
745{ 0x10DE084F,"GeForce 8100 / nForce 720a" },
746// 0850 - 085F
747// 0860 - 086F
748{ 0x10DE0860,"GeForce 9300" },
749{ 0x10DE0861,"GeForce 9400" },
750{ 0x10DE0862,"GeForce 9400M G" },
751{ 0x10DE0863,"GeForce 9400M" },
752{ 0x10DE0864,"GeForce 9300" },
753{ 0x10DE0865,"GeForce 9300" },
754{ 0x10DE0866,"GeForce 9400M G" },
755{ 0x10DE0867,"GeForce 9400" },
756{ 0x10DE0868,"nForce 760i SLI" },
757{ 0x10DE0869,"GeForce 9400" },
758{ 0x10DE086A,"GeForce 9400" },
759{ 0x10DE086C,"GeForce 9300 / nForce 730i" },
760{ 0x10DE086D,"GeForce 9200" },
761{ 0x10DE086E,"GeForce 9100M G" },
762{ 0x10DE086F,"GeForce 8200M G" },
763// 0870 - 087F
764{ 0x10DE0870,"GeForce 9400M" },
765{ 0x10DE0871,"GeForce 9200" },
766{ 0x10DE0872,"GeForce G102M" },
767{ 0x10DE0873,"GeForce G205M" },
768{ 0x10DE0874,"ION 9300M" },
769{ 0x10DE0876,"ION 9400M" },
770{ 0x10DE087A,"GeForce 9400" },
771{ 0x10DE087D,"ION 9400M" },
772{ 0x10DE087E,"ION LE" },
773{ 0x10DE087F,"ION LE" }, // Tesla M2070-Q ??
774// 0880 - 088F
775// 0890 - 089F
776// 08A0 - 08AF
777{ 0x10DE08A0,"GeForce 320M" },
778{ 0x10DE08A1,"MCP89-MZT" },
779{ 0x10DE08A2,"GeForce 320M" },
780{ 0x10DE08A3,"GeForce 320M" },
781{ 0x10DE08A4,"GeForce 320M" },
782{ 0x10DE08A5,"GeForce 320M" },
783// 08B0 - 08BF
784{ 0x10DE08B0,"MCP83 MMD" },
785{ 0x10DE08B1,"GeForce 300M" },
786{ 0x10DE08B2,"GeForce 300M" }, // MCP83-MJ
787{ 0x10DE08B3,"MCP89 MM9" },
788// 08C0 - 08CF
789// 08D0 - 08DF
790// 08E0 - 08EF
791// 08F0 - 08FF
792// 0900 - 090F
793// 0910 - 091F
794// 0920 - 092F
795// 0930 - 093F
796// 0940 - 094F
797// 0950 - 095F
798// 0960 - 096F
799// 0970 - 097F
800// 0980 - 098F
801// 0990 - 099F
802// 09A0 - 09AF
803// 09B0 - 09BF
804// 09C0 - 09CF
805// 09D0 - 09DF
806// 09E0 - 09EF
807// 09F0 - 09FF
808// 0A00 - 0A0F
809// { 0x10DE0A00,"NVIDIA GT212" },
810// 0A10 - 0A1F
811// { 0x10DE0A10,"NVIDIA GT212" },
812// 0A20 - 0A2F
813{ 0x10DE0A20,"GeForce GT 220" },
814{ 0x10DE0A21,"D10M2-20" },
815{ 0x10DE0A22,"GeForce 315" },
816{ 0x10DE0A23,"GeForce 210" },
817{ 0x10DE0A26,"GeForce 405" },
818{ 0x10DE0A27,"GeForce 405" },
819{ 0x10DE0A28,"GeForce GT 230" },
820{ 0x10DE0A29,"GeForce GT 330M" },
821{ 0x10DE0A2A,"GeForce GT 230M" },
822{ 0x10DE0A2B,"GeForce GT 330M" },
823{ 0x10DE0A2C,"NVS 5100M" },
824{ 0x10DE0A2D,"GeForce GT 320M" },
825// 0A30 - 0A3F
826{ 0x10DE0A30,"GeForce GT 330M" },
827{ 0x10DE0A32,"GeForce GT 415" },
828{ 0x10DE0A34,"GeForce GT 240M" },
829{ 0x10DE0A35,"GeForce GT 325M" },
830{ 0x10DE0A38,"Quadro 400" },
831{ 0x10DE0A3C,"Quadro FX 880M" },
832{ 0x10DE0A3D,"N10P-ES" },
833{ 0x10DE0A3F,"GT216-INT" },
834// 0A40 - 0A4F
835// 0A50 - 0A5F
836// 0A60 - 0A6F
837{ 0x10DE0A60,"GeForce G210" },
838{ 0x10DE0A61,"NVS 2100" },
839{ 0x10DE0A62,"GeForce 205" },
840{ 0x10DE0A63,"GeForce 310" },
841{ 0x10DE0A64,"ION" },
842{ 0x10DE0A65,"GeForce 210" },
843{ 0x10DE0A66,"GeForce 310" },
844{ 0x10DE0A67,"GeForce 315" },
845{ 0x10DE0A68,"GeForce G105M" },
846{ 0x10DE0A69,"GeForce G105M" },
847{ 0x10DE0A6A,"NVS 2100M" },
848{ 0x10DE0A6C,"NVS 3100M" },
849{ 0x10DE0A6E,"GeForce 305M" },
850{ 0x10DE0A6F,"ION" },
851// 0A70 - 0A7F
852{ 0x10DE0A70,"GeForce 310M" },
853{ 0x10DE0A71,"GeForce 305M" },
854{ 0x10DE0A72,"GeForce 310M" },
855{ 0x10DE0A73,"GeForce 305M" },
856{ 0x10DE0A74,"GeForce G210M" },
857{ 0x10DE0A75,"GeForce G310M" },
858{ 0x10DE0A76,"ION" },
859{ 0x10DE0A78,"Quadro FX 380 LP" },
860// { 0x10DE0A79,"N12M-NS-S" },
861{ 0x10DE0A7A,"GeForce 315M" },
862{ 0x10DE0A7B,"GeForce 505" },
863{ 0x10DE0A7C,"Quadro FX 380M" },
864{ 0x10DE0A7D,"N11M-ES" }, //SUBIDS
865{ 0x10DE0A7E,"GT218-INT-S" },
866{ 0x10DE0A7F,"GT218-INT-B" },
867// 0A80 - 0A8F
868// 0A90 - 0A9F
869// 0AA0 - 0AAF
870// 0AB0 - 0ABF
871// 0AC0 - 0ACF
872// 0AD0 - 0ADF
873// 0AE0 - 0AEF
874// 0AF0 - 0AFF
875// 0B00 - 0B0F
876// 0B10 - 0B1F
877// 0B20 - 0B2F
878// 0B30 - 0B3F
879// 0B40 - 0B4F
880// 0B50 - 0B5F
881// 0B60 - 0B6F
882// 0B70 - 0B7F
883// 0B80 - 0B8F
884// 0B90 - 0B9F
885// 0BA0 - 0BAF
886// 0BB0 - 0BBF
887// 0BC0 - 0BCF
888// 0BD0 - 0BDF
889// 0BE0 - 0BEF
890// 0BF0 - 0BFF
891// 0C00 - 0C0F
892// 0C10 - 0C1F
893// 0C20 - 0C2F
894// 0C30 - 0C3F
895// 0C40 - 0C4F
896// 0C50 - 0C5F
897// 0C60 - 0C6F
898// 0C70 - 0C7F
899// 0C80 - 0C8F
900// 0C90 - 0C9F
901// 0CA0 - 0CAF
902{ 0x10DE0CA0,"GeForce GT 330 " },
903{ 0x10DE0CA2,"GeForce GT 320" },
904{ 0x10DE0CA3,"GeForce GT 240" },
905{ 0x10DE0CA4,"GeForce GT 340" },
906{ 0x10DE0CA5,"GeForce GT 220" },
907{ 0x10DE0CA7,"GeForce GT 330" },
908{ 0x10DE0CA8,"GeForce GTS 260M" },
909{ 0x10DE0CA9,"GeForce GTS 250M" },
910{ 0x10DE0CAC,"GeForce GT 220" },
911{ 0x10DE0CAD,"N10E-ES" }, // SUBIDS
912{ 0x10DE0CAE,"GT215-INT" },
913{ 0x10DE0CAF,"GeForce GT 335M" },
914// 0CB0 - 0CBF
915{ 0x10DE0CB0,"GeForce GTS 350M" },
916{ 0x10DE0CB1,"GeForce GTS 360M" },
917{ 0x10DE0CBC,"Quadro FX 1800M" },
918// 0CC0 - 0CCF
919// 0CD0 - 0CDF
920// 0CE0 - 0CEF
921// 0CF0 - 0CFF
922// 0D00 - 0D0F
923// 0D10 - 0D1F
924// 0D20 - 0D2F
925// 0D30 - 0D3F
926// 0D40 - 0D4F
927// 0D50 - 0D5F
928// 0D60 - 0D6F
929// 0D70 - 0D7F
930// 0D80 - 0D8F
931// 0D90 - 0D9F
932// 0DA0 - 0DAF
933// 0DB0 - 0DBF
934// 0DC0 - 0DCF
935{ 0x10DE0DC0,"GeForce GT 440" },
936// { 0x10DE0DC1,"D12-P1-35" },
937// { 0x10DE0DC2,"D12-P1-35" },
938{ 0x10DE0DC4,"GeForce GTS 450" },
939{ 0x10DE0DC5,"GeForce GTS 450" },
940{ 0x10DE0DC6,"GeForce GTS 450" },
941// { 0x10DE0DCA,"GF10x" },
942// { 0x10DE0DCC,"N12E-GS" },
943{ 0x10DE0DCD,"GeForce GT 555M" },
944{ 0x10DE0DCE,"GeForce GT 555M" },
945// { 0x10DE0DCF,"N12P-GT-B" },
946// 0DD0 - 0DDF
947{ 0x10DE0DD0,"N11E-GT" },
948{ 0x10DE0DD1,"GeForce GTX 460M" },
949{ 0x10DE0DD2,"GeForce GT 445M" },
950{ 0x10DE0DD3,"GeForce GT 435M" },
951{ 0x10DE0DD6,"GeForce GT 550M" },
952{ 0x10DE0DD8,"Quadro 2000" },
953{ 0x10DE0DDA,"Quadro 2000M" },
954{ 0x10DE0DDE,"GF106-ES" },
955{ 0x10DE0DDF,"GF106-INT" },
956// 0DE0 - 0DEF
957{ 0x10DE0DE0,"GeForce GT 440" },
958{ 0x10DE0DE1,"GeForce GT 430" },
959{ 0x10DE0DE2,"GeForce GT 420" },
960{ 0x10DE0DE3,"GeForce GT 635M" },
961{ 0x10DE0DE4,"GeForce GT 520" },
962{ 0x10DE0DE5,"GeForce GT 530" },
963{ 0x10DE0DE8,"GeForce GT 620M" },
964{ 0x10DE0DE9,"GeForce GT 630M" },
965{ 0x10DE0DEA,"GeForce GT 610M" },
966{ 0x10DE0DEB,"GeForce GT 555M" },
967{ 0x10DE0DEC,"GeForce GT 525M" },
968{ 0x10DE0DED,"GeForce GT 520M" },
969{ 0x10DE0DEE,"GeForce GT 415M" },
970{ 0x10DE0DEF,"NVS 5400M" },
971// 0DF0 - 0DFF
972{ 0x10DE0DF0,"GeForce GT 425M" },
973{ 0x10DE0DF1,"GeForce GT 420M" },
974{ 0x10DE0DF2,"GeForce GT 435M" },
975{ 0x10DE0DF3,"GeForce GT 420M" },
976{ 0x10DE0DF4,"GeForce GT 540M" },
977{ 0x10DE0DF5,"GeForce GT 525M" },
978{ 0x10DE0DF6,"GeForce GT 550M" },
979{ 0x10DE0DF7,"GeForce GT 520M" },
980{ 0x10DE0DF8,"Quadro 600" },
981{ 0x10DE0DF9,"Quadro 500M" },
982{ 0x10DE0DFA,"Quadro 1000M" },
983{ 0x10DE0DFC,"NVS 5200M" },
984{ 0x10DE0DFE,"GF108 ES" },
985{ 0x10DE0DFF,"GF108 INT" },
986// 0E00 - 0E0F
987// 0E10 - 0E1F
988// 0E20 - 0E2F
989{ 0x10DE0E21,"D12U-25" },
990{ 0x10DE0E22,"GeForce GTX 460" },
991{ 0x10DE0E23,"GeForce GTX 460 SE" },
992{ 0x10DE0E24,"GeForce GTX 460" },
993{ 0x10DE0E25,"D12U-50" },
994{ 0x10DE0E28,"GeForce GTX 460" },
995// 0E30 - 0E3F
996{ 0x10DE0E30,"GeForce GTX 470M" },
997{ 0x10DE0E31,"GeForce GTX 485M" },
998{ 0x10DE0E32,"N12E-GT" },
999{ 0x10DE0E38,"GF104GL" },
1000{ 0x10DE0E3A,"Quadro 3000M" },
1001{ 0x10DE0E3B,"Quadro 4000M" },
1002{ 0x10DE0E3E,"GF104-ES" },
1003{ 0x10DE0E3F,"GF104-INT" },
1004// 0E40 - 0E4F
1005// 0E50 - 0E5F
1006// 0E60 - 0E6F
1007// 0E70 - 0E7F
1008// 0E80 - 0E8F
1009// 0E90 - 0E9F
1010// 0EA0 - 0EAF
1011// 0EB0 - 0EBF
1012// 0EC0 - 0ECF
1013// 0ED0 - 0EDF
1014// 0EE0 - 0EEF
1015// 0EF0 - 0EFF
1016// 0F00 - 0F0F
1017{ 0x10DE0F00,"GeForce GT 630" },
1018{ 0x10DE0F01,"GeForce GT 620" },
1019{ 0x10DE0F02,"GeForce GT 730" },
1020// 0F10 - 0F1F
1021// 0F20 - 0F2F
1022// 0F30 - 0F3F
1023// 0F40 - 0F4F
1024// 0F50 - 0F5F
1025// 0F60 - 0F6F
1026// 0F70 - 0F7F
1027// 0F80 - 0F8F
1028// 0F90 - 0F9F
1029// 0FA0 - 0FAF
1030// 0FB0 - 0FBF
1031{ 0x10DE0FBB,"GeForce GTX 970" },
1032// 0FC0 - 0FCF
1033{ 0x10DE0FC0,"GeForce GT 640" },
1034{ 0x10DE0FC1,"GeForce GT 640" },
1035{ 0x10DE0FC2,"GeForce GT 630" },
1036{ 0x10DE0FC6,"GeForce GTX 650" },
1037{ 0x10DE0FC8,"GeForce GT 740" },
1038{ 0x10DE0FCD,"GeForce GT 755M" },
1039{ 0x10DE0FCE,"GeForce GT 640M LE" },
1040// 0FD0 - 0FDF
1041{ 0x10DE0FD1,"GeForce GT 650M" },
1042{ 0x10DE0FD2,"GeForce GT 640M" },
1043{ 0x10DE0FD3,"GeForce GT 640M LE" },
1044{ 0x10DE0FD4,"GeForce GTX 660M" },
1045{ 0x10DE0FD5,"GeForce GT 650M" },
1046{ 0x10DE0FD8,"GeForce GT 640M" },
1047{ 0x10DE0FD9,"GeForce GT 645M" },
1048{ 0x10DE0FDA,"GK107-ES-A1" },
1049{ 0x10DE0FDB,"GK107-ESP-A1" },
1050{ 0x10DE0FDC,"GK107-INT22-A1" },
1051{ 0x10DE0FDF,"GeForce GT 740M" },
1052// 0FE0 - 0FEF
1053{ 0x10DE0FE0,"GeForce GTX 660M" },
1054{ 0x10DE0FE1,"GeForce GT 730M" },
1055{ 0x10DE0FE3,"GeForce GT 745M" },
1056{ 0x10DE0FE4,"GeForce GT 750M" },
1057{ 0x10DE0FE5,"GeForce K340 USM" },
1058{ 0x10DE0FE6,"NVS K1 USM" },
1059{ 0x10DE0FE7,"Generic K1 USM / GRID K100" },
1060{ 0x10DE0FE9,"GeForce GT 750M" },
1061{ 0x10DE0FEA,"GeForce GT 755M" },
1062{ 0x10DE0FEF,"GRID K340" },
1063// 0FF0 - 0FFF
1064{ 0x10DE0FF0,"NB1Q" },
1065{ 0x10DE0FF1,"NVS 1000" },
1066{ 0x10DE0FF2,"GRID K1" },
1067{ 0x10DE0FF3,"Quadro K420" },
1068{ 0x10DE0FF5,"Tesla K1 USM" },
1069{ 0x10DE0FF6,"Quadro K1100M" },
1070{ 0x10DE0FF7,"Quadro K1 USM" }, // K1 USM / GRID K120Q / GRID K140Q
1071{ 0x10DE0FF8,"Quadro K500M" },
1072{ 0x10DE0FF9,"Quadro K2000D" },
1073{ 0x10DE0FFA,"Quadro K600" },
1074{ 0x10DE0FFB,"Quadro K2000M" },
1075{ 0x10DE0FFC,"Quadro K1000M" },
1076{ 0x10DE0FFD,"NVS 510" },
1077{ 0x10DE0FFE,"Quadro K2000" },
1078{ 0x10DE0FFF,"Quadro 410" },
1079// 1000 - 100F
1080{ 0x10DE1001,"GeForce GTX TITAN Z" },
1081{ 0x10DE1003,"GeForce GTX Titan LE" },
1082{ 0x10DE1004,"GeForce GTX 780" },
1083{ 0x10DE1005,"GeForce GTX Titan" },
1084{ 0x10DE1006,"GeForce GTX 780 Ti" },
1085{ 0x10DE1007,"GeForce GTX 780" },
1086{ 0x10DE1008,"GeForce GTX 780 Ti" },
1087{ 0x10DE100A,"GeForce GTX 780 Ti" },
1088//{ 0x10DE100B,"Graphics Device" }, // GK110
1089{ 0x10DE100C,"GeForce GTX Titan Black" },
1090// 1010 - 101F
1091{ 0x10DE101E,"Tesla K20X" }, // GK110GL
1092{ 0x10DE101F,"Tesla K20" },
1093// 1020 - 102F
1094{ 0x10DE1020,"Tesla K20X" },
1095{ 0x10DE1021,"Tesla K20Xm" },
1096{ 0x10DE1022,"Tesla K20c" },
1097{ 0x10DE1023,"Tesla K40m" }, // GK110BGL
1098{ 0x10DE1024,"Tesla K40c" }, // GK110BGL
1099{ 0x10DE1026,"Tesla K20s" },
1100{ 0x10DE1027,"Tesla K40st" }, // GK110BGL
1101{ 0x10DE1028,"Tesla K20m" },
1102{ 0x10DE1029,"Tesla K40s" }, // GK110BGL
1103{ 0x10DE102A,"Tesla K40t" }, // GK110BGL
1104//{ 0x10DE102B,"Graphics Device" }, // GK110BGL
1105//{ 0x10DE102C,"Graphics Device" }, // GK110BGL
1106{ 0x10DE102D,"Tesla K80" }, // GK110BGL (2x)
1107{ 0x10DE102E,"Tesla K40d" }, // GK110BGL
1108{ 0x10DE102F,"Tesla Stella Solo" }, // GK110BGL
1109// 1030 - 103F
1110//{ 0x10DE1030,"" }, // GK110
1111{ 0x10DE103a,"Quadro K6000" }, // GK110GL
1112{ 0x10DE103c,"Quadro K5200" }, // GK110GL
1113{ 0x10DE103F,"Tesla Stella SXM" }, // GK110
1114// 1040 - 104F
1115{ 0x10DE1040,"GeForce GT 520" },
1116// { 0x10DE1041,"D13M1-45" },
1117{ 0x10DE1042,"GeForce 510" },
1118{ 0x10DE1048,"GeForce 605" },
1119{ 0x10DE1049,"GeForce GT 620" },
1120{ 0x10DE104A,"GeForce GT 610" },
1121{ 0x10DE104B,"GeForce GT 625 (OEM)" },
1122{ 0x10DE104C,"GeForce GT 705" }, // GF119
1123{ 0x10DE104D," GeForce GT 710" }, // GF119
1124// 1050 - 105F
1125{ 0x10DE1050,"GeForce GT 520M" },
1126{ 0x10DE1051,"GeForce GT 520MX" },
1127{ 0x10DE1052,"GeForce GT 520M" },
1128{ 0x10DE1054,"GeForce GT 410M" },
1129{ 0x10DE1055,"GeForce 410M" },
1130{ 0x10DE1056,"Quadro NVS 4200M" },
1131{ 0x10DE1057,"Quadro NVS 4200M" },
1132{ 0x10DE1058,"GeForce GT 610M" },
1133{ 0x10DE1059,"GeForce 610M" },
1134{ 0x10DE105A,"GeForce 610M" },
1135{ 0x10DE105B,"GeForce 705A" },
1136// 1060 - 106F
1137// 1070 - 107F
1138{ 0x10DE107C,"Quadro NVS 315" },
1139{ 0x10DE107D,"Quadro NVS 310" },
1140// { 0x10DE107E,"GF119-INT" },
1141{ 0x10DE107F,"GF119-ES" },
1142// 1080 - 108F
1143{ 0x10DE1080,"GeForce GTX 580" },
1144{ 0x10DE1081,"GeForce GTX 570" },
1145{ 0x10DE1082,"GeForce GTX 560 Ti" },
1146{ 0x10DE1083,"D13U" },
1147{ 0x10DE1084,"GeForce GTX 560" },
1148{ 0x10DE1086,"GeForce GTX 570 HD" },
1149{ 0x10DE1087,"GeForce GTX 560 Ti-448" },
1150{ 0x10DE1088,"GeForce GTX 590" },
1151{ 0x10DE1089,"GeForce GTX 580" },
1152{ 0x10DE108B,"GeForce GTX 590" },
1153// { 0x10DE108C,"D13U" },
1154{ 0x10DE108E,"Tesla C2090" },
1155// 1090 - 109F
1156{ 0x10DE1091,"Tesla M2090" }, // X2090
1157{ 0x10DE1094,"Tesla M2075" },
1158{ 0x10DE1096,"Tesla C2075" },
1159{ 0x10DE1098,"D13U" },
1160{ 0x10DE109A,"Quadro 5010M" },
1161{ 0x10DE109B,"Quadro 7000" },
1162// 10A0 - 10AF
1163// 10B0 - 10BF
1164// 10C0 - 10CF
1165{ 0x10DE10C0,"GeForce 9300 GS" },
1166{ 0x10DE10C3,"GeForce 8400 GS" },
1167{ 0x10DE10C4,"ION" },
1168{ 0x10DE10C5,"GeForce 405" },
1169// 10D0 - 10DF
1170{ 0x10DE10D8,"Quadro NVS 300" },
1171// 10E0 - 10EF
1172// 10F0 - 10FF
1173// 1100 - 110F
1174// 1110 - 111F
1175// 1120 - 112F
1176// 1130 - 113F
1177// 1140 - 114F
1178{ 0x10DE1140,"GeForce GT 610M" },
1179{ 0x10DE1141,"GeForce 610M" },
1180{ 0x10DE1142,"GeForce 620M" },
1181{ 0x10DE1143,"N13P-GV" },
1182{ 0x10DE1144,"GF117" },
1183{ 0x10DE1145,"GF117" },
1184{ 0x10DE1146,"GF117" },
1185{ 0x10DE1147,"GF117" },
1186{ 0x10DE1149,"GF117-ES" },
1187{ 0x10DE114A,"GF117-INT" },
1188{ 0x10DE114B,"PCI-GEN3-B" },
1189{ 0x10DE1150,"N13M-NS" },
1190// 1160 - 116F
1191// 1170 - 117F
1192// 1180 - 118F
1193{ 0x10DE1180,"GeForce GTX 680" },
1194{ 0x10DE1182,"GeForce GTX 760 Ti" },
1195{ 0x10DE1183,"GeForce GTX 660 Ti" },
1196{ 0x10DE1184,"GeForce GTX 770" },
1197{ 0x10DE1185,"GeForce GTX 660 OEM" },
1198{ 0x10DE1187,"GeForce GTX 760" },
1199{ 0x10DE1188,"GeForce GTX 690" },
1200{ 0x10DE1189,"GeForce GTX 670" },
1201{ 0x10DE118A,"GRID K520" },
1202{ 0x10DE118B,"GRID K200" }, // GRID K2 GeForce USM
1203{ 0x10DE118C,"GRID K2 NVS USM" }, // GK104
1204{ 0x10DE118D,"GRID K200 vGPU" }, // GK104GL
1205{ 0x10DE118E,"GeForce GTX 760 (192-bit)" },
1206{ 0x10DE118F,"Tesla K10" },
1207// 1190 - 119F
1208{ 0x10DE1191,"GeForce GTX 760" }, // GK104
1209{ 0x10DE1192,"GeForce GK104" },
1210{ 0x10DE1193,"GeForce GTX 760 Ti" },
1211{ 0x10DE1194,"Tesla K8" }, // GK104
1212{ 0x10DE1195,"GeForce GTX 660" },
1213{ 0x10DE1198,"GeForce GTX 880M" },
1214{ 0x10DE1199,"GeForce GTX 870M" },
1215{ 0x10DE119A,"GeForce GTX 860M" },
1216{ 0x10DE119D,"GeForce GTX 775M" }, // Mac Edition
1217{ 0x10DE119E,"GeForce GTX 780M" }, // Mac Edition
1218{ 0x10DE119F,"GeForce GTX 780M" },
1219// 11A0 - 11AF
1220{ 0x10DE11A0,"GeForce GTX 680M" },
1221{ 0x10DE11A1,"GeForce GTX 670MX" },
1222{ 0x10DE11A2,"GeForce GTX 675MX" }, // Mac Edition
1223{ 0x10DE11A3,"GeForce GTX 680MX" },
1224{ 0x10DE11A7,"GeForce GTX 675MX" },
1225{ 0x10DE11AF,"GRID IceCube" }, // GF104M
1226// 11B0 - 11BF
1227{ 0x10DE11B0,"GRID K240Q" }, // K260Q vGPU
1228{ 0x10DE11B1,"GRID K2 Tesla USM" },
1229{ 0x10DE11B4,"Quadro K4200" },
1230{ 0x10DE11B6,"Quadro K3100M" },
1231{ 0x10DE11B7,"Quadro K4100M" },
1232{ 0x10DE11B8,"Quadro K5100M" },
1233{ 0x10DE11BA,"Quadro K5000" },
1234{ 0x10DE11BB,"Quadro 4100" },
1235{ 0x10DE11BC,"Quadro K5000M" },
1236{ 0x10DE11BD,"Quadro K4000M" },
1237{ 0x10DE11BE,"Quadro K3000M" },
1238{ 0x10DE11BF,"GRID K2" }, // GK104GL
1239// 11C0 - 11CF
1240{ 0x10DE11C0,"GeForce GTX 660" },
1241{ 0x10DE11C2,"GeForce GTX 650 Ti BOOST" },
1242{ 0x10DE11C3,"GeForce GTX 650 Ti" },
1243{ 0x10DE11C4,"GeForce GTX 645" },
1244{ 0x10DE11C6,"GeForce GTX 650 Ti" },
1245{ 0x10DE11C7,"GeForce GTX 750 Ti" },
1246{ 0x10DE11C8,"GeForce GTX 650 OEM" },
1247// 11D0 - 11DF
1248{ 0x10DE11D0,"GK106-INT353" },
1249// 11E0 - 11EF
1250{ 0x10DE11E0,"GeForce GTX 770M" },
1251{ 0x10DE11E1,"GeForce GTX 765M" },
1252{ 0x10DE11E2,"GeForce GTX 765M" },
1253{ 0x10DE11E3,"GeForce GTX 760M" },
1254//{ 0x10DE11E7,"GeForce " }, // GK106M
1255// 11F0 - 11FF
1256{ 0x10DE11FA,"Quadro K4000" },
1257{ 0x10DE11FC,"Quadro 2100M" },
1258{ 0x10DE11FF,"NB1Q" }, //
1259// 1200 - 120F
1260{ 0x10DE1200,"GeForce GTX 560 Ti" },
1261{ 0x10DE1201,"GeForce GTX 560" },
1262{ 0x10DE1202,"GeForce GTX 560 Ti" },
1263{ 0x10DE1203,"GeForce GTX 460 SE v2" },
1264{ 0x10DE1205,"GeForce GTX 460 v2" },
1265{ 0x10DE1206,"GeForce GTX 555" },
1266{ 0x10DE1207,"GeForce GT 645" },
1267{ 0x10DE1208,"GeForce GTX 560 SE" },
1268{ 0x10DE1210,"GeForce GTX 570M" },
1269{ 0x10DE1211,"GeForce GTX 580M" },
1270{ 0x10DE1212,"GeForce GTX 675M" },
1271{ 0x10DE1213,"GeForce GTX 670M" },
1272{ 0x10DE121F,"GF114-INT" },
1273{ 0x10DE1240,"GeForce GT 620M" },
1274{ 0x10DE1241,"GeForce GT 545" },
1275{ 0x10DE1243,"GeForce GT 545" },
1276{ 0x10DE1244,"GeForce GTX 550 Ti" },
1277{ 0x10DE1245,"GeForce GTS 450" },
1278{ 0x10DE1246,"GeForce GT 550M" },
1279{ 0x10DE1247,"GeForce GT 555M" },
1280{ 0x10DE1248,"GeForce GT 555M" },
1281{ 0x10DE1249,"GeForce GTS 450" },
1282{ 0x10DE124B,"GeForce GT 640" },
1283{ 0x10DE124D,"GeForce GT 555M" },
1284{ 0x10DE1250,"GF116-INT" },
1285{ 0x10DE1251,"GeForce GTX 560M" },
1286// 1260 - 126F
1287// 1270 - 127F
1288// 1280 - 128F
1289{ 0x10DE1280,"GeForce GT 635" },
1290{ 0x10DE1281,"GeForce GT 710" },
1291{ 0x10DE1282,"GeForce GT 640" },
1292{ 0x10DE1284,"GeForce GT 630" },
1293{ 0x10DE1286,"GeForce GT 720" },
1294{ 0x10DE1287,"GeForce GT 730" }, // GK208
1295{ 0x10DE1288,"GeForce GT 720" }, // GK208
1296// 1290 - 129F
1297{ 0x10DE1290,"GeForce GT 730M" },
1298{ 0x10DE1291,"GeForce GT 735M" },
1299{ 0x10DE1292,"GeForce GT 740M" },
1300{ 0x10DE1293,"GeForce GT 730M" },
1301{ 0x10DE1294,"GeForce GT 740M" },
1302{ 0x10DE1295,"GeForce GT 710M" },
1303{ 0x10DE1296,"GeForce 825M" }, // GK208M
1304{ 0x10DE1298,"GeForce GT 720M" },
1305{ 0x10DE1299,"GeForce 920M" }, // GK208M
1306// 12A0 - 12AF
1307{ 0x10DE12A0,"GK208" },
1308{ 0x10DE12AF,"GK208-INT" },
1309{ 0x10DE12B0,"GK208-CS-Q" },
1310{ 0x10DE12B9,"Quadro K610M" },
1311{ 0x10DE12BA,"Quadro K510M" },
1312// 12B0 - 12BF
1313// 12C0 - 12CF
1314// 12D0 - 12DF
1315// 12E0 - 12EF
1316// 12F0 - 12FF
1317{ 0x10DE1340,"GeForce 830M" },
1318{ 0x10DE1341,"GeForce 840M" },
1319{ 0x10DE1346,"GeForce 930M" }, // GM108M
1320{ 0x10DE1347,"GeForce 940M" }, // GM108M
1321{ 0x10DE1380,"GeForce GTX 750 Ti" },
1322{ 0x10DE1381,"GeForce GTX 750" },
1323{ 0x10DE1382,"GeForce GTX 745" },
1324//{ 0x10DE1383,"Graphics Device" }, // GM107
1325{ 0x10DE1389,"GRID M3" }, // GM107
1326{ 0x10DE1390,"GeForce 845M" },
1327{ 0x10DE1391,"GeForce GTX 850M" },
1328{ 0x10DE1392,"GeForce GTX 860M" },
1329{ 0x10DE1393,"GeForce 840M" },
1330{ 0x10DE1398,"GeForce 845M" }, //
1331{ 0x10DE139A,"GeForce GTX 950M" }, // GM107
1332{ 0x10DE139B,"GeForce GTX 960M" }, // GM107
1333{ 0x10DE13AD,"GM107 INT52" }, //
1334{ 0x10DE13AE,"GM107 CS1" }, //
1335//{ 0x10DE13AF,"Graphics Device" }, // GM107GLM
1336{ 0x10DE13B3,"Quadro K2200M" }, //
1337{ 0x10DE13BA,"Quadro K2200" },
1338{ 0x10DE13BB,"Quadro K620" },
1339{ 0x10DE13BC,"Quadro K1200" },
1340{ 0x10DE13BD,"Tesla M40" }, // GM107GLM
1341{ 0x10DE13BE,"GM107 CS1" }, //
1342{ 0x10DE13BF,"GM107 INT52" }, //
1343// 12B0 - 12BF
1344{ 0x10DE13C0,"GeForce GTX 980" }, // GM107GLM
1345//{ 0x10DE13C1,"Graphics Device" }, // GM107GLM
1346{ 0x10DE13C2,"GeForce GTX 970" }, // GM107GLM
1347//{ 0x10DE13C3,"Graphics Device" }, // GM107GLM
1348{ 0x10DE13D7,"GeForce GTX 980M" }, //
1349{ 0x10DE13D8,"GeForce GTX 970M" }, //
1350{ 0x10DE13D9,"GeForce GTX 965M" },
1351//{ 0x10DE13F0,"Graphics Device" }, // GM107GLM
1352//{ 0x10DE13F1,"Graphics Device" }, // GM107GLM
1353{ 0x10DE1401,"GeForce GTX 960" }, //
1354//{ 0x10DE1402,"Graphics Device" }, //
1355//{ 0x10DE143F,"Graphics Device" }, //
1356//{ 0x10DE1600,"Graphics Device" }, //
1357//{ 0x10DE1601,"Graphics Device" }, //
1358//{ 0x10DE1602,"Graphics Device" }, //
1359//{ 0x10DE1603,"Graphics Device" }, //
1360//{ 0x10DE1630,"Graphics Device" }, //
1361//{ 0x10DE1631,"Graphics Device" }, //
1362//{ 0x10DE1780,"Graphics Device" }, //
1363//{ 0x10DE1781,"Graphics Device" }, //
1364//{ 0x10DE1782,"Graphics Device" }, //
1365//{ 0x10DE1783,"Graphics Device" }, //
1366{ 0x10DE1789,"GRID M3-3020" }, //
1367{ 0x10DE1790,"N15S-GX" }, //
1368{ 0x10DE1791,"N15P-GT" }, //
1369{ 0x10DE1792,"N15P-GX" }, //
1370//{ 0x10DE17B3,"Quadro" }, //
1371//{ 0x10DE17BA,"Quadro" }, //
1372//{ 0x10DE17BB,"Quadro" }, //
1373//{ 0x10DE17BD,"Graphics Device" }, //
1374{ 0x10DE17BE,"GM107 CS1" }, // GM107
1375//{ 0x10DE17C1,"Graphics Device" }, //
1376//{ 0x10DE17C2,"Graphics Device" }, //
1377//{ 0x10DE17EE,"Graphics Device" }, //
1378//{ 0x10DE17EF,"Graphics Device" }, //
1379{ 0x10DE17F0,"Quadro M6000" }
1380//{ 0x10DE17FF,"Graphics Device" }, //
1381};
1382
1383static nvidia_card_info_t nvidia_card_exceptions[] = {
1384 /* ========================================================================================
1385 * Layout is device(VendorId + DeviceId), subdev (SubvendorId + SubdeviceId), display name.
1386 * ========================================================================================
1387 */
1388 /* ------ Specific DeviceID and SubDevID. ------ */
1389// 0000 - 00FF
1390{ 0x10DE0040,0x10438178,"Asus V9999 Ultra V62.11" },
1391{ 0x10DE0040,0x1043817D,"Asus V9999GT V61.21" },
1392{ 0x10DE0040,0x7FFFFFFF,"GeForce 6800 Ultra [NV40.0]" },
1393// 0100 - 01FF
1394{ 0x10DE01D7,0x102801C2,"Dell Quadro NVS 110M" },
1395{ 0x10DE01D7,0x102801CC,"Dell Quadro NVS 110M" },
1396{ 0x10DE01D7,0x10DE014B,"nVidia Quadro NVS 110M" },
1397
1398{ 0x10DE01D8,0x102801CC,"Dell Quadro NVS 120M" },
1399{ 0x10DE01D8,0x10282003,"Dell Quadro NVS 120M" },
1400
1401{ 0x10DE01DA,0x10280407,"Dell GeForce 7300 LE" },
1402// 0200 - 02FF
1403{ 0x10DE025B,0x10480D23,"ELSA Gloria4 700XGL" },
1404// 0300 - 03FF
1405{ 0x10DE0391,0x10DE047A,"Galaxy GeForce 7600 GT" },
1406{ 0x10DE0391,0x19F120DE,"Galaxy GeForce 7600 GT" },
1407
1408{ 0x10DE0393,0x00000400,"Apple GeForce 7300GT" },
1409// 0400 - 04FF
1410{ 0x10DE0402,0x10DE0439,"Galaxy 8600GT" },
1411{ 0x10DE0402,0x10DE0505,"Galaxy 8600GT" },
1412// 0500 - 05FF
1413{ 0x10DE05E2,0x104382EB,"ASUS ENGTX260" },
1414{ 0x10DE05E2,0x16822390,"HFX GeForce GTX 260" },
1415{ 0x10DE05E2,0x17870000,"HIS GeForce GTX 260" },
1416
1417{ 0x10DE05E6,0x10B00401,"Gainward GeForce GTX 285" },
1418
1419{ 0x10DE05E7,0x10DE0595,"nVidia Tesla T10 Processor" },
1420{ 0x10DE05E7,0x10DE066A,"nVidia Tesla C1060" },
1421{ 0x10DE05E7,0x10DE068F,"nVidia Tesla T10 Processor" },
1422{ 0x10DE05E7,0x10DE0697,"nVidia Tesla M1060" },
1423{ 0x10DE05E7,0x10DE0714,"nVidia Tesla M1060" },
1424{ 0x10DE05E7,0x10DE0743,"nVidia Tesla M1060" },
1425// 0600 - 06FF
1426{ 0x10DE0600,0x10DE0000,"Abit GeForce 8800 GTS" },
1427
1428{ 0x10DE0605,0x145834A2,"Gigabyte GV-N98TOC-512H" },
1429
1430{ 0x10DE0608,0x15880577,"Solidum GeForce 9800M GTX" },
1431
1432{ 0x10DE0609,0x11700121,"Inventec GeForce 8800M GTS" },
1433
1434{ 0x10DE0612,0x104382A6,"Asus GeForce 9800 GTX+" },
1435{ 0x10DE0612,0x10DE0571,"nVidia GeForce 9800 GTX+" },
1436{ 0x10DE0612,0x10DE0592,"nVidia GeForce 9800 GTX+" },
1437{ 0x10DE0612,0x3842C842,"EVGA GeForce 9800 GTX+" },
1438{ 0x10DE0612,0x3842C875,"EVGA GeForce 9800 GTX+" },
1439
1440{ 0x10DE0615,0x10480F67,"ELSA GeForce GTS 250" },
1441{ 0x10DE0615,0x10DE0592,"Palit GeForce GTS 250" },
1442{ 0x10DE0615,0x10DE0593,"Palit GeForce GTS 250" },
1443{ 0x10DE0615,0x10DE0652,"Palit GeForce GTS 250" },
1444{ 0x10DE0615,0x10DE0719,"Palit GeForce GTS 250" },
1445{ 0x10DE0615,0x10DE079E,"Palit GeForce GTS 250" },
1446{ 0x10DE0615,0x11503842,"TMC GeForce GTS 250" }, // Thinking Machines Corporation
1447{ 0x10DE0615,0x11513842,"JAE GeForce GTS 250" },
1448{ 0x10DE0615,0x11553842,"Pine GeForce GTS 250" },
1449{ 0x10DE0615,0x11563842,"Periscope GeForce GTS 250" },
1450
1451{ 0x10DE0618,0x10432028,"Asus GeForce GTX 170M" },
1452{ 0x10DE0618,0x1043202B,"Asus GeForce GTX 680" },
1453
1454{ 0x10DE0622,0x104382AC,"Asus EN9600GT Magic" },
1455
1456{ 0x10DE0640,0x10DE077F,"Inno3D GeForce 9500GT HDMI" },
1457
1458{ 0x10DE0649,0x1043202D,"Asus GeForce GT 220M" },
1459
1460{ 0x10DE06CD,0x10DE079F,"Point of View GeForce GTX 470" },
1461{ 0x10DE06CD,0x14622220,"MSi GeForce GTX 470 Twin Frozr II" },
1462
1463{ 0x10DE06D1,0x10DE0771,"nVidia Tesla C2050" },
1464{ 0x10DE06D1,0x10DE0772,"nVidia Tesla C2070" },
1465
1466{ 0x10DE06D2,0x10DE0774,"nVidia Tesla M2070" },
1467{ 0x10DE06D2,0x10DE0830,"nVidia Tesla M2070" },
1468{ 0x10DE06D2,0x10DE0842,"nVidia Tesla M2070" },
1469{ 0x10DE06D2,0x10DE088F,"nVidia Tesla X2070" },
1470{ 0x10DE06D2,0x10DE0908,"nVidia Tesla M2070" },
1471
1472{ 0x10DE06DE,0x10DE0773,"nVidia Tesla S2050" },
1473{ 0x10DE06DE,0x10DE0830,"nVidia Tesla M2070" },
1474{ 0x10DE06DE,0x10DE0831,"nVidia Tesla M2070" },
1475{ 0x10DE06DE,0x10DE0832,"nVidia Tesla M2070" },
1476{ 0x10DE06DE,0x10DE0840,"nVidia Tesla X2070" },
1477
1478{ 0x10DE06E4,0x10438322,"Asus EN8400GS" },
1479{ 0x10DE06E4,0x14583475,"GV-NX84S256HE [GeForce 8400 GS]" },
1480
1481{ 0x10DE06E8,0x10280262,"Dell GeForce 9200M GS" },
1482{ 0x10DE06E8,0x10280271,"Dell GeForce 9200M GS" },
1483{ 0x10DE06E8,0x10280272,"Dell GeForce 9200M GS" },
1484{ 0x10DE06E8,0x103C30F4,"HP GeForce 9200M GS" },
1485{ 0x10DE06E8,0x103C30F7,"HP GeForce 9200M GS" },
1486{ 0x10DE06E8,0x103C3603,"HP GeForce 9200M GS" },
1487// 0700 - 07FF
1488// 0800 - 08FF
1489{ 0x10DE0873,0x104319B4,"Asus GeForce G102M" },
1490// 0900 - 09FF
1491// 0A00 - 0AFF
1492{ 0x10DE0A6F,0x12974003,"Shuttle XS 3510MA" },
1493
1494{ 0x10DE0A70,0x17AA3605,"Lenovo ION" },
1495
1496{ 0x10DE0A73,0x17AA3607,"Lenovo ION" },
1497{ 0x10DE0A73,0x17AA3610,"Lenovo ION" },
1498
1499{ 0x10DE0A75,0x17AA3605,"Lenovo ION" },
1500// 0B00 - 0BFF
1501// 0C00 - 0CFF
1502{ 0x10DE0CA3,0x14628041,"MSi VN240GT-MD1G" },
1503{ 0x10DE0CA3,0x16423926,"Bitland GeForce GT 230" },
1504// 0D00 - 0DFF
1505{ 0x10DE0DD8,0x10DE0914,"nVidia Quadro 2000D" },
1506
1507{ 0x10DE0DEF,0x17AA21F3,"Lenovo NVS 5400M" },
1508{ 0x10DE0DEF,0x17AA21F4,"Lenovo NVS 5400M" },
1509{ 0x10DE0DEF,0x17AA21F5,"Lenovo NVS 5400M" },
1510{ 0x10DE0DEF,0x17AA21F6,"Lenovo NVS 5400M" },
1511{ 0x10DE0DEF,0x17AA5005,"Lenovo NVS 5400M" },
1512
1513// 0E00 - 0EFF
1514{ 0x10DE0E22,0x1043835D,"Asus ENGTX460" },
1515
1516{ 0x10DE0E23,0x10B00401,"Gainward GeForce GTX 460" },
1517// 0F00 - 0FFF
1518{ 0x10DE0FBB,0x38422974,"EVGA GTX 970 OC" },
1519{ 0x10DE0FD2,0x10280595,"Dell GeForce GT 640M LE" },
1520{ 0x10DE0FD2,0x102805B2,"Dell GeForce GT 640M LE" },
1521// 1000 - 10FF
1522{ 0x10DE1080,0x14622561,"MSI N580GTX Lightning" },
1523{ 0x10DE1080,0x14622563,"MSI N580GTX Lightning" },
1524
1525{ 0x10DE1086,0x10DE0871,"Inno3D GeForce GTX 570" },
1526
1527{ 0x10DE1087,0x104383D6,"Asus ENGTX560Ti448 DCII" },
1528
1529{ 0x10DE1091,0x10DE088E,"nVidia Tesla X2090" },
1530{ 0x10DE1091,0x10DE0891,"nVidia Tesla X2090" },
1531
1532{ 0x10DE1094,0x10DE0888,"nVidia Tesla M2075" },
1533
1534{ 0x10DE1096,0x10DE0910,"nVidia Tesla C2075" },
1535{ 0x10DE1096,0x10DE0911,"nVidia Tesla C2050" },
1536
1537// 1100 - 11FF
1538{ 0x10DE1140,0x1025064A,"Acer GeForce GT 620M" },
1539{ 0x10DE1140,0x1025064C,"Acer GeForce GT 620M" },
1540{ 0x10DE1140,0x10250680,"Acer GeForce GT 620M" },
1541{ 0x10DE1140,0x10250692,"Acer GeForce GT 620M" },
1542{ 0x10DE1140,0x10250694,"Acer GeForce GT 620M" },
1543{ 0x10DE1140,0x10250702,"Acer GeForce GT 620M" },
1544{ 0x10DE1140,0x10250719,"Acer GeForce GT 620M" },
1545{ 0x10DE1140,0x10250725,"Acer GeForce GT 620M" },
1546{ 0x10DE1140,0x10250728,"Acer GeForce GT 620M" },
1547{ 0x10DE1140,0x1025072B,"Acer GeForce GT 620M" },
1548{ 0x10DE1140,0x1025072E,"Acer GeForce GT 620M" },
1549{ 0x10DE1140,0x10250732,"Acer GeForce GT 620M" },
1550{ 0x10DE1140,0x10280565,"Dell GeForce GT 630M" },
1551{ 0x10DE1140,0x10280568,"Dell GeForce GT 630M" },
1552{ 0x10DE1140,0x144DC0D5,"Samsung GeForce GT 630M" },
1553{ 0x10DE1140,0x17AA500D,"Lenovo GeForce GT 620M" },
1554{ 0x10DE1140,0x1B0A20DD,"Pegatron GeForce GT 620M" },
1555{ 0x10DE1140,0x1B0A20FD,"Pegatron GeForce GT 620M" },
1556
1557{ 0x10DE1180,0x00001255,"Afox GTX 680" },
1558{ 0x10DE1180,0x104383F0,"Asus GTX680-2GD5" },
1559{ 0x10DE1180,0x104383F6,"Asus GTX 680 Direct CU II" },
1560{ 0x10DE1180,0x104383F7,"Asus GTX 680 Direct CU II" },
1561{ 0x10DE1180,0x1458353C,"GV-N680OC-2GD WindForce GTX 680 OC" },
1562{ 0x10DE1180,0x14622820,"MSi N680GTX TwinFrozer" },
1563{ 0x10DE1180,0x14622830,"MSi GTX 680 Lightning" },
1564{ 0x10DE1180,0x14622831,"MSi GTX 680 Lightning LN2" },
1565{ 0x10DE1180,0x15691180,"Palit GTX 680 JetStream" },
1566{ 0x10DE1180,0x15691181,"Palit GTX 680 JetStream" },
1567{ 0x10DE1180,0x15691189,"Palit GTX 680 JetStream" },
1568{ 0x10DE1180,0x38422682,"EVGA GTX 680 SC" },
1569{ 0x10DE1180,0x38422683,"EVGA GTX 680 SC" },
1570
1571{ 0x10DE1185,0x10DE106F,"nVidia GeForce GTX 760 OEM" }, // GK104
1572
1573{ 0x10DE1187,0x14583614,"GV-N760OC-4GD" },
1574
1575{ 0x10DE1189,0x10438405,"Asus GTX 670 Direct CU II TOP" },
1576{ 0x10DE1189,0x15691189,"Palit GTX 670 JetStream" },
1577{ 0x10DE1189,0x19DA1255,"Zotac GTX 670 AMP! Edition" },
1578
1579{ 0x10DE11A1,0x15587102,"Clevo N13E-GR" },
1580
1581{ 0x10DE11C0,0x10DE0995,"Inno3D GeForce GTX660" },
1582{ 0x10DE11C0,0x1458354E,"GV-N660OC-2GD" },
1583
1584{ 0x10DE11C6,0x1043842A,"GTX650TI-1GD5" },
1585// 1200 - 12FF
1586{ 0x10DE1247,0x10432119,"Asus GeForce GT 670M" },
1587{ 0x10DE1247,0x10432120,"Asus GeForce GT 670M" },
1588{ 0x10DE1247,0x1043212A,"Asus GeForce GT 635M" },
1589{ 0x10DE1247,0x1043212B,"Asus GeForce GT 635M" },
1590{ 0x10DE1247,0x1043212C,"Asus GeForce GT 635M" },
1591{ 0x10DE1247,0x152D0930,"Quanta GeForce GT 635M" },
1592
1593{ 0x10DE1248,0x152D0930,"Quanta GeForce GT 635M" },
1594
1595{ 0x10DE124D,0x146210CC,"MSi GeForce GT 635M" }
1596};
1597
1598static int patch_nvidia_rom(uint8_t *rom)
1599{
1600uint8_tnum_outputs= 0;
1601uint8_ti= 0;
1602uint8_tdcbtable_version;
1603uint8_theaderlength= 0;
1604uint8_tnumentries= 0;
1605uint8_trecordlength= 0;
1606uint8_tchannel1= 0;
1607uint8_tchannel2= 0;
1608uint16_tdcbptr;
1609uint8_t*dcbtable;
1610uint8_t*togroup;
1611inthas_lvds= false;
1612struct dcbentry {
1613uint8_t type;
1614uint8_t index;
1615uint8_t *heads;
1616} entries[MAX_NUM_DCB_ENTRIES];
1617
1618DBG("patch_nvidia_rom.\n");
1619if (!rom || (rom[0] != 0x55 && rom[1] != 0xaa))
1620{
1621DBG("False ROM signature: 0x%02x%02x\n", rom[0], rom[1]);
1622return PATCH_ROM_FAILED;
1623}
1624
1625dcbptr = *(uint16_t *)&rom[0x36];
1626
1627if (!dcbptr)
1628{
1629DBG("no dcb table found\n");
1630return PATCH_ROM_FAILED;
1631}
1632//else
1633//{
1634//DBG("dcb table at offset 0x%04x\n", dcbptr);
1635//}
1636
1637dcbtable= &rom[dcbptr];
1638dcbtable_version= dcbtable[0];
1639
1640if (dcbtable_version >= 0x20)
1641{
1642uint32_t sig;
1643
1644if (dcbtable_version >= 0x30)
1645{
1646headerlength= dcbtable[1];
1647numentries= dcbtable[2];
1648recordlength= dcbtable[3];
1649
1650sig = *(uint32_t *)&dcbtable[6];
1651}
1652else
1653{
1654sig = *(uint32_t *)&dcbtable[4];
1655headerlength = 8;
1656}
1657
1658if (sig != 0x4edcbdcb)
1659{
1660DBG("Bad display config block signature (0x%8x)\n", sig); //Azi: issue #48
1661return PATCH_ROM_FAILED;
1662}
1663}
1664else if (dcbtable_version >= 0x14) { /* some NV15/16, and NV11+ */
1665char sig[8];
1666
1667strncpy(sig, (char *)&dcbtable[-7], 7);
1668sig[7] = 0;
1669recordlength = 10;
1670
1671if (strcmp(sig, "DEV_REC"))
1672{
1673DBG("Bad Display Configuration Block signature (%s)\n", sig);
1674return PATCH_ROM_FAILED;
1675}
1676}
1677else
1678{
1679DBG("ERROR: dcbtable_version is 0x%X\n", dcbtable_version);
1680return PATCH_ROM_FAILED;
1681}
1682
1683if (numentries >= MAX_NUM_DCB_ENTRIES)
1684{
1685numentries = MAX_NUM_DCB_ENTRIES;
1686}
1687
1688for (i = 0; i < numentries; i++)
1689{
1690uint32_t connection;
1691connection = *(uint32_t *)&dcbtable[headerlength + recordlength * i];
1692
1693/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */
1694if ((connection & 0x0000000f) == 0x0000000f) /* end of records */
1695{
1696continue;
1697}
1698if (connection == 0x00000000) /* seen on an NV11 with DCB v1.5 */
1699{
1700continue;
1701}
1702if ((connection & 0xf) == 0x6) /* we skip type 6 as it doesnt appear on macbook nvcaps */
1703{
1704continue;
1705}
1706
1707entries[num_outputs].type = connection & 0xf;
1708entries[num_outputs].index = num_outputs;
1709entries[num_outputs++].heads = (uint8_t*)&(dcbtable[(headerlength + recordlength * i) + 1]);
1710
1711}
1712
1713for (i = 0; i < num_outputs; i++)
1714{
1715if (entries[i].type == 3)
1716{
1717has_lvds = true;
1718//DBG("found LVDS\n");
1719channel1 |= ( 0x1 << entries[i].index );
1720entries[i].type = TYPE_GROUPED;
1721}
1722}
1723
1724// if we have a LVDS output, we group the rest to the second channel
1725if (has_lvds)
1726{
1727for (i = 0; i < num_outputs; i++)
1728{
1729if (entries[i].type == TYPE_GROUPED)
1730{
1731continue;
1732}
1733
1734channel2 |= ( 0x1 << entries[i].index );
1735entries[i].type = TYPE_GROUPED;
1736}
1737}
1738else
1739{
1740int x;
1741// we loop twice as we need to generate two channels
1742for (x = 0; x <= 1; x++)
1743{
1744for (i=0; i<num_outputs; i++)
1745{
1746if (entries[i].type == TYPE_GROUPED)
1747{
1748continue;
1749}
1750// if type is TMDS, the prior output is ANALOG
1751// we always group ANALOG and TMDS
1752// if there is a TV output after TMDS, we group it to that channel as well
1753if (i && entries[i].type == 0x2)
1754{
1755switch (x)
1756{
1757case 0:
1758//DBG("group channel 1\n");
1759channel1 |= ( 0x1 << entries[i].index );
1760entries[i].type = TYPE_GROUPED;
1761
1762if (entries[i-1].type == 0x0)
1763{
1764channel1 |= ( 0x1 << entries[i-1].index );
1765entries[i-1].type = TYPE_GROUPED;
1766}
1767// group TV as well if there is one
1768if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )
1769{
1770//DBG("group tv1\n");
1771channel1 |= ( 0x1 << entries[i+1].index );
1772entries[i+1].type = TYPE_GROUPED;
1773}
1774break;
1775
1776case 1:
1777//DBG("group channel 2 : %d\n", i);
1778channel2 |= ( 0x1 << entries[i].index );
1779entries[i].type = TYPE_GROUPED;
1780
1781if (entries[i - 1].type == 0x0) {
1782channel2 |= ( 0x1 << entries[i-1].index );
1783entries[i-1].type = TYPE_GROUPED;
1784}
1785// group TV as well if there is one
1786if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )
1787{
1788//DBG("group tv2\n");
1789channel2 |= ( 0x1 << entries[i+1].index);
1790entries[i+1].type = TYPE_GROUPED;
1791}
1792break;
1793default:
1794break;
1795
1796}
1797break;
1798}
1799}
1800}
1801}
1802
1803// if we have left ungrouped outputs merge them to the empty channel
1804togroup = &channel2; // = (channel1 ? (channel2 ? NULL : &channel2) : &channel1);
1805
1806for (i = 0; i < num_outputs; i++)
1807{
1808if (entries[i].type != TYPE_GROUPED)
1809{
1810//DBG("%d not grouped\n", i);
1811if (togroup)
1812{
1813*togroup |= ( 0x1 << entries[i].index);
1814}
1815entries[i].type = TYPE_GROUPED;
1816}
1817}
1818
1819if (channel1 > channel2)
1820{
1821uint8_t buff = channel1;
1822channel1 = channel2;
1823channel2 = buff;
1824}
1825
1826default_NVCAP[6] = channel1;
1827default_NVCAP[8] = channel2;
1828
1829// patching HEADS
1830for (i = 0; i < num_outputs; i++)
1831{
1832if (channel1 & (1 << i))
1833{
1834*entries[i].heads = 1;
1835}
1836else if(channel2 & (1 << i))
1837{
1838*entries[i].heads = 2;
1839}
1840}
1841return (has_lvds ? PATCH_ROM_SUCCESS_HAS_LVDS : PATCH_ROM_SUCCESS);
1842}
1843
1844static char *get_nvidia_model(uint32_t device_id, uint32_t subsys_id)
1845{
1846int i, j;
1847
1848// First check in the plist, (for e.g this can override any hardcoded devices)
1849cardList_t *nvcard = FindCardWithIds(device_id, subsys_id);
1850if (nvcard)
1851{
1852if (nvcard->model)
1853{
1854return nvcard->model;
1855}
1856}
1857
1858//ErmaC added selector for Chameleon "old" style in System Profiler
1859if (getBoolForKey(kNvidiaGeneric, &showGeneric, &bootInfo->chameleonConfig))
1860{
1861
1862
1863for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)
1864{
1865if (nvidia_card_generic[i].device == device_id)
1866{
1867return nvidia_card_generic[i].name;
1868}
1869}
1870return nvidia_card_generic[0].name;
1871}
1872
1873// Then check the exceptions table
1874if (subsys_id)
1875{
1876for (i = 0; i < (sizeof(nvidia_card_exceptions) / sizeof(nvidia_card_exceptions[0])); i++)
1877{
1878if ((nvidia_card_exceptions[i].device == device_id) && (nvidia_card_exceptions[i].subdev == subsys_id))
1879{
1880return nvidia_card_exceptions[i].name;
1881}
1882}
1883}
1884
1885// At last try the generic names
1886for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)
1887{
1888if (nvidia_card_generic[i].device == device_id)
1889{
1890if (subsys_id)
1891{
1892for (j = 0; j < (sizeof(nvidia_card_vendors) / sizeof(nvidia_card_vendors[0])); j++)
1893{
1894if (nvidia_card_vendors[j].device == (subsys_id & 0xffff0000))
1895{
1896snprintf(generic_name, 128, "%s %s", // sizeof(generic_name), "%s %s",
1897nvidia_card_vendors[j].name, nvidia_card_generic[i].name);
1898return &generic_name[0];
1899}
1900}
1901}
1902return nvidia_card_generic[i].name;
1903}
1904}
1905return nvidia_card_generic[0].name;
1906}
1907
1908static int devprop_add_nvidia_template(DevPropDevice *device)
1909{
1910//char tmp[16];
1911DBG("\tdevprop_add_nvidia_template\n");
1912
1913if (!device)
1914{
1915return 0;
1916}
1917
1918if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))
1919{
1920return 0;
1921}
1922
1923if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))
1924{
1925return 0;
1926}
1927
1928if (!DP_ADD_TEMP_VAL(device, nvidia_name_0))
1929{
1930return 0;
1931}
1932
1933// Slice added selector for single nvidia card
1934if (!getBoolForKey(kNvidiaSingle, &nvidiaSingle, &bootInfo->chameleonConfig))
1935{
1936if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))
1937{
1938return 0;
1939}
1940
1941if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))
1942{
1943return 0;
1944}
1945
1946if (!DP_ADD_TEMP_VAL(device, nvidia_name_1))
1947{
1948return 0;
1949}
1950
1951}
1952else
1953{
1954DBG("\tNVidia: Injecting only device 0\n");
1955}
1956
1957if (devices_number == 1)
1958{
1959if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_parent))
1960{
1961return 0;
1962}
1963}
1964else if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))
1965{
1966return 0;
1967}
1968
1969// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!
1970// len = sprintf(tmp, "Slot-%x", devices_number);
1971//snprintf(tmp, sizeof(tmp), "Slot-%x",devices_number);
1972//devprop_add_value(device, "AAPL,slot-name", (uint8_t *) tmp, (uint32_t)strlen(tmp));
1973devices_number++;
1974
1975return 1;
1976}
1977
1978static uint32_t load_nvidia_bios_file(const char *filename, uint8_t **buf)
1979{
1980int fd;
1981int size;
1982
1983if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0)
1984{
1985return 0;
1986}
1987
1988size = file_size(fd);
1989
1990if (size)
1991{
1992*buf = malloc(size);
1993size = read(fd, (char *)buf, size);
1994}
1995close(fd);
1996
1997return size > 0 ? size : 0;
1998}
1999
2000uint64_t mem_detect(volatile uint8_t *regs, uint16_t nvCardType, pci_dt_t *nvda_dev, uint32_t device_id, uint32_t subsys_id)
2001{
2002uint64_t vram_size = 0;
2003
2004// First check if any value exist in the plist
2005cardList_t *nvcard = FindCardWithIds(device_id, subsys_id);
2006if (nvcard)
2007{
2008if (nvcard->videoRam > 0)
2009{
2010vram_size = nvcard->videoRam * 1024 * 1024;
2011
2012return vram_size;
2013}
2014}
2015
2016// Finally, if vram_size still not set do the calculation with our own method
2017if (nvCardType < NV_ARCH_50)
2018{
2019vram_size = (uint64_t)(REG32( NV04_PFB_FIFO_DATA ));
2020vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;
2021}
2022else if (nvCardType < NV_ARCH_C0)
2023{
2024vram_size = (uint64_t)(REG32( NV04_PFB_FIFO_DATA ));
2025vram_size |= (vram_size & 0xff) << 32;
2026vram_size &= 0xffffffff00ll;
2027}
2028else
2029{ // >= NV_ARCH_C0
2030vram_size = REG32( NVC0_MEM_CTRLR_RAM_AMOUNT ) << 20;
2031vram_size *= REG32( NVC0_MEM_CTRLR_COUNT );
2032}
2033
2034// Then, Workaround for 9600M GT, GT 210/420/430/440/525M/540M & GTX 560M
2035switch (nvda_dev->device_id)
2036{
2037case 0x0647: // 9600M GT 0647
2038vram_size = 512*1024*1024;
2039break;
2040case 0x0649:// 9600M GT 0649
2041// 10DE06491043202D 1GB VRAM
2042if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x1043202D )
2043{
2044vram_size = 1024*1024*1024;
2045}
2046break;
2047case 0x0A65: // GT 210
2048case 0x0DE0: // GT 440
2049case 0x0DE1: // GT 430
2050case 0x0DE2: // GT 420
2051case 0x0DEC: // GT 525M 0DEC
2052vram_size = 1024*1024*1024;
2053break;
2054case 0x0DE9: // GT 630M
2055// 10DE0DE9103C181D 1GB VRAM
2056if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x103C181D )
2057{
2058vram_size = 1024*1024*1024;
2059}
2060break;
2061case 0x0DF4: // GT 540M
2062case 0x0DF5: // GT 525M 0DF5
2063vram_size = 1024*1024*1024;
2064break;
2065case 0x0F00:// GT 630
2066// 10DE0F0014583544 2GB VRAM
2067//if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x14583544 )
2068//{
2069vram_size = -2147483648UL; // 2147483648;
2070//}
2071break;
2072case 0x11C6:// GTX650TI 11C6
2073// 10DE11C61043842A 1GB VRAM
2074if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x1043842A )
2075{
2076vram_size = 1024*1024*1024;
2077}
2078break;
2079case 0x1251: // GTX 560M
2080vram_size = 1536*1024*1024;
2081break;
2082default:
2083break;
2084}
2085
2086DBG("mem_detected %ld\n", vram_size);
2087return vram_size;
2088}
2089
2090static uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};
2091
2092static bool checkNvRomSig(uint8_t * aRom)
2093{
2094return aRom != NULL && (aRom[0] == 0x55 && aRom[1] == 0xaa);
2095}
2096
2097bool setup_nvidia_devprop(pci_dt_t *nvda_dev)
2098{
2099DevPropDevice*device= NULL;
2100char*devicepath= NULL;
2101uint8_t*rom= NULL;
2102uint16_tnvCardType= 0;
2103uint64_tvideoRam= 0;
2104uint32_tbar[7];
2105uint32_tboot_display= 0;
2106intnvPatch= 0;
2107char*model= NULL;
2108charnvFilename[64];
2109option_rom_pci_header_t*rom_pci_header;
2110volatile uint8_t*regs;
2111uint32_tnvBiosOveride;
2112intlen;
2113charbiosVersion[64];
2114charkNVCAP[12];
2115const char*value;
2116
2117fill_card_list();
2118
2119devicepath = get_pci_dev_path(nvda_dev);
2120bar[0] = pci_config_read32(nvda_dev->dev.addr, 0x10 );
2121regs = (uint8_t *) (bar[0] & ~0x0f);
2122
2123// get card type
2124nvCardType = (REG32(0) >> 20) & 0x1ff;
2125
2126verbose("\tClass code: [%04X]\n", nvda_dev->class_id);
2127
2128model = get_nvidia_model(((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id));
2129
2130// Amount of VRAM in kilobytes
2131videoRam = mem_detect(regs, nvCardType, nvda_dev,((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) );
2132
2133snprintf(nvFilename, sizeof(nvFilename), "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id, (uint16_t)nvda_dev->device_id);
2134
2135if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)
2136{
2137verbose("\tLooking for nvidia video bios file %s\n", nvFilename);
2138nvBiosOveride = load_nvidia_bios_file(nvFilename, &rom);
2139
2140if (nvBiosOveride > 0)
2141{
2142verbose("\tUsing nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);
2143DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);
2144}
2145else
2146{
2147printf("\tERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);
2148free(rom);
2149return false;
2150}
2151}
2152else
2153{
2154uint8_t*nvRom;
2155rom = malloc(NVIDIA_ROM_SIZE);
2156// Otherwise read bios from card
2157nvBiosOveride = 0;
2158
2159// PROM first
2160// Enable PROM access
2161(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;
2162
2163nvRom = (uint8_t*)&regs[NV_PROM_OFFSET];
2164
2165// Valid Signature ?
2166if (checkNvRomSig(nvRom))
2167{
2168bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);
2169DBG("\tPROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
2170}
2171else
2172{
2173
2174// disable PROM access
2175(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;
2176
2177//PRAM next
2178nvRom = (uint8_t*)&regs[NV_PRAMIN_OFFSET];
2179
2180if(checkNvRomSig(nvRom))
2181{
2182bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);
2183DBG("\tPRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
2184}
2185else
2186{
2187// 0xC0000 last
2188bcopy((char *)0xc0000, rom, NVIDIA_ROM_SIZE);
2189
2190// Valid Signature ?
2191if (!checkNvRomSig(rom))
2192{
2193printf("\tERROR: Unable to locate nVidia Video BIOS\n");
2194return false;
2195}
2196else
2197{
2198 DBG("\tROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
2199 }
2200 }//end PRAM check
2201 }//end PROM check
2202 }//end load rom from bios
2203
2204if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED)
2205{
2206printf("\tERROR: nVidia ROM Patching Failed!\n");
2207free(rom);
2208return false;
2209}
2210
2211rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);
2212
2213// check for 'PCIR' sig
2214if (rom_pci_header->signature == 0x50434952)
2215{
2216if (rom_pci_header->device_id != nvda_dev->device_id)
2217{
2218// Get Model from the OpROM
2219model = get_nvidia_model(((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id), 0);
2220
2221// Get VRAM again
2222videoRam = mem_detect(regs, nvCardType, nvda_dev, ((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id), 0);
2223
2224}
2225else
2226{
2227printf("\tnVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);
2228}
2229}
2230
2231verbose("\tdevice number: %d\n\t%s %dMB NV%02x [%04x:%04x]-[%04x:%04x]\n\t%s\n",
2232devices_number,
2233model, (uint32_t)(videoRam / 1024 / 1024),
2234(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,
2235nvda_dev->subsys_id.subsys.vendor_id, nvda_dev->subsys_id.subsys.device_id,
2236devicepath);
2237verbose("\tNvidiaGeneric = %s\n", showGeneric ? "Yes" : "No");
2238verbose("\tNvidiaSingle = %s\n", nvidiaSingle ? "Yes" : "No");
2239
2240if (!string)
2241{
2242string = devprop_create_string();
2243}
2244
2245device = devprop_add_device(string, devicepath);
2246
2247/* FIXME: for primary graphics card only */
2248boot_display = 1;
2249devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t *)&boot_display, 4);
2250
2251if (getBoolForKey(kUseIntelHDMI, &doit, &bootInfo->chameleonConfig) && doit)
2252{
2253devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);
2254}
2255else
2256{
2257devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10);
2258}
2259
2260if (nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS)
2261{
2262uint8_t built_in = 0x01;
2263devprop_add_value(device, "@0,built-in", &built_in, 1);
2264}
2265
2266// get bios version
2267const int MAX_BIOS_VERSION_LENGTH = 32;
2268char *version_str = (char *)malloc(MAX_BIOS_VERSION_LENGTH);
2269
2270memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);
2271
2272int i, version_start;
2273int crlf_count = 0;
2274
2275// only search the first 384 bytes
2276for (i = 0; i < 0x180; i++)
2277{
2278if (rom[i] == 0x0D && rom[i+1] == 0x0A)
2279{
2280crlf_count++;
2281// second 0x0D0A was found, extract bios version
2282if (crlf_count == 2)
2283{
2284if (rom[i-1] == 0x20) i--; // strip last " "
2285
2286for (version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--)
2287{
2288// find start
2289if (rom[version_start] == 0x00)
2290{
2291version_start++;
2292
2293// strip "Version "
2294if (strncmp((const char*)rom+version_start, "Version ", 8) == 0)
2295{
2296version_start += 8;
2297}
2298
2299strncpy(version_str, (const char*)rom+version_start, i-version_start);
2300break;
2301}
2302}
2303break;
2304}
2305}
2306}
2307
2308strncpy(biosVersion, (nvBiosOveride > 0) ? nvFilename : version_str, sizeof(biosVersion) );
2309snprintf(kNVCAP, sizeof(kNVCAP), "NVCAP_%04x", nvda_dev->device_id);
2310
2311if (getValueForKey(kNVCAP, &value, &len, &bootInfo->chameleonConfig) && len == NVCAP_LEN * 2)
2312{
2313uint8_t new_NVCAP[NVCAP_LEN];
2314
2315if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)
2316{
2317verbose("\tUsing user supplied NVCAP for %s :: %s\n", model, devicepath);
2318memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);
2319}
2320}
2321
2322if (getValueForKey(kDcfg0, &value, &len, &bootInfo->chameleonConfig) && len == DCFG0_LEN * 2)
2323{
2324uint8_t new_dcfg0[DCFG0_LEN];
2325
2326if (hex2bin(value, new_dcfg0, DCFG0_LEN) == 0)
2327{
2328memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);
2329
2330verbose("\tUsing user supplied @0,display-cfg\n");
2331printf("@0,display-cfg: %02x%02x%02x%02x\n",
2332 default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);
2333}
2334}
2335
2336if (getValueForKey(kDcfg1, &value, &len, &bootInfo->chameleonConfig) && len == DCFG1_LEN * 2)
2337{
2338uint8_t new_dcfg1[DCFG1_LEN];
2339
2340if (hex2bin(value, new_dcfg1, DCFG1_LEN) == 0)
2341{
2342memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);
2343
2344verbose("Using user supplied @1,display-cfg\n");
2345printf("\t@1,display-cfg: %02x%02x%02x%02x\n",
2346 default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);
2347}
2348}
2349
2350#if DEBUG_NVCAP
2351printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",
2352default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],
2353default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],
2354default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],
2355default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],
2356default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);
2357#endif
2358
2359devprop_add_nvidia_template(device);
2360devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);
2361
2362devprop_add_value(device, "NVPM", default_NVPM, NVPM_LEN);
2363devprop_add_value(device, "VRAM,totalsize", (uint8_t *)&videoRam, 4);
2364devprop_add_value(device, "model", (uint8_t *)model, strlen(model) + 1);
2365devprop_add_value(device, "rom-revision", (uint8_t *)biosVersion, strlen(biosVersion) + 1);
2366
2367devprop_add_value(device, "@0,display-cfg", (uint8_t *)&default_dcfg_0, DCFG0_LEN);
2368devprop_add_value(device, "@1,display-cfg", (uint8_t *)&default_dcfg_1, DCFG1_LEN);
2369
2370/******************** Added Marchrius.**********************/
2371// For the AppleBacklightDisplay //
2372/***********************************************************/
2373if (getBoolForKey(kEnableBacklight, &doit, &bootInfo->chameleonConfig) && doit)
2374{
2375uint8_t AAPL_value[] = {0x01, 0x00, 0x00, 0x00}; //Is the same for all
2376devprop_add_value(device, "AAPL,HasPanel", AAPL_value, 4);
2377devprop_add_value(device, "AAPL,Haslid", AAPL_value, 4);
2378devprop_add_value(device, "AAPL,backlight-control", AAPL_value, 4);
2379devprop_add_value(device, "@0,backlight-control", AAPL_value, 4);
2380}
2381/************************** End ****************************/
2382
2383/***********************************************************/
2384// For the DualLink //
2385/***********************************************************/
2386if (getBoolForKey(kEnableDualLink, &doit, &bootInfo->chameleonConfig) && doit)
2387{
2388uint8_t AAPL00_value[] = {0x01, 0x00, 0x00, 0x00};
2389devprop_add_value(device, "AAPL00,DualLink", AAPL00_value, 4);
2390}
2391/************************** End ****************************/
2392
2393/************************ HDMI Audio ***********************/
2394doit = false;
2395//http://forge.voodooprojects.org/p/chameleon/issues/67/
2396if(getBoolForKey(kEnableHDMIAudio, &doit, &bootInfo->chameleonConfig) && doit)
2397{
2398devprop_add_value(device, "@1,connector-type",connector_type_1, 4);
2399}
2400/************************ End Audio *************************/
2401
2402if (getBoolForKey(kVBIOS, &doit, &bootInfo->chameleonConfig) && doit)
2403{
2404devprop_add_value(device, "vbios", rom, (nvBiosOveride > 0) ? nvBiosOveride : (rom[2] * 512));
2405}
2406
2407stringdata = malloc(sizeof(uint8_t) * string->length);
2408memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
2409stringlength = string->length;
2410
2411free(version_str);
2412free(rom);
2413return true;
2414}
2415

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